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Homework Assignment 02 Question 1 (2 points each unless noted otherwise) 1. What is the 3-dB bandwidth of the amplifier shown below if 2.5K, 100K, 40 ms, and 1 nf? (a) 65.25 khz (b) 10 khz (c) 1.59 khz (d) 10.4 khz Answer: The capacitor sees an equivalent resistance 100K. (Iff one turns off, 0, and the current source is effectively removed from the circuit.) The time-constantt is 1000 s. The bandwidth is 1 2 1.59kHz, so thee answer is (c). 2. What is the 3-dB bandwidth of the circuit below? (a) 8 khz (b) 31.83 khz (c) 15.92 khz (d) 100 khz Answer: The capacitor sees an equivalent resistance 10K (the current source has nfinite internal resistance) and the time-constant is 10 s, so that t the bandwidth is 1 2 15.92 khz, and (c) is the answer. 3. The op-amp in the circuit is ideal, and 10K, 100K, and 10K. The input resistance thatt the source sees is (a) 10K (b) 20K (virtual short between + and ) (c) (Ideal op-amp has ) (d) 4.72K (KCL at terminal) Answer: 10K, so (a) is the answer. 4. True or false: the mobility of holes is greater than the mobility of electrons in semiconductor materials. Answer: False 1

5. A 9-V dc power supply generates 10 W in a resistor. What peak-to-peak amplitude should an ac source have to generate the same power in the resistor? (a) 12.73 V (b) 25.5 V (c) 18 V (d) 12.73 V Answer: The ac source s effective (or rms) value should also be 9 V. This means the peak value should be 9 2 V, so the peak-to-peak the outpu voltage is value should be 18 2 25.5V, so the answer is (b). 6. In the circuit shown, (a) 5 1 8 2 25 V (b) 5 8 2 20 V (c) 15 V (d) 15 V (e) 8 2 120 V Answer: This is a non-inverting amplifier with gain 1 8 2 5, so with a 5-V input the output should be 25 V. However, the op-amp is powered by y a +15-V power supply, so that the output will be clamped to a value close to +15 V, so the answer iss (c). 7. True or false: a silicon diode is biased so that 0.7at 25 o C. V D changes with 2 mv/ o C, so that at 125 o C, will be 0.7 + 100 0.002 = 0. 9 V. Answer: False. decreases with increasing temperature 8. True or false: a diode, forward biased at ID = 1 ma, hass a small-signal or incremental resistance of about 260 Ω. Answer: False, because 26 mv 1mA 2 26 Ω 260 Ω 9. Which of the following depicts the correct current direction? Circle one. 10. In the context of diodes, the term PIV means: Answer: Peak Inverse Voltage 2

11. True or false: in the circuit below, even though the diode equation is nonlinear, the photocurrent is essentially linear with photon flux density. Answer: True 12. A bench power supply is set to an output voltage of 5 V. When it is connected to a circuit thatt draws 2.5 A, the output voltage drops to 4.95 V. What iss the output resistance of the power supply? (a) (b) (c) 20 mω 1.98 Ω Need additio onal information Answer: Δ Δ 0..05 2.5 20 mω, so (a) 13. An AAA cell has a no-load voltage of 1.605 V. When a 100 Ω resistor is connected across its terminals, the voltage drops to 1.595 V. What is the cell s internal resistance? a) b) c) 620 mω 10 mω Need additional information Answer: The current flowing through the load resistance is 1.595 100 15.95 ma. The internal resistance is Δ Δ 1.605 1.595 15.95 10 0.627 Ω. Thus, (a) is the answer. 3

Question 2 For the current source in the circuit shown, 0.5 u ma, where u is the unit step function. The capacitor is initially uncharged. What is at 22 s? (8 points) The capacitor sees an equivalent resistance 10K (the current source has infinite internal resistance) and the time-constant is 10 s. For, 0.5 ma 10K 5 V. Further, 5 1. Substituting 22 s gives 4.45 V. Alternatively, recognize that 22 is 2.2 whichh is the well-known approximation for the 90% rise time. Thus, the output will be 0.9 5 4.5 V which is close to 4. 45 V. Question 3 For the circuit shown, determine and, assuming that the diode is a Si diode. (4 points)?,? 2 0.7 8 0.37 ma 5K 20K 8 20K 0.77 0.14 V 4

Question 4 For the following circuit the diodes are Si. Makee reasonable assumptions and determinee and. (6 points) Assume the diodes internal resistance is negligible and that 0.7 V. Assume that both diodes are forward-biased. Replace the diodes with linear models as shown below. This is now a linear circuit that one can solve using nodal analysis, KCL, KVL, superposition n, Thevenin orr Norton equivalent circuits, etc. A KCL equation for the output node is 2K 10 0 2K Solving yields 6.2 V. The sign of the voltage is consistent with our assumption: the diodes are forward biased. The current through the output resistor is 2K = 3.1 ma. By symmetry,, half of this current flows through each diode, so that 0.7 1.55 ma 10 0.7 2K 0 5

Question 5 For the following circuit one diode is made from Ge and the other from Si semiconductor. Make reasonable assumptions and determine and. (6 points) Assume for Si is 0.7 V and for Ge is 0.3 V, and the diodes internal resistance is negligible. Given the battery and diodes polarities, assume the Ge diode is forward-biased. The voltage across the Si diode is then less that its turn on-voltage so it is off. Replace the two diodes with their corresponding piecewise linear models as shown. Then 10 0.3 9.3 ma A 1K 9.3 ma 1K 9.3 V 6

Question 6 For the following circuit the diodes are made from Si semiconductor. Make reasonable assumptions and determine and. Assume for Si is 0.7 V and the diodes internal resistance are negligible. Given the battery and diodes polarities, assume diodes are forward-biased. Replace the diodes with piecewise linear models as shown. Then 16 0.7 0.7 14.66 V 12 4.7K 14.6 12 0.553 ma 4.7K 7

Question 7 Consider the circuit below. The diodes and are Si diodes, and 10 K. The Zener diodes have 4.3 V, and 6.3 V. The input voltage is 10sin. Use a piecewisee linear diode model with 0.7 V and diode series resistancee 0. Sketch the output voltage for one cycle, carefully labeling important features of the plot such as maxima and minima. (8 points) Positive part of the input. is reverse biased and and are effectively removed from the circuit. The combination of, do not conduct until the input voltage reaches 4.3+0.7 = 5 V. For 5 V, the output is clipped at 5 V, otherwise the output is identical to the input. Negative part of the input. is reverse-biased and and are effectively removed from the circuit. The combination, do not conduct until 6.3 0.77 7 V. For 7 V, the output is clipped at 7 V. Note: points are subtracted if students do not account for and if, are not shown on the plot, and plot axis are not labeled. 8

Question 8 For the following circuit, sketch the output for one cycle of the input voltage. Use a piecewisee linear diode model with 0.7 V and diode seriess resistance 0. Indicate important features of the plot such as maxima and minima. (12 points) Negative input. is reverse-biased and effectively removedd from the circuit, and the output is identical to the input: 6 sin. The minimum value is 6 V. Positive input. For small input voltages, is reverse-biasedd and effectively removed from the circuit, and the output is identical to the input. When the input voltage 2 0.7 2.7 V, is forward-biased, conducts, and the bottom of is 2.7 V. For this part of the cycle, The maximum value is 1.65 2.7 4.35 V 10 6 2.7 10 10 sin 2.7 V 1.65 sin 2.7 V Note: points were subtracted if students did not account for and if, were not shown on the plot, and plot axis weree not labeled. A key aspect of the plot is the fact that it is not a clipper/clamp, but a shaper: for 2.7 V,, the output is attenuated. 9

Question 9 Consider the circuit below. Use a piecewise linear diode model with 0.7 V and diode series resistance 0, and assume the capacitor is initially uncharged. a) Sketch the output for two cycles of the input voltage starting at 0. Indicate important features of the plot such as maxima and minima. (4 points) b) What is the steady-statis the steady-state (long term) minimumm output voltage? (1 point) (long term) maximum output voltage? (1 point) c) What 5 sin 2 V For small the diode is reverse-biased and it is open, and 5sin. When 2.7 V, the diode conducts, C charges, and the output is at 2..7 V. C continues chargingg until reaches its peak of 5 V. At this time 5 2.7 2.3 V. When decreases, the diode becomes reverse-biased opens. subtracts from the input voltage, and 5sin 2.3 V. The steady-state maximum voltage is 2.7 V The steady-state minimum voltage is 5 2.3 7.3 V Note: points were subtracted if students did not account for and if, were not shown on the plot, and plot axis weree not labeled. Two key areas of the plot are the initial charging of the C, and the clipping at 2.7 V. 10

Question 10 Consider the circuit below. Assume = 3.3 V, and 150 Ω. Also shown, are the LED s voltage-current characteristics. Draw the circuit s dc load line on the characteristics and find and (6 points). On the voltage axis, mark the supply voltage: 3.3 V. On the current axis, mark the maximum current that can flow through the resistor: 3.33 150 22mA. Connect the two points to get the dc load line. The dc load line intersects the diode V-I curve at around 8mA and 2.25 V. 11

Question 11 In the circuit shown, the constant current source forces a dc current of 1 ma through and. The coupling capacitor is large enough so that it is effectively a short at the ac source ss frequency. The amplitude of the ac source is 10 mv. Determine the amplitude of the (ac) output voltage. The frequency is low enough so that one can ignore the diode junction- and diffusion capacitances. (5 points) The diode s small-signal resistance is 1 40 25 Ω. Thiss forms a voltage divider with the so that the ac output voltage is 5 mv. 12