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Features Advanced Process Technology Ultra Low On-Resistance 175 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUTOMOTIVE GRADE Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications. V DSS TO-220AB AUIRFEZ R DS(on) typ. max. I D (Silicon Limited) I D (Package Limited) S D G D AUIRFEZ AUIRFEZS AUIRFEZL S G D 2 Pak AUIRFEZS D 60V 6.8m 8.5m 84A 75A S G D TO-262 AUIRFEZL G D S Gate Drain Source Base part number Package Type Standard Pack Orderable Part Number Form Quantity AUIRFEZ TO-220 Tube 50 AUIRFEZ AUIRFEZL TO-262 Tube 50 AUIRFEZL AUIRFEZS D 2 -Pak Tube 50 AUIRFEZS Tape and Reel Left 800 AUIRFEZSTRL Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless otherwise specified. Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 84 I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 60 I D @ T C = 25 C Continuous Drain Current, V GS @ V (Package Limited) 75 A I DM Pulsed Drain Current 340 P D @T C = 25 C Maximum Power Dissipation 140 W Linear Derating Factor 0.90 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy (Thermally Limited) 99 E AS (tested) Single Pulse Avalanche Energy Tested Value 180 mj I AR Avalanche Current See Fig.15,16, 12a, 12b A E AR Repetitive Avalanche Energy mj T J Operating Junction and -55 to + 175 T STG Storage Temperature Range C Soldering Temperature, for seconds (1.6mm from case) 300 Mounting torque, 6-32 or M3 screw lbf in (1.1N m) Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 1.11 R CS Case-to-Sink, Flat, Greased Surface 0.50 R JA Junction-to-Ambient 62 C/W R JA Junction-to-Ambient ( PCB Mount, steady state) 40 HEXFET is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2017-09-18

Static @ T J = 25 C (unless otherwise specified) AUIRFEZ/S/L Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 60 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.058 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 6.8 8.5 m V GS = V, I D = 51A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 250µA gfs Forward Trans conductance 200 S V DS = 25V, I D = 51A I DSS Drain-to-Source Leakage Current 20 V µa DS =60 V, V GS = 0V 250 V DS =60V,V GS = 0V,T J =125 C Gate-to-Source Forward Leakage 200 V I GSS na GS = 20V Gate-to-Source Reverse Leakage -200 V GS = -20V Dynamic Electrical Characteristics @ T J = 25 C (unless otherwise specified) Q g Total Gate Charge 58 86 I D = 51A Q gs Gate-to-Source Charge 19 28 nc V DS = 48V Q gd Gate-to-Drain Charge 21 32 V GS = V t d(on) Turn-On Delay Time 19 V DD = 30V t r Rise Time 90 I D = 51A ns t d(off) Turn-Off Delay Time 38 R G = 7.95 t f Fall Time 54 V GS = V Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 28 V GS = 0V C oss Output Capacitance 420 V DS = 25V C rss Reverse Transfer Capacitance 200 ƒ = 1.0MHz, See Fig. 5 pf C oss Output Capacitance 1440 V GS = 0V, V DS = 1.0V ƒ = 1.0MHz C oss Output Capacitance 320 V GS = 0V, V DS = 48V ƒ = 1.0MHz C oss eff. Effective Output Capacitance 5 V GS = 0V, V DS = 0V to 48V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 84 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 340 (Body Diode) p-n junction diode. V SD Diode Forward Voltage 1.3 V T J = 25 C,I S = 51A,V GS = 0V t rr Reverse Recovery Time 41 62 ns T J = 25 C,I F = 51A, V DD = 30V Q rr Reverse Recovery Charge 54 81 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Limited by T Jmax, starting T J = 25 C, L = 0.077mH, R G = 25, I AS = 51A, V GS =V. Part not recommended for use above this value. Pulse width 1.0ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population, starting T J = 25 C, L = 0.077mH, R G = 25, I AS = 51A, V GS =V. When mounted on 1" square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994 : http://www.irf.com/technical-info/appnotes/an-994.pdf R is measured at T J approximately 90 C. 2 2017-09-18

I D, Drain-to-Source Current ) G fs, Forward Transconductance (S) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) AUIRFEZ/S/L 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 1 4.5V 20µs PULSE WIDTH Tj = 25 C 0.1 0.1 1 V DS, Drain-to-Source Voltage (V) 1 20µs PULSE WIDTH Tj = 175 C 0.1 0.01 0.1 1 V DS, Drain-to-Source Voltage (V) Fig. 1 Typical Output Characteristics Fig. 2 Typical Output Characteristics 0 90 T J = 175 C 80 70 T J = 25 C 60 50 40 T J = 175 C 1 T J = 25 C 30 20 0.1 4 5 6 7 8 9 0 0 20 40 60 80 120 140 V GS, Gate-to-Source Voltage (V) I D,Drain-to-Source Current (A) Fig. 3 Typical Transfer Characteristics Fig. 4 Typical Forward Transconductance vs. Drain Current 3 2017-09-18

I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance(pF) V GS, Gate-to-Source Voltage (V) AUIRFEZ/S/L 000 00 V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 12.0.0 8.0 I D = 51A V DS = 48V V DS = 30V V DS = 12V C iss 6.0 0 4.0 C oss C rss 2.0 1 0.0 0 20 30 40 50 60 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 0.00 00.00 0 OPERATION IN THIS AREA LIMITED BY R DS (on).00 T J = 175 C µsec 1.00 T J = 25 C 1msec V GS = 0V 0. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 V SD, Source-to-Drain Voltage (V) 1 0.1 Tc = 25 C Tj = 175 C Single Pulse msec 1 V DS, Drain-to-Source Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 2017-09-18

I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) AUIRFEZ/S/L 90 80 70 Limited By Package 2.5 2.0 I D = 84A V GS = V 60 50 1.5 40 30 20 1.0 0 25 50 75 125 150 175 T C, Case Temperature ( C) 0.5-60 -40-20 0 20 40 60 80 120 140 160 180 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Normalized On-Resistance vs. Temperature 1 D = 0.50 Thermal Response ( Z thjc ) 0.1 0.01 0.001 0.20 0. 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) R 1 R 1 R 2 R 2 R 3 R 3 J J 1 1 2 2 3 3 Ci= i Ri Ci= i Ri 1E-006 1E-005 0.0001 0.001 0.01 0.1 t 1, Rectangular Pulse Duration (sec) C C Ri ( C/W) i (sec) 0.415 0.000246 0.4 0.000898 0.285 0.009546 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2017-09-18

V GS(th) Gate threshold Voltage (V) AUIRFEZ/S/L V DS L 15V DRIVER E AS, Single Pulse Avalanche Energy (mj) 400 350 300 I D TOP 5.7A 9.1A BOTTOM 51A 250 R G 20V tp D.U.T I AS 0.01 + - V DD A 200 150 Fig 12a. Unclamped Inductive Test Circuit 50 tp V (BR)DSS 0 25 50 75 125 150 175 Starting T J, Junction Temperature ( C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Vds Id Vgs 4.5 Vgs(th) 4.0 3.5 Qgs1 Qgs2 Qgd Qgodr 3.0 I D = 250µA Fig 13a. Gate Charge Waveform 2.5 2.0 1.5 1.0-75 -50-25 0 25 50 75 125 150 175 T J, Temperature ( C ) Fig 14. Threshold Voltage vs. Temperature Fig 13b. Gate Charge Test Circuit 6 2017-09-18

E AR, Avalanche Energy (mj) AUIRFEZ/S/L 0 Avalanche Current (A) Duty Cycle = Single Pulse 0.01 0.05 0. Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs. Pulse width 75 50 25 TOP Single Pulse BOTTOM 1% Duty Cycle I D = 51A 0 25 50 75 125 150 175 Starting T J, Junction Temperature ( C) Fig 16. Maximum Avalanche Energy vs. Temperature Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-5 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) P D (ave) = 1/2 ( 1.3 BV I av ) = T/ Z thjc I av = 2 T/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av 7 2017-09-18

AUIRFEZ/S/L Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms 8 2017-09-18

AUIRFEZ/S/L TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information Part Number IR Logo AUIRFEZ YWWA XX XX Date Code Y= Year WW= Work Week Lot Code TO-220AB package is not recommended for Surface Mount Application. 9 2017-09-18

AUIRFEZ/S/L D 2 Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) D 2 Pak (TO-263AB) Part Marking Information Part Number IR Logo AUIRFEZS YWWA XX XX Date Code Y= Year WW= Work Week Lot Code 2017-09-18

AUIRFEZ/S/L TO-262 Package Outline (Dimensions are shown in millimeters (inches) TO-262 Part Marking Information Part Number IR Logo AUIRFEZL YWWA XX XX Date Code Y= Year WW= Work Week Lot Code 11 2017-09-18

AUIRFEZ/S/L D 2 Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941).90 (.429).70 (.421) 16. (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 12 2017-09-18

AUIRFEZ/S/L Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model RoHS Compliant Automotive (per AEC-Q1) Comments: This part number(s) passed Automotive qualification. Infineon s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. TO-220AB TO-262 D 2 -Pak N/A MSL1 Class M4 AEC-Q1-002 Class H1C AEC-Q1-001 Class C3 AEC-Q1-005 Yes Highest passing voltage. Revision History Date Comments Updated datasheet with corporate template 09/30/2015 Corrected ordering table on page 1. 09/18/2017 Corrected typo error on part marking on page 9,,11. Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 13 2017-09-18