20A, 600V N-CHANNEL MOSFET GENERAL DESCRIPTION SVF20N60F/PN is an N-channel enhancement mode power MOS field effect transistor which is produced using Silan proprietary F-Cell TM structure VDMOS technology. The improved planar stripe cell and the improved guard ring terminal have been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are widely used in AC-DC power suppliers, DC-DC converters and H-bridge PWM motor drivers. 2 3 2 3.Gate 2.Drain 3.Source 2 3 FEATURES 20A,600V,R DS(on)(typ.) =0.28Ω@V GS =0V Low gate charge Low Crss Fast switching Improved dv/dt capability TO-220F-3L TO-3P NOMENCLATURE SVF XNEXXX Silan VDMOS Code of F-Cell process Nominal current,using or 2 digits: Example:4 denotes 4A, 0 denotes 0A, 08 denotes 0.8A N denotes N Channel Package information. Example:F:TO-220F; PN:TO-3P. Nominal Voltage,using 2 digits Example: 60 denotes 600V, 65 denotes 650V. Special Features indication, May be omitted. Example: E denotes embeded ESD structure ORDERING INFORMATION Part No. Package Marking Hazardous Substance Control Packing SVF20N60F TO-220F-3L SVF20N60F Pb free Tube SVF20N60PN TO-3P 20N60 Pb free Tube http: //www.silan.com.cn Page of 8
ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted) Characteristics Symbol Ratings SVF20N60F SVF20N60PN Unit Drain-Source Voltage V DS 600 V Gate-Source Voltage V GS ±30 V Drain Current T C=25 C I D 20.0 T C=00 C 2.6 Drain Current Pulsed I DM 80.0 A Power Dissipation(T C=25 C) -Derate above 25 C P D 74 258 W 0.59 2.06 W/ C Single Pulsed Avalanche Energy(Note ) E AS 433 mj Operation Junction Temperature Range T J -55~+50 C Storage Temperature Range T stg -55~+50 C A THERMAL CHARACTERISTICS Ratings Characteristics Symbol SVF20N60F SVF20N60PN Unit Thermal Resistance, Junction-to-Case R θjc.69 0.48 C/W Thermal Resistance, Junction-to-Ambient R θja 62.5 50 C/W ELECTRICAL CHARACTERISTICS (Tc=25 C unless otherwise noted) Characteristics Symbol Test conditions Min. Typ. Max. Unit Drain -Source Breakdown Voltage B VDSS V GS=0V, I D=250µA 600 -- -- V Drain-Source Leakage Current I DSS V DS=600V, V GS=0V -- --.0 µa Gate-Source Leakage Current I GSS V GS=±30V, V DS=0V -- -- ±00 na Gate Threshold Voltage V GS(th) V GS= V DS, I D=250µA 2.0 -- 4.0 V Static Drain- Source On State Resistance R DS(on) V GS=0V, I D=0.0A -- 0.28 0.35 Ω Input Capacitance C iss -- 2708 -- V DS=25V, V GS=0V, Output Capacitance C oss -- 293 -- f=.0mhz Reverse Transfer Capacitance C rss -- 6.6 -- pf Turn-on Delay Time t d(on) -- 27.0 -- Turn-on Rise Time t r V DD=300V, I D=20.0A, R G=25Ω, -- 44.0 -- Turn-off Delay Time t d(off) (Note2,3) -- 82.0 -- ns Turn-off Fall Time t f -- 44.4 -- Total Gate Charge Q g V DS=480V, I D=20.0A, -- 47.45 -- Gate-Source Charge Q gs V GS=0V, -- 4.3 -- nc Gate-Drain Charge Q gd (Note 2,3) -- 4.5 -- http: //www.silan.com.cn Page 2 of 8
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Characteristics Symbol Test conditions Min. Typ. Max. Unit Continuous Source Current I S Integral Reverse P-N Junction -- -- 20.0 Pulsed Source Current I SM Diode in the MOSFET -- -- 80.0 A Diode Forward Voltage V SD I S=20.0A,V GS=0V -- --.4 V Reverse Recovery Time T rr I S=20.0A,V GS=0V, -- 630. -- ns Reverse Recovery Charge Q rr di F/dt=00A/µs (Note 2) -- 8.9 -- µc. L=30mH, I AS=9.45A, V DD=00V, R G=25Ω, starting T J=25 C; 2. Pulse Test: Pulse width 300μs,Duty cycle 2%; 3. Essentially independent of operating temperature. http: //www.silan.com.cn Page 3 of 8
TYPICAL CHARACTERISTICS Drain Current ID(A) 00 0 Figure. On-Region Characteristics Figure 2. Transfer Characteristics Variable VGS=4.5V VGS=5V VGS=5.5V VGS=6V VGS=7V VGS=8V VGS=0V VGS=5V.250µS pulse test 2.T C=25 C 0. 0. 0 00 Drain Current ID(A) 00 0 0. -55 C 25 C 50 C.250µS pulse test 2.V DS=50V 0 2 3 4 5 6 7 8 9 0 0.35 Drain-Source Voltage V DS (V) Figure 3. On-Resitance Variation vs. Drain Current and Gate Voltage Gate-Source Voltage V GS (V) Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 00 Drain-Source On-Resistance RDS(ON)(Ω) 0.33 0.3 0.29 0.27 V GS=0V V GS=20V Note: T J=25 C Reverse Drain Current IDR(A) 0-55 C 25 C 50 C.250µS pulse test 2.V GS=0V 0.25 0 4 8 2 6 20 Drain Current I D (A) 0. 0.2 0.4 0.6 0.8.0.2.4 Source-Drain Voltage V SD (V) Capasistance(pF) 6000 5000 4000 3000 2000 000 Figure 5. Capacitance Characteristics Ciss Coss Crss Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd. V GS=0V 2. f=mhz Gate-Source Voltage VGS(V) 2 0 8 6 4 2 Figure 6. Gate Charge Characteristics V DS=480V V DS=300V V DS=20V Note: I D=20.0A 0 0. 0 00 Drain-Source Voltage V DS (V) 0 0 0 20 30 40 50 Total Gate Charge Qg(nC) 60 http: //www.silan.com.cn Page 4 of 8
TYPICAL CHARACTERISTICS(continued).2 Figure 7. Breakdown Voltage Variation vs. Temperature 3.0 Figure 8. On-resistance Variation vs. Temperature Drain-Source Breakdown Voltage(Normalized) BVDSS..0 0.9. V GS=0V 2. I D=250µA 0.8-00 -50 0 50 00 50 200 Drain-Source On-Resistance (Normalized) RDS(ON) 2.5 2.0.5.0 0.5. V GS=0V 2. I D=0.0A 0.0-00 -50 0 50 00 50 200 Junction Temperature T J ( C) Junction Temperature T J ( C) 0 2 Figure 9-. Max. Safe Operating Area(SVF20N60F) 00µs 0 2 Figure 9-2. Max. Safe Operating Area(SVF20N60PN) 00µs Drain Current - ID(A) 0 0 0 0-0 -2 Operation in This Area is Limited by RDS(ON) DC.TC=25 C 2.Tj=50 C 3.Single Pulse 0ms ms 0 0 0 0 2 0 3 Drain Current - ID(A) 0 0 0 0-0 -2 Operation in This Area is Limited by RDS(ON).TC=25 C 2.Tj=50 C 3.Single Pulse DC 0ms ms 0 0 0 0 2 0 3 Drain Source Voltage - V DS (V) Drain Source Voltage - V DS (V) 20 Figure 0. Maximum Drain Current vs. Case Temperature 6 Drain Current - ID(A) 2 8 4 0 25 50 75 00 25 50 Case Temperature T C ( C) http: //www.silan.com.cn Page 5 of 8
TYPICAL TEST CIRCUIT Gate Charge Test Circuit & Waveform 2V 200nF 50KΩ 300nF Same Type as DUT VDS VGS 0V Qg Qgs Qgd VGS DUT 3mA Charge Resistive Switching Test Circuit & Waveform VGS VDS RL VDD VDS 90% 0V RG DUT 0% VGS td(on) tr ton td(off) tf toff Unclamped Inductive Switching Test Circuit & Waveform VDS L BVDSS EAS = 2 LI AS 2 BVDSS BVDSS - VDD ID IAS 0V tp RG DUT VDD VDD ID(t) VDS(t) tp Time http: //www.silan.com.cn Page 6 of 8
PACKAGE OUTLINE TO-220F-3L UNIT: mm 4.42 4.70 2.30 2.54 2.50 2.76 0.70 0.80 0.35 0.50 5.25 5.87 5.30 5.75 9.30 9.80 9.73 0.6 2.54BCS 6.40 6.68 2.48 2.98 / / 3.00 3.8 3.05 3.30 5.02 2.80 3.0 0.90.47 0.65 6.25 6.30 0.30 0.36 7.00 3.48 3.50 3.40 3.55 3 TO-3P UNIT: mm 5.5±0.50 8.5~0.0.2~.80 9.5~2.0 Φ 3.0~3.7 39.0~4.5 3.0±0.3 2.6~3.8 2.0±0.3.2~2.0.0±0.3 0.6±0.2 5.45TYP 4.4~5.2 9.5~20.0 http: //www.silan.com.cn Page 7 of 8
Disclaimer : Silan reserves the right to make changes to the information herein for the improvement of the design and performance without prior notice! Customers should obtain the latest relevant information before placing orders and should verify that such information is complete and current. All semiconductor products malfunction or fail with some probability under special conditions. When using Silan products in system design or complete machine manufacturing, it is the responsibility of the buyer to comply with the safety standards strictly and take essential measures to avoid situations in which a malfunction or failure of such Silan products could cause loss of body injury or damage to property. Silan will supply the best possible product for customers! Part No.: SVF20N60F/PN Document Type: Datasheet Copyright: Website: http: //www.silan.com.cn Rev.:.6 Author: Yin Zi. Modify the EAS test condition. Rev.:.5 Author: Yin Zi. Modify the package information of TO-220F-3L Rev.:.4 Author: Yin Zi. Modify the thermal characteristics Rev.:.3 Author: Zhang Kefeng. Modify the ordering information Rev.:.2 Author: Zhang Kefeng. Change the schematic diagram of MOS Rev.:. Author: Zhang Kefeng. Add the package of TO-3PN Rev.:.0 Author: Zhang Kefeng. Initial release http: //www.silan.com.cn Page 8 of 8