I D, Drain Current (A) Applications l Brushed Motor drive applications l BLDC Motor drive applications l Battery powered circuits l Halfbridge and fullbridge topologies l Synchronous rectifier applications l Resonant mode power supplies l ORing and redundant power switches l DC/DC and AC/DC converters l DC/AC Inverters G PD 96436 StrongIRFET D V DSS HEXFET Power MOSFET R DS(on) typ. max. I D (Silicon Limited) S I D (Package Limited) D 4V.25mΩ.6mΩ 37Ac 95A Benefits l l l l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability LeadFree S D G TO22AB G D S Gate Drain Source Ordering Information Base part number Package Type Standard Pack Complete Part Number Form Quantity TO22 Tube 5 R DS(on), Drainto Source On Resistance (m Ω) 5 35 4 I D = A 3 Limited By Package 25 3 2 2 5 5 2 4 6 8 2 4 6 8 2 V GS, Gate to Source Voltage (V) 25 5 75 25 5 75 T C, Case Temperature ( C) Fig. Typical OnResistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature www.irf.com 4/2/2
Absolute Maximum Ratings Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 37c I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 224c I D @ T C = 25 C Continuous Drain Current, V GS @ V (Wire Bond Limited) 95 A I DM Pulsed Drain Current d 27 P D @T C = 25 C Maximum Power Dissipation 294 W Linear Derating Factor.96 W/ C V GS GatetoSource Voltage ± 2 V T J Operating Junction and 55 to 75 T STG Storage Temperature Range Soldering Temperature, for seconds (.6mm from case) Mounting torque, 632 or M3 screw 3 lbfx in (.Nx m) C Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy e 49 mj E AS (tested) Single Pulse Avalanche Energy Tested Value k 8 I AR Avalanche Currentd See Fig. 4, 5, 22a, 22b A E AR Repetitive Avalanche Energy d mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc JunctiontoCase j.5 R θcs CasetoSink, Flat Greased Surface.5 R θja JunctiontoAmbient 62 C/W Static @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 4 V V GS = V, I D = 25μA ΔV (BR)DSS /ΔT J Breakdown Voltage Temp. Coefficient.32 V/ C Reference to 25 C, I D = 5mAd R DS(on) Static DraintoSource OnResistance.25.6 mω V GS = V, I D = A g.8 mω V GS = 6.V, I D = 5A g V GS(th) Gate Threshold Voltage 2.2 3. 3.9 V V DS = V GS, I D = 25μA I DSS I GSS DraintoSource Leakage Current GatetoSource Forward Leakage. GatetoSource Reverse Leakage 5 μa na R G Internal Gate Resistance 2. Ω V DS = 4V, V GS = V V DS = 4V, V GS = V, V GS = 2V V GS = 2V Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 95A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN4) Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by T Jmax, starting, L =.99mH R G = 5Ω, I AS = A, V GS =V. I SD A, di/dt 37A/μs, V DD V (BR)DSS, T J 75 C. Pulse width 4μs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from to 8% V DSS. ˆ R θ is measured at T J approximately 9 C. This value determined from sample failure population, starting, L=.99mH, R G = 5Ω, I AS = A, V GS =V. 2 www.irf.com
Dynamic @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance 2 S Q g Total Gate Charge 26 324 Q gs GatetoSource Charge 5 Q gd GatetoDrain ("Miller") Charge 77 Q sync Total Gate Charge Sync. (Q g Q gd ) 39 t d(on) TurnOn Delay Time 24 t r Rise Time 68 t d(off) TurnOff Delay Time 5 t f Fall Time 68 C iss Input Capacitance 82 C oss Output Capacitance 54 C rss Reverse Transfer Capacitance 4 C oss eff. (ER) Effective Output Capacitance (Energy Related) 88 C oss eff. (TR) Effective Output Capacitance (Time Related) 228 Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current MOSFET symbol 37c (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 27 (Body Diode)Ãd pn junction diode. V SD Diode Forward Voltage.9.3 V, I S = A, V GS = V g dv/dt Peak Diode RecoveryÃfà 5. V/ns T J = 75 C, I S = A, V DS = 4V t rr Reverse Recovery Time 38 V R = 34V, ns 37 I F = A Q rr Reverse Recovery Charge 5 di/dt = A/μs g nc 5 I RRM Reverse Recovery Current.9 A nc ns pf Conditions V DS = V, I D = A I D = A V DS =2V V GS = V g I D = A, V DS =V, V GS = V V DD = 2V I D = 3A R G = 2.7Ω V GS = V g V GS = V V DS = 25V ƒ =. MHz, See Fig. 5 V GS = V, V DS = V to 32V i, See Fig. 2 V GS = V, V DS = V to 32V h D S www.irf.com 3
C, Capacitance (pf) V GS, GatetoSource Voltage (V) I D, DraintoSource Current (A) R DS(on), DraintoSource On Resistance (Normalized) I D, DraintoSource Current (A) I D, DraintoSource Current (A) VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V VGS TOP 5V V 8.V 7.V 6.V 5.5V 5.V BOTTOM 4.5V 4.5V 6μs PULSE WIDTH Tj = 25 C.. V DS, DraintoSource Voltage (V) 4.5V 6μs PULSE WIDTH Tj = 75 C. V DS, DraintoSource Voltage (V) Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics 2. T J = 75 C.8.6 I D = A V GS = V. V DS = V 6μs PULSE WIDTH 2 4 6 8 V GS, GatetoSource Voltage (V) Fig 5. Typical Transfer Characteristics.4.2..8.6 6 2 2 6 4 8 T J, Junction Temperature ( C) Fig 6. Normalized OnResistance vs. Temperature V GS = V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd 4. 2.. I D = A V DS = 32V V DS = 2V C iss 8. 6. Crss C oss 4. 2... 5 5 2 25 3 V Q G, Total Gate Charge (nc) DS, DraintoSource Voltage (V) Fig 7. Typical Capacitance vs. DraintoSource Voltage Fig 8. Typical Gate Charge vs. GatetoSource Voltage 4 www.irf.com
R DS (on), Drainto Source On Resistance ( mω) V (BR)DSS, DraintoSource Breakdown Voltage (V) Energy (μj) I SD, Reverse Drain Current (A) I D, DraintoSource Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C Limited By Package msec μsec msec V GS = V Tc = 25 C Tj = 75 C Single Pulse DC...5..5 2. 2.5.. V SD, SourcetoDrain Voltage (V) V DS, DraintoSource Voltage (V) Fig 9. Typical SourceDrain Diode Forward Voltage 5 49 Id = 5.mA Fig. Maximum Safe Operating Area.6.4 V DS = V to 32V 48 47 46.2. 45.8 44.6 43 42 4.4.2 4 6 2 2 6 4 8. 5 5 2 25 3 35 4 45 T J, Temperature ( C ) Fig. DraintoSource Breakdown Voltage V DS, DraintoSource Voltage (V) Fig 2. Typical C OSS Stored Energy 2. 5. V GS = 5.5V V GS = 6.V. 5. VGS = 7.V VGS = 8.V VGS = V. 2 3 4 5 I D, Drain Current (A) Fig 3. Typical OnResistance vs. Drain Current www.irf.com 5
E AR, Avalanche Energy (mj) Avalanche Current (A) D =.5...2..5.2. Thermal Response ( Z thjc ) C/W SINGLE PULSE. ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc. E6 E5.... t, Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, JunctiontoCase Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 5 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤj = 25 C and Tstart = 5 C..E6.E5.E4.E3.E2.E tav (sec) Fig 4. Typical Avalanche Current vs.pulsewidth 6 5 4 3 2 TOP Single Pulse BOTTOM.% Duty Cycle I D = A Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN5 at www.irf.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 3) 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 6 www.irf.com
Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) 4.5 I F = 6A 3.5 8 V R = 34V 6 2.5.5 ID = 25μA ID =.ma ID =.A 4 2.5 75 25 25 75 25 75 225 T J, Temperature ( C ) Fig 6. Threshold Voltage vs. Temperature 2 4 6 8 di F /dt (A/μs) Fig. 7 Typical Recovery Current vs. di f /dt 8 I F = A V R = 34V 24 22 2 8 I F = 6A V R = 34V 6 6 4 4 2 2 8 6 2 4 6 8 di F /dt (A/μs) Fig. 8 Typical Recovery Current vs. di f /dt 4 2 4 6 8 di F /dt (A/μs) Fig. 9 Typical Stored Charge vs. di f /dt 2 6 2 I F = A V R = 34V 8 4 2 4 6 8 di F /dt (A/μs) Fig. 2 Typical Stored Charge vs. di f /dt www.irf.com 7
D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG V DD Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test ReApplied Voltage Body Diode Inductor Current Curent Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 2. Peak Diode Recovery dv/dt Test Circuit for NChannel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 2V V GS tp D.U.T IAS.Ω V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms V DS R D V DS V GS D.U.T. 9% R G V DD VV GS Pulse Width µs Duty Factor. % % V GS t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Current Regulator Same Type as D.U.T. Vds Id 5KΩ Vgs 2V.2μF.3μF V GS D.U.T. V DS Vgs(th) 3mA I G I D Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 8 www.irf.com
TO22AB Package Outline Dimensions are shown in millimeters (inches) TO22AB Part Marking Information EXAMPLE: THIS IS AN IRF LOT CODE 789 ASSEMBLED ON WW 9, 2 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead Free" INTERNATIONAL RECTIFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DATE CODE YEAR = 2 WEEK 9 LINE C TO22AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Qualification information Qualification level Moisture Sensitivity Level RoHS compliant TO22AB Industrial (per JEDEC JESD47F guidelines) N/A (per JE DE C JS TD2D ) Yes Qualification standards can be found at International Rectifier s web site: http://www.irf.com/productinfo/reliability/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: http:www.irf.com/whotocall/salesrep/ Applicable version of JEDEC standard at the time of product release. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: N Sepulveda., El Segundo, California 9245, USA Tel: (3) 25275 TAC Fax: (3) 252793 Visit us at www.irf.com for sales contact information. 4/22 www.irf.com 9