Inernaional Journal of Engineering Research & Technology (IJERT) Design and Developmen of Zero Volage Swiched Full Bridge 5 kw DC Power Supply ISSN: 2278-181 Vol. 3 Issue 5, May - 214 S. K. Agrawal, S. V. Nakhe Laser Sysems Engineering Secion, Raja Ramanna Cenre for Advanced Technology, Indore, India Absrac: Design and implemenaion of a high power, high volage, consan frequency, full bridge phase shif pulse widh modulaion converer in which zero volage swiching of all he acive swiches over he enire load range is mainained by using auxiliary circui componens is presened. The auxiliary circui componens used are, wo capaciors ha are conneced in series across he DC power rail and wo inducors ha are conneced in series wih he ransformer of he converer. The wo capaciors ac as a volage divider providing midpoin volage source and he wo inducors supply addiional curren reinforcing he primary curren during he ransiion inervals and increasing he energy available o achieve he zero volage swiching (ZVS). A prooype converer based on his opology is developed ha delivers 45V a 5 kw oupu from 56V dc inpu, wih efficiency greaer han 94%. Experimenal & simulaion resuls for he converer are presened. Keywords Full bridge converer, phase shif pulse widh modulaion (PSPWM) sof swiching, zero volage swiching (ZVS), phase shif (PS), passive auxiliary circui, ZVS range I. INTRODUCTION In medium o high power DC-DC converer applicaions, full bridge phase shif pulse widh modulaion (FB-PSPWM) converers are widely used because of is fixed swiching frequency ZVS operaion, high efficiency, low EMI, relaively small circulaing energy, uilizaion of oupu parasiic capaciance of he swiches and uilizaion of leakage inducance of he ransformer [1-3]. However, convenional FB-PSPWM converer has main drawback of limied range of operaion over which he ZVS can be achieved. ZVS of he lef leg swiches in he convenional FB-PSPWM converer mainly depend on he energy sored in he leakage inducance of he ransformer. A ligh load, energy sored in he leakage inducance of he ransformer is no sufficien o charge/discharge he swich capaciances and his leads o loss of ZVS condiion. The loss of ZVS a ligh loads leads o 1) High swiching losses 2) Higher EMI due o high di/d of he snubber discharging circui. Therefore, i is desirable o mainain ZVS of he swiches over he enire range of operaion. Several echniques have been presened in lieraure o increase he ZVS range of convenional FB-PSPWM. Use of higher inducance in series wih he ransformer is repored o increase ZVS range bu i leads o higher duy cycle loss as well as ringing across he secondary side recifier diodes [4]. In his design higher urns raio of ransformer is required o ge he desired oupu volage, his resuls in higher primary refleced curren and higher conducion loss in swiches. In second echnique a saurable reacor is used in series wih he primary winding or wih he secondary side diodes [5]. The advanage of he FB-PSPWM DC-DC converer incorporaing saurable resonan inducor is ha wider range of operaion under ZVS is mainained wihou significan increase in conducion loss of he swiches. However, o implemen he saurable inducor large size core is required. The hird echnique repored o increase he ZVS for wider load range is by incorporaing a commuaing inducor and a clamp diode for he bridge swiches [6]. However in his opology here is requiremen of snubber o overcome he prevailing commuaion loss. The fourh echnique o increase he ZVS range in FB-PSPWM DC-DC converer is o use a wo winding commuaing inducor clamped o he oupu and overcome he problem in he echnique menioned in [6] by enabling recovery of he excess of energy direcly o he load [7]. Neverheless, his soluion implies a larger, heavier and more complicaed converer wih inheren cos increase. Anoher mehod for wider ZVS range is use of auxiliary LCC circui wih convenional FB-PSPWM DC-DC converer [8, 9, 1]. The auxiliary circui consiss of a volage divider and an inducor conneced beween he middle poin of volage capacior divider and he middle poin of he lef leg of convenional FB-PSPWM converer. I is observed ha he righ leg swiches leaves ZVS a ligher load compare o he lef leg swiches. I is desired o ge ZVS for boh he legs o minimize he urn-on losses including he no load condiion. I is indicaed ha he ZVS for he boh legs of FB-PSPWM DC- DC converer, can be achieved if one more inducor is used in addiion o LCC circuiry described in [8,9]. This auxiliary circui is an add-on o he convenional FB-PSPWM converer, which does no aler he power circui. This paper repors he design of high power (5 kw), high volage (45 V) FB-PSPWM converer based on LLCC auxiliary circuiry o exend he ZVS for enire load range for all he swiches of full bridge wihou increase in he duy cycle loss. This opology is desired in applicaions where he oupu volage is required o be adjusable and he load power is variable over a wide range. Mos of he published work on IJERTV3IS5239 www.ijer.org 212
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 analysis & design of FB-PSPWM converer is confined o low power (up o 3 kw) converers or o low oupu volage (up o 38 V) converers. The FB-PSPWM converer repored here is raed for high volage and high power oupu ( 45 V, 5 kw) wih widely variable oupu volage ( 1 o 1%). Descripion of power circui of he FB-PSPWM converer wih auxiliary circui is presened in Secion II. Modes of operaion of he converer are described in Secion III. Specific design consideraions are covered in secion IV. Simulaion and experimenal resuls are presened in secion V, followed by conclusions in secion VI. II. FB-PSPWM CONVERTER WITH AUXILIARY CIRCUIT Power circui diagram of he FB-PSPWM converer wih LLCC auxiliary circui is shown in Fig.1. Main FB-PSPWM converer is consiued by four MOSFET M 1 -M 4 swiches, four ani parallel diodes D 1 -D 4, and four snubber capaciors C 1 -C 4. The ani-parallel diodes D 1 -D 4 across he M 1 -M 4 are he inrinsic diodes of he respecive swiches. Capacior C 1 -C 4 across he MOSFET M 1 -M 4 are he inernal oupu parasiic capaciances. The average capaciance value for each of he C 1 -C 4 is C and given as [1, 3] C = 4 Coss (1) 3 where C OSS is a depleion-dependan capaciy whose value depends upon he impressed drain -source volage across he respecive MOSFET. Transformer TR has primary o secondary urn raio of n:1. Toal leakage inducance of he ransformer referred o primary is L lk. The volage across he primary winding of ransformer is V AB and he volage across he secondary winding is V S. D r1 - D r4 are he diodes on he secondary side forming full bridge recifier circui. Inducor L f and capacior C f form he oupu filer. In convenional FB-PSPWM converer he energy sored in he leakage inducor is used o charge/discharge he snubber capaciors, and he load range under which ZVS of he swiches is mainained srongly depends on he value of he leakage inducance. Due o leakage inducance, here is duy cycle loss D and i is given as [3] D 4nL lk Io (2) V d Ts where T s is swiching period of converer, V d is he inpu DC volage, I o is oupu dc ( average) load curren. The auxiliary LLCC circuiry ha provides ZVS over he enire load range consiss of wo inducor L 1 & L 2 and wo capaciors C d1 & C d2. The wo capaciors wih equal capaciances are conneced in series, across he DC power rail V d and his forms a volage divider circui. Ou of he wo auxiliary inducors, one inducor L 1 is conneced beween middle poin A of lef leg and he middle poin M of capacior divider. The second inducor L 2 is conneced beween middle poin B of righ leg and he middle poin M of he capacior divider. RCD clamp circui is used o reduce ringing and volage overshoo across he diode recifier, arising because of resonance beween he sray capaciance (due o winding & diode) and he leakage inducance of he ransformer [1]. III. MODES OF OPERATION Key waveforms of he FB-PSPWM converer wih LLCC auxiliary circui are shown in Fig.2. In hese waveforms he volages V g1 -V g4 are he gae volage signals for swiches M 1 - M 4 respecively and have approximaely 5% duy cycle. These signals are generaed using sandard Phase shif conroller UCC3895 [11]. The swiches of lef leg (M 1 & M 2 ) and righ leg (M 3 & M 4 ) urn-on and off alernaively wih a small dead ime beween he gae pulses of each leg o allow he capacior o discharge before he swiches are made on. The phase shif beween he wo legs deermine he operaing duy cycle of converer. The operaion of converer presened in Fig.1 is explained for posiive cycle of primary curren wih five modes. Mode I or power delivery mode, Mode II or powering o freewheeling ransiion mode, Mode III or freewheeling inerval, Mode IV or freewheeling o powering ransiion inerval and Mode V or linear ransiion mode. Mode I: Power delivery mode ( < 1 ): During his mode boh M 1 and M 4 are in conducion and D r1 & D r4 are recifying. The ransformer primary volage is V d and he primary curren increases wih he slope proporional o he oal inducance presen in he circui. In his inerval power is delivered o load, hence known as power delivery inerval. Primary curren during his inerval is given by i p = V d nv Leq + I p (3) where I p () is he iniial value of he primary curren and L eq = L lk + n 2 L f The mode inerval ends when he primary curren reaches o is peak value I 1. i p 1 = I 1 (4) During his mode he erminal A of auxiliary inducor L 1 is conneced o V d and volage across L 1 is -V d /2 and curren hrough L 1 decreases unil he MOSFET M 1 urns off. Similarly B erminal of inducor L 2 is conneced o ground, hence he volage across L 2 is V d /2 and curren increases and reaches o is peak value I L2 a he end of his inerval i.e. when M 4 urns-off. The auxiliary circui acs as independen circui wihou influencing he primary curren. Currens hrough auxiliary inducor L 1 & L 2 are given as: i L1 = V d 2L + I L1 (5) 1 V d i L2 = 2L + I L2 (6) 2 where I L1 (), I L2 () are he iniial value of he currens of auxiliary inducor L 1 & L 2 respecively. Curren hrough he inducor L 2 a he end of his mode is V d T S i L2 1 = 4L 2 2 RL = I L2 (7) Or I L2 V d. T S ; 8L RL T S (8) 2 2 RL is known as righ leg ransiion inerval or powering o freewheeling ransiion inerval. The drain curren of M 1 is sum of he primary curren and auxiliary inducor curren I L1. Similarly he drain curren of M 4 is he sum of he primary curren and auxiliary curren I L2. IJERTV3IS5239 www.ijer.org 213
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 Lef Leg Righ Leg L f I O V d C d1 C d2 M V g1 M 1 D 1 C 1 L 1 i L1 A V g2 M 2 D 2 C 2 i p L 2 i L2 V g3 M 3 D 3 C 3 L lk B M 4 D V 4 C 4 g4 TR n:1 D r1 D r3 + V S - D r2 D r4 D crc C f RCD Clamp Circui C C R L + - V o Fig.1 Full bridge phase shif PWM DC-DC converer wih auxiliary LLCC circui V g1 V g2 V g3 T S V g4 V AB i p I 1 V d LL RL V S i L1 i L2 I L2 I L1 DTs/2 1 2 3 4 5 T s + Fig.2 Key waveforms of he Full bridge phase shif PWM DC-DC converer wih he auxiliary circui IJERTV3IS5239 www.ijer.org 214
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 Mode II: Powering o freewheeling ransiion mode ( 1 < 2 ): This mode sars when MOSFET M 4 urns off a ime 1. As M 4 urns off, drain curren of M 4 is ransferred o C 3 & C 4. Since M 1 is conducing and M 4 is off, ransformer coninues o see he posiive volage V d during his inerval. Hence D r1 & D r4 are sill conducing as in mode I. The duraion of his mode is small, so he primary curren and he auxiliary inducor curren I L2 is almos consan. Hence he charging of C 4 and discharging of C 3 akes place linearly. The ime required o complee charge/discharge is given as RL V d. ( C 3 + C 4 ) or I 1 + I RL 2. V d. C (9) L2 I 1 + I L2 Since M 1 is sill on, he curren in L 1 is given by eq.(5). This mode ends when he capacior C 3 volage reaches o zero and diode D 3 sar conducing a = 2 wih ZVS. Mode III: Freewheeling mode ( 2 < 3 ): This mode sars wih zero volage across capacior C 3 and diode D 3 iniiaes is conducion. Primary curren freewheels hrough he MOSFET M 1 & diode D 3. The volage across he primary of ransformer V AB is zero. The recifier diodes D r1 & D r4 are sill in conducion sae. The circui eners he passive mode i.e. no power is ransferred from inpu o oupu. This mode ends when gae pulse of M 1 is removed. Primary curren during his mode is given by i p = nv Leq 2 + I p 1 (1) where I p (1) is he iniial value of he primary curren. As he M 1 is on, curren in L 1 is sill given by he equaion (5). I reaches o is peak value I L1 a he end of he inerval and given by. Or i L1 3 = V d 4L 1 T S 2 LL = I L1 (11) I L1 V d. T S ; for 8L LL T S (12) 1 2 where LL is known as lef leg ransiion inerval or freewheeling o powering ransiion inerval The curren in L 2 sar decreasing from is peak value and given as i L2 = V d 2L 2 3 + I L2 (13) Mode IV: Freewheeling o powering ransiion mode ( 3 < 4 ): This mode sars a ime 3 when he gae signal of M 1 is removed. A his sage D 3 is sill conducing and primary curren is same as i was in mode III, and flows hrough C 1 & C 2. During his mode, conrary o wha happened in mode II, all four diodes of recifier are on. Therefore energy sored in he filer inducor does no conribue o charge/ discharge of C 1 /C 2. Because of his reason i is very difficul o obain ZVS in he convenional converers for ligh load. However in he converer design presened here, addiional energy is sored in inducor L 1 in mode I o III, ha helps o achieve ZVS. Thus he oal energy (W L ) available o charge/discharge he capacior C 1 /C 2 is he energy sored in leakage inducor of ransformer and energy sored in he auxiliary inducor L 1. W L = (I 4) 2 2 ( L lk ) + (I L1) 2 ( L 2 1 ) (14) where I 4 is he primary curren a = 4 and I L1 is he peak curren of he auxiliary inducor L 1. This mode ends when he capacior C 1 volage reaches o V d and capacior C 2 volage reaches o zero and diode D 2 sars conducing a ime 4. Curren in inducor L 2 during his mode is sill given by eq. (13). Mode V: Linear mode ( 4 < 5 ): A ime 4 diode D 2 iniiae is conducion. In his mode primary curren changes is polariy. Till he primary curren reaches o zero, diode D 2 & D 3 conduc, hereafer M 2 & M 3 sar conducing. Primary curren in his inerval is given as i p = V d Leq 4 + I p 2 (15) where I p (2) is he iniial value of he primary curren. In his mode erminal A of auxiliary indicor L 1 is conneced o ground as M 2 is on. The volage across he L 1 is V d /2. The curren in L 1 sars increasing and given by i L1 = V d 2L 4 + I L1 1 (16) 1 where I L1 (1) is he iniial value of he primary curren. The ime inerval of his mode represens he duy cycle loss. In order o reduce he duy cycle loss he slope of primary curren should be high i.e. leakage inducance should be minimum. In convenional PSPWM converer, leakage inducance needs o be kep large o sore sufficien energy o achieve ZVS of swiches for wider range while in he proposed converer, he value of leakage inducance is small and limied by consrucion of ransformer which leads o lower duy cycle loss. Furher for he negaive half cycle of primary curren hese five modes of operaions are similarly repeaed and he full cycle is compleed. IV. DESIGN CONSIDERATIONS Zero volage swiching for he lef leg swiches (M 1 & M 2 ) always akes place when he oupu curren source is freewheeling hrough he oupu diodes. Thus he available energy, o perform he discharge and charge of capacior C 1 /C 2 wihin lef leg inerval LL, is sored in auxiliary inducor L 1 and he leakage inducor. Thus he condiion for achieving ZVS for his leg is, sored energy in inducors should be greaer han he energy sored in he capaciors C 1 and C 2. Energy sored in Capaciors C 1 and C 2 is W CR = 1 2 ( C 1 + C 2 ). (V d ) 2 = C. (V d ) 2 (17) Energy sored in inducors L lk and L 1 is W L = (I /n) 2. L 2 lk + (I L1) 2. L 2 1 (18) In he expression of sored energy in inducors, he firs erm represens sored energy in he leakage inducor due o load curren and he second erm represen energy sored in auxiliary inducor L 1 due o curren I L1 in i. Hence o achieve ZVS IJERTV3IS5239 www.ijer.org 215
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 (I /n) 2 L 2 lk + (I L1) 2 L 2 1 C(V d ) 2 (19) From equaion (12) & equaion (19) (I /n) 2 L 2 lk + (V d ) 2 (T S ) 2 C(V 128L d ) 2 (2) 1 Design effors should be made o minimize he leakage inducance such ha here is minimum duy cycle loss. This also resuls in minimum volage overshoo and ringing on he secondary side. To achieve ZVS for he lef leg swiches independen of load, energy sored in inducor L 1 mus be higher han he energy sored in capacior C 1 & C 2 hence condiion for achieving ZVS independen of he load can be obained by puing I = in eq. (2) L 1 (T S) 2 (21) 128C Anoher condiion for selecion of auxiliary inducor L 1 is based on he ime inerval LL allowed o charge / discharge he snubber capacior L 1 T S LL (22) 16C Hence, value of L 1 ha provide he ZVS of lef leg swiches for enire load range can be obained by saisfying he eq. (21) & (22). Zero volage swiching for righ leg swiches (M 3 & M 4 ) akes place when he refleced oupu curren in primary is presen. The oal curren which is available o charge and discharge he capacior C 3 /C 4 linearly wihin righ leg inerval RL is sum of he peak primary curren I 1 and auxiliary inducor curren I L2. Condiion for achieving ZVS for he righ leg swiches is I 1 + I L2 (C 3 + C 4 )V d (23) RL Hence o ensure he ZVS for righ leg swiches independen of load, value of I L2 is given as I L2 (C 3 + C 4 ) V d ; or I L2 2CV d (24) RL RL The value of L 2 for achieving ZVS for righ leg swiches independen of load can be obained by using eq. (24) & (8) and given as L 2 T S RL 16C Oupu Volage of he proposed converer is (25) V = D eff V d n (26) D eff is effecive duy cycle of he converer and given as D eff = D D LL RL (27) where D is he duy raio of he primary volage of ransformer. V. SIMULATION & EXPERIMENTAL RESULTS To verify he proposed LLCC auxiliary circui, a 5 kw DC-DC converer is designed o mee he following specificaions: Inpu volage V d = 56 V, (sandard full wave recified volage of 415 V, 3 phase), adjusable oupu volage, Vo = -45 V DC, swiching frequency f s = 5 khz and ZVS for -1% of full load. The main parameers and componen values used for simulaion as well as in he experimenal seup can be obained from he design procedure presened in secion IV and [1,3]. Parameers and componens based on he specificaions for he FB-PSPSWM dc-dc converer under consideraion are given in able I. TABLE I : Parameers and componens of he simulaion and experimenal circui Componen/Parameer M 1 - M 4 D r1 - D r4, D c TR Value IXFN44N8 DSEI2x61-1b Turn raio =.83:1, Using four Mn-Zn U 93/76/3 ferrie core Leakage Inducance L lk 5 µh C 1 -C 4 LL, RL L f 1729 pf 7 ns 1.8 mh C f 5 µf L 1 35 µh L 2 35 µh C d1,c d2 1 µf R c C c 1 kω.47µf The simulaed and experimenal waveforms of primary curren of he ransformer a load curren of 1.6 A and a inpu volage of 56 V wih and wihou auxiliary circui are shown in Fig.3a and Fig.3b respecively. From resuls i is clear ha hese waveforms are idenical and hence i is confirmed ha here is no addiional duy cycle loss wih he auxiliary circui. 2 1-1 I(TX1:1) Wih auxiliary inducor I(TX1:2) Wihou auxiliary inducor -2 1.8ms 1.81ms 1.82ms I(TX1:1) I(TX2:1) Time Fig.3a: Simulaed waveform for primary curren of ransformer a full load wih and wihou auxiliary circui IJERTV3IS5239 www.ijer.org 216
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 swiching losses. Under his condiion he swich will damage and o proec i swiches wih higher curren raing are required. 2 1 Fig.3b: Experimenal waveform of primary curren a full load of ransformer wih (Red) and wihou (Yellow) auxiliary inducors; X axis (5µs/div), Y axis (5A/div) I(M2:d) V(M2:d)/1 2 1 The gae-source and drain-source volage waveform of lef leg swich M 2 and righ leg swich M 4 are shown in Fig.4a and 4b. The waveforms confirm he ZVS operaion of all he swiches, as he gae-source volage appears afer he drainsource volage drops o zero. 1.8ms 1.81ms 1.82ms I(M4:d) V(M4:d)/1 Time Fig.5: Simualed waveform for drain-source volage and drain curren of MOSFET M 2 & M 4 wihou LLCC auxiliary circui 2 1-1 2 V(M2:d)/1 V(M2:g) 1-11.8ms V(M4:d)/1 V GS of M 2 1.81ms V(M4:g) Time V GS of M 4 1.82ms Fig.4a: Simualed waveform for gae-source volage V GS (5V/div) and drain-source volage MOSFET M 2 & M 4 Experimenal waveforms of curren hrough auxiliary inducor L 1 and L 2 are shown in Fig.6. The peak curren supplied by inducors is 3.6 A for inpu volage of 56 V. This addiional curren is supplied o ge he ZVS a ligh load or no load for lef leg and righ leg. V GS of M 2 Fig.6: Experimenal waveform for curren in auxiliary inducor L 1 (Upper) & L 2 (Lower); X axis (5µs/div),Y axis (2A/div) V GS of M 4 Fig.4b: Experimenal waveform for gae-source volage V GS (5V/div) and drain-source volage V DS (2V/div) M 2 (Upper) & M 4(Lower); X axis (5µs/div) Simulaed waveforms for drain - source volage and drain curren of MOSFET M 2 & M 4 a 8% of full load curren wihou auxiliary circui are shown in Fig.5. From he waveforms i is clear ha here is no ZVS for he swiches a ligh load. There is high peak curren hrough he swiches a ligh load wihou auxiliary circui which resuls in high The simulaed and experimenal drain source volage and drain curren waveforms of he swich M 2 of lef leg & M 4 of righ leg a 95% of full load and 45V oupu wih LLCC auxiliary circui are shown in Fig.7a and 7b respecively. Similarly he simulaed and experimenal drain source volage and drain curren waveforms of he swich M 2 of lef leg & M 4 of righ leg a 8% of full load and 45V oupu wih LLCC auxiliary circui are shown in Fig.8a and 8b respecively. Since in all he waveform drain curren hrough he swich crosses he zero afer drain-source volage of swich drops o zero. Hence ZVS of all he swiches over he enire conversion range is demonsraed. Oupu recifier waveforms wih or wihou RCD clamp circui are shown in Fig.9 for inpu volage of 385V. Wihou RCD clamp circui, here is overshoo of 38 V on recifier volage, while wih RCD clamp circui he overshoo is 1 V. IJERTV3IS5239 www.ijer.org 217
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 8 4-4 V(M2:d)/1 I(M2:d) 8 4-4 1.8ms 1.81ms 1.82ms V(M4:d)/1 I(M4:d) Time Fig.7a: Simulaed waveforms for drain-source volage and drain curren of MOSFET M 2 & M 4 wih auxiliary circui a 95% of load curren Fig.8b: Experimaenal waveform for drain -source volage and drain curren of MOSFET M 2 & M 4 wih auxiliary circui circui a 8% of full load; X axis (2µs/div),Y axis (V DS: 2V/div, I DS :2A/div). Wihou RCD clamp circui Wih RCD clamp circui Fig.7b: Experimaenal waveform drain-source volage and drain curren of MOSFET M 2 & M 4 auxiliary circui a 95% of load curren; X axis (5µs/div),Y axis (V DS: 2V/div, I DS (1A/div)) 5. -6. 5. I(M2:d) V(M2:d)/1-5. 1.8ms 1.81ms 1.82ms I(M4:d) V(M4:d)/1 Time Fig.8a: Simualed waveforms for drain-source volage and drain curren of MOSFET M 2 & M 4 wih auxiliary circui a 8% of full load. Fig:9: Oupu recifier waveform (X- axis 2V/div, Y-axis 2µs/div) The improvemen of efficiency wih proposed converer compare o convenional PSPWM converer a ligh loads depends on swiching losses saved by achiveing ZVS operaion and he addiional conducion losses in he swiches due o circulaing curren and losses in inducor. The saving in swiching losses achieved by his ZVS scheme will be very effecive for he converers operaing a higher swihcing frequency or in higher power converers (> 5 kw) where he snubber capaciors are large (ens of nano-farads). The efficiency of he FB-PSPWM DC-DC converer developed is around 94% under full power ( 5 kw) oupu condiion ha is wih inpu volage of 56 V, and oupu volage 45 V. The efficency is calculaed based on measuremen of inpu and oupu DC volage and curren. VI. CONCLUSION Design, simulaion and performance of a high power (5 kw), high volage dc o dc converer based on modified Full Bridge Phase- Shif PWM opology is presened here ha provides zero volage swiching of he swiches over he full range of oupu load. The converer has efficiency of 94% a IJERTV3IS5239 www.ijer.org 218
Inernaional Journal of Engineering Research & Technology (IJERT) ISSN: 2278-181 Vol. 3 Issue 5, May - 214 full load under nominal inpu volage. The modificaion over convenional Full Bridge Phase Shif PWM DC-DC converer is use of wo inducors and wo capaciors forming an auxiliary circui. This enables he converer o achieve zero volage swiching of all he swiches independen of load condiions. The simulaion and experimenal resuls of he converer demonsraed zero volage swiching over he enire conversion range wihou any addiional duy cycle loss. The only disadvanage of he proposed converer is small increase of he peak curren in he swiches. This design can be easily adoped for high power DC-DC converer. REFERENCES [1] J.A. Sabae, V.Valkovic, R.B. Ridley, F.C. Lee and B.H. Cho, Design Consideraions for high-volage high-power full-bridge zerovolage-swiching PWM Converer, IEEE APEC, pp.275-284. [2] M. Brunoro and J. L. F. Vieira, "A high performance ZVS full-bridge dc-dc -5V/-1A oiwer supply wih phase-shif conrol", IEEE PESC Conf. Rec., pp.262-268 1997. [3] D. J. Hamo, "A 5W, 5kHz, Full-Bridge, Phase-Shif, ZVS Isolaed DC o DC Converer Using he HIP481A," Applicaion noe 956, Harris, 1995. www.inersil.com/daa/an/an956.pdf [4] B. Andreycak, "Design review: 5W, 4W/in 3 phase shifed ZVT power converer ", Unirode Power Design Seminar SEM-9 [5] G. Hua, F. C. Lee, and M. M. Jovanovic, An improved full-bridge zerovolage-swiched PWM converer using a saurable inducor, IEEE Trans. Power Elecron., vol. 8, no. 4, pp. 53 534, Oc. 1993 [6] Redl, L. Balogh, D.W. Edwards, Swich ransiions in he sofswiching full bridge PWM phase - shif dc/dc converer: analysis and improvemens, Proc. INTELEC 93, pp 35-357 [7] S.Valchev, B. Borges, Improved full bridge zero volage swiched phase shif DC/DC converer using a secondary clamped inducor, IEEE Indusry Elecronics Conference, IECON 95, pp. 258-264 [8] 8. J. P. Beirane and B. V. Borges, A New Full Bridge Zero Volage Swiched Phase Shifed DC-DC Converer wih Enlarged Duy Cycle and ZVS Range, Conference of CONTELE, pp. 136, 21. hp://www.co.i.p/confele21/proc/pap136.pdf [9] D.K Jain, P.K Jain, Haibo Zhang - Analysis and design of an auxiliary commuaed full bridge DC/DC converer opology including he effec of leakage inducance, Telecommunicaions Energy Conference, INTELEC, 22. 24 h Annual Inernaional, pp 24-247 hp://bbs.dianyuan.com/bbs/u/3/1125519.pdf [1] Dheeraj K. Jain, Analysis and design of an auxiliary commuaed full bridge dc/dc converer for low volage and high curren applicaions, M.A.Sc. Thesis, In he Deparmen of Elecrical and Compuer Engineering, Monreal, Canada, December 21. [11] Daashee of BiCMOS Advanced phase shif PWM Conroller UCC3895 hp://www.i.com/li/gpn/ucc3895 IJERTV3IS5239 www.ijer.org 219