DC Sde Current Balancng of Two Parallel Connected Interleaved Three-Phase Three-Swtch Buck-Type Unty Power Factor PWM Rectfer Systems Martna Baumann Venna Unversty of Technology Dept. of Electrcal Drves and Machnes Gusshausstrasse 5 9 / E7 A 4 Venna/Austra phone: 4--588 75 fax: 4--588 798 martna.baumann@tuwen.ac.at Johann W. Kolar Swss Federal Insttute of Technology (ETH) Zurch Power Electronc Systems Laboratory ETH-Zentrum, Physkstr., ETL H CH 89 Zurch/Swtzerland phone: 4--6 84 fax: 4--6 kolar@lem.ee.ethz.ch Abstract In ths paper the actve DC sde current balancng of parallel connected three-phase buck-type rectfer systems s nvestgated usng space vector calculus. Modulaton schemes for the parallel connecton are derved from the swtchng state sequences known for a sngle system and are comparatvely evaluated by dgtal smulaton. The ndependent current AC and DC sde current paths are shown and two control schemes are presented whch allow to balance the DC sde currents of the ndvdual systems. All theoretcal consderatons are verfed by dgtal smulatons. 6 V for an output voltage U = 4 V. By provdng a boost output stage for each system another degree of freedom for balancng the DC current s gven, whch wll be analyzed n a future paper. The parallel connecton of two buck nput stages s shown n Fg.. system I I I Introducton In [] a novel three-phase three-swtch buck-type unty powerfactorrectfer wth ntegrated DC/DC boost converter output stage was presented, whch allows to control the output voltage to U =4Vwthnanunversal nput voltage range of U,ll =(8...48) Vrms lne-to-lne []. A prototype wth a rated output power of 5 kw and a pulse frequency of f P =.4kHz was realzed at the Venna Unversty of Technology. In order to acheve a hgher output power of kw two systems are connected n parallel and controlled n nterleaved manner. Ths shows the followng advantages over a sngle system of hgher power: the nput currents show a more contnuous shape, cancellaton of current harmoncs wth pulse frequency,.e the frst current harmonc does occur attwcethepulsefrequency,f P,andtherefore the cut-off frequency of the nput flter can be shfted to hgher frequences, resultng n a reducton of the nput flterszeandnahgher admssble dynamcs of the output voltage control. There are two possbltes for realzng the parallel connecton of two three-phase buckboost PWM rectfer systems: the two ndvdual systems can be connected at the output termnals (cf. Fg. (a) n []) or one can connect the systems at the collector- and emtter-pns of the boost power transstor,.e., both systems do share a sngle boost output stage. In ths paper all consderatons are lmted to the buck nput stage n order to keep the nvestgaton generally applcable. There, one has to provde a soluton for actve current balancng n case the boost transstor s deactvated,.e. at hgh nput voltages U,ll u, ~ ~ ~ u CF,, U, system II U,,I U,,II u I I I I II u II I II I I I II I I I I II Fg. : Parallel connecton of two three-phase/swtch bucktype PWM rectfer systems. Dfferent strateges for parallelng three-phase buck-type PWM rectfer systems have been nvestgated n the lterature where the power modules were nterleaved n order to reduce current harmoncs and/or the nput flter sze. The parallel connecton of two three-phase/swtch buck-type PWM rectfer systems was treated n [], and [4], but no control concepts for actve DC sde current balancng were gven n ths publcatons. To the knowledge of the authors, actve balancng of the DC currents of paralleled buck-type rectfer systems so far was nvestgated only n [5]. There, modelng and control were derved from a control concept for three-phase boost-type rectfers by measurng the zerosequence current on the AC sde of the rectfer system (cf. [6]). However, as a closer analyss shows, no drect relaton s gven between the AC sde zero-sequence current and DC sde current unbalance,.e. for dfferent unbalance condtons whch would requre dfferent balancng control actons an dentcal zero-sequence current does occur. Therefore, n ths paper a novel and comprehensve analyss of the parallelng of n buck-type rectfer systems s gven based on the space vector calculus consd- U I
erng the occurrence of (n ) ndependent currents on the DC sde. In secton the space vectors whch are avalable for nput current formaton are gven and analyzed concernng ther swtchng state redundancy. Furthermore, the dervaton of space vector modulaton schemes for parallel operaton of two rectfer systems s treated and comparatvely evaluated by dgtal smulatons. Secton descrbes the ndependent currents exstng for the parallel connecton of n buck type rectfer systems, and two control structures are presented whch do allow to control the balancng of the DC sde nductor currents. Furthermore, smulaton results confrmng the proposed control concept are gven n secton 4. Space Vector Modulaton In ths secton, the nput current space vectors whch are avalable at the AC sde of two parallel connected rectfer systems are determned, and dfferent modulaton schemes employng redundant current space vectors are developed.. Rectfer Input Current Space Vectors For the characterzaton of a swtchng state of one system we use the combnaton j =(s Rs Ss T ) of the phase swtchng functons s, = R, S, T. There, the swtchng functon does defne the swtchng state of the correspondng power transstor, where s = denotes the off-state, and s = denotes the on-state. For achevng a resstve fundamental mans behavor,, u,, and for neglectng the fundamental of the nput flter capactor currents (, U,(), ), fundamentals U,(), of the dscontnuous rectfer nput phase currents U, lyng n phase wth the correspondng mans phase voltage u, ( u CF,) havetobe formed. There, only the space vectors lyng n mmedate neghborhood of a gven reference value U of the nput current and/or of a related mans current U are ncorporated nto the swtchng state sequence n order to acheve a devaton as small as possble between the reference and the actual current space vectors. If we, e.g., consder a combnaton of the mans phase voltages u,r > >u,s >u,t () beng vald wthn the mans angle nterval ϕ U (; π 6 ) (denoted as nterval n ths paper), n case the mans voltage u, s defned as u,r = Û cos(ω t), u,s = Û cos(ω t π/), () u,t = Û cos(ω t π/), the current space vectors avalable for current formaton at the nput sde of the parallel connecton of two sngle systemsiandii(cf. Fg.)wthnntervalandthe subsequent mans nterval are compled n Tab. and are depcted n Fg. (cf. Fg. n [7]). The gven space vectors show three dfferent magntudes (apart from the zero vector),.e., the total rectfer systems equals a three-level topology. Current space vectors showng a redundancy of swtchng states concernng current formaton (.e. by dfferent nput currents U,,I and U,,II of the ndvdual systems the same total current space vector U s formed at the nput sde) are marked wth an astersk (). U,A = Ie π/6 U,E = 4 Ie π/6 U,B = 4 Ie π/6 U,F =Ie π/ U,C =I U,G = Ie π/ U,D = Ie π/6 U,H = 4 Ie π/ Tab. : Current space vectors for parallel operaton of two systems for ϕ U (; π/). Redundant space vectors are marked wth an astersk (). U,H U,G U,(FW) I U,D U,F U,A π/ U,E U,B U,C π/6 π/6 R Fg. : Input current space vectors avalable for current formaton n an angle nterval ϕ U (; π ). Redundant space vectors are marked wth an astersk (). E.g., current space vector U,D (cf. Tab. ) can be formed by two dfferent strateges; Strategy I: one system s n actve state (a current space vector U 6= s formed at the nput of the system) and the other system s operatng n free-wheelng state, e.g., j I = () U,(),I = I I e π/6 j II = () U,(),II =, or Strategy II: both systems are n actve state, j I = () U,(),I = I I e π/6 j II = () U,(),II = I II. () (4) If I I = I II = I (as assumed for current symmetrzaton) n both cases the total current space vector (cf. Fg. ) U, ji j II = U,jI U,jII = I e π/6 = U,D (5) s formed at the nput sde of the parallel systems. Therefore, nput current space vector U,D (cf. Tab. ) can be
ϕ = u R L ϕ = u R L ϕ = u R L u RT u RT u RS L L L R ST ϕ = ϕ = u T ϕ = u R L L R ST ϕ = ϕ = u T ϕ = u S L L R ST ϕ = ϕ = u S L L V V u ST L L (a) L L (b) ϕ = u T L L (c) Fg. : Redundant swtchng states concernng nput current formaton (cf. (8) ()) for swtchng states (a): j =, (b): j =,and(c): j =. The current paths are ndcated by bold lnes, for the sake of clearness, power semconductors whch are not nvolved n current conducton are omtted. The potentals effectng the current change rates n the DC sde nductors related to a fcttous neutral pont, and the buck-stage output voltages u I, u II are gven. obtaned va swtchng states µ ji ³ = or j II ³ or ³, (6) or by exchangng swtchng states j I and j II. Remark: Swtchng state j = () must not be used n order to avod overvoltage peaks across the DC sde nductors. Due to the DC sde current rpple the nstantaneous current values n the postve and negatve DC lnk ral are not equal. At the transton from swtchng state j = () to j = () the Krchhoff s current law s not fulflled at the connecton pont of cathode and/or at the anode of the free-wheelng dode to the DC lnk bus whch results n an overvoltage spke across the nductors forcng the currents to an equal value. Therefore, one power transstor has to be kept n the on-state durng the free-wheelng state; one can clamp the power transstor n the on-state n that phase where the mans phase voltage ether shows the hghest absolute value (e.g., phase R n nterval []), or les between the two other phases (e.g., phase S n nterval []). However, dfferent rates of change d L/dt of the current are obtaned for the DC sde nductors L ± dependent on the swtchng states of the rectfer systems resultng n dfferent voltages appled to the nput sde of the DC sde nductors. In Fg. the swtchng states gven n (6) are shown and the potentals ϕ of postve and negatve DC lnk rals related to a fcttous neutral pont are gven. Wth ths, the current change rates d L /dt canbecalculatedfortheconsderedswtchng states n dependency on the mans lne-to-lne voltages u RT,u RS,u ST whch are appled to the buck nput stages u I, u II and on the output voltage U wthn the consdered mans nterval ; d dt L L L L = 4L D ji j II u RT u RS u ST U (7) D = D = D = 4 (8) (9). () Onecanseethatfordfferent swtchng states (resultng nthesamenputcurrentspacevector U,D )therates of change of the current dffer from each other,.e., the balancng of the DC currents can be performed by the dfferent swtchng states. Equal current change rates (marked by an arrow n (8) and (9)) are due to the drect parallel connecton of DC lnk nductors, e.g., for swtchng state j = current change rates dl /dt and d L /dt are equal due to the parallel connecton of L and L. However, n an expermental setup, the proporton of the absolute currents n the nductors wll be determned by mpedances of the current paths.. Dervaton of Space Vector Modulaton Schemes There are two possbltes for developng space vector modulaton schemes whch provde a possblty for DC current balancng, operate n an nterleaved mode n order to show mnmum nput current and/or nput flter capactor voltage rpple (.e., only current space vectors lyng n the mmedate neghborhood of the reference current space vector are ncorporated nto the swtchng state sequence). Frst, swtchng states fulfllng the above-mentoned requrements are freely arranged wthn one pulse (half) perod. There, numerous possbltes are gven, n [7]
ths strategy was used for DC sde current balancng n a low swtchng frequency hgh power applcaton. Alternatvely, a swtchng state sequence for a sngle three-phase PWM rectfer system s taken as a bass for the space vector modulaton scheme of the parallel connecton, where the modulaton of the second rectfer system s shfted by half or a quarter of a pulse perod wth reference to the frst rectfer system. In the case at hand, space vector modulaton schemes were developed employng the second method based on two dfferent modulaton schemes for a sngle rectfer system []; n modulaton scheme, the free-wheelng state s lyng at the end (at the begnnng) of one pulse half perod, whle for modulaton scheme the freewheelng state s placed n between two actve swtchng states n the mddle of one pulse half perod. Consderng nterval of the mans perod, one receves for modulaton scheme, = () () () =T P /, () L ± =mh, U,ph = 5 V U =4V I =5A f =5Hz f P =5kHz, (f denotes the lne frequency, f P the pulse frequency). The comparson shows that there s a dstnct dfference between the results of the employed modulaton schemes. By arrangng the free-wheelng state at the end (at the begnnng) of one pulse half perod and by clampng the power transstor of the phase showng () () () () T P / () () () () () () () () () () () () T P / () () () () T P (b) () () () () T P / () () () () () () () () () () () () (a) T P (c) where the power transstor of the phase whch shows the maxmum absolute phase voltage value s clamped ntheon-state(phaser). If the power transstor of the phase showng the mnmum absolute voltage (.e., lyng n between the other two phases) s clamped n the on-state wthn a π/-wde nterval of the mans perod (phase S), one receves t () () () t, () µ= µ=t P / and for modulaton scheme, = () () () =T P /, () or () () (). (4) = =T P / In Fg. 4 modulaton schemes for a sngle rectfer system are gven whch are symmetrc (cf. (b)), or asymmetrc (cf. (c)) wth reference to the mddle of one pulse perod. The modulaton scheme for the paralleled rectfer systems can now be acheved by shftng the swtchng state sequences by half a pulse perod for the symmetrc modulaton scheme (cf. Fg. 4(d)), and by a quarter of a pulse perod for the asymmetrc modulaton scheme (cf. Fg. 4(e)). The dfferent modulaton schemes were mplemented n a smulaton program CASPOC r [8] and compared n order to determne the scheme fulfllng the above defned requrements. There, no control algorthm for balancng the DC lnk currents was provded n order to evaluate the self-stablty of current sharng propertes of the dfferent schemes. Furthermore, the mans flter was omtted n order to concentrate on the essentals and to avod undesred effects. Fgure 5 shows the smulaton results of DC lnk currents L ±,mans phase currents,, = R, S, T, and the current space vectors of the total rectfer nput currents U, as well as the current space vector of the mans phase currents, (cf. Fg. ) for the followng system parameters: () () () () () () () () tµ T P / () () T P T P / (d) () () () () () tµ T P (e) Fg. 4: Development of modulaton schemes wthn one pulse half perod for parallel connected rectfer systems based on the modulaton scheme for a sngle rectfer system n nterval of the mans perod (a). Modulaton schemes wthn one pulse perod, arranged symmetrcally (b) and asymmetrcally (c) around the center of one pulse perod. Schemes for paralleled rectfer systems (d), (e), nterleavng s acheved by proper phase-shftng (ndcated by an arrow). s a tme beng runnng locally wthn a pulse perod.,r,s,t L..,R,S,T L L L (a).. (c) Fg. 5: Smulaton results for dfferent modulaton methods; tme behavor of mans phase currents, and DC lnk currents L ± (a),(c), and trajectores of the total rectfer nput current space vector U and of the mans phase current space vector (b),(d) for modulaton scheme (cf. Fg. 4(d) and ()) and for modulaton scheme (cf. ()), both arranged symmetrcally. U U (b) (d)
the mnmum absolute voltage value (cf. ()) one receves a constant average value of the currents n the DC lnk nductors, the envelopes of the current rpple are modulated wth three tmes the mans frequency (cf. Fg. 5(a)), the trajectory of the total rectfer nput current space vector U shows an deal shape, only current space vectors lyng n mmedate neghborhood of the mans phase current (reference) space vector are ncorporated, the free-wheelng state of the total rectfer nput current s not employed n ths case (no connectons of the trajectory to the orgn of the coordnate system),.e., the current rpple s held on a mnmum level (cf. Fg. 5(b)). If the free-wheelng state s arranged n the mddle of one pulse half perod, and f the power transstor of that phase showng the maxmum absolute voltage value (cf.()) s clamped n the on-state, the DC lnk currents show dfferent behavor. The average value s not constant any more (whch does not take any effect on the mans phase currents!), there s a reducton n current rpple n the nductors connected to a phase bengheldntheon-stateforπ/, but the current rpple does ncrease wthn the subsequent π/ nterval (cf. Fg. 5(c)). As Fg. 5(d) shows, the free-wheelng state s ncorporated n the swtchng state sequence (exstng connectons to the orgn of the coordnate system),.e., the current rpple does not show the lowest value possble. Therefore, the modulaton scheme gven n () and n Fg. 4(b) s further nvestgated n ths paper. Symmetrzaton In order to ensure current balancng and power loss balancng to the sngle rectfer systems, a proper control algorthm has to be mplemented. The need for current balancng s due to non-deal propertes, e.g., mans phase voltage unbalance, forward voltage drops, component tolerances, and/or dfferent mpedances of current conducton paths. In ths secton, dfferent control methods for current balancng, and DC sde crculatng currents and ther translaton nto a zero-sequence component of the AC sde currents s nvestgated.. Crculatng Currents and Zero-Sequence Current Dependng on the structure of the paralleled rectfer systems, there could exst a dfferent number of crculatng currents,.e. currents whch flow va both converters and do not pass the load. For paralleled boost converters, there s only one crculatng current due to the sngle DC sde energy storage (DC lnk capactor) [9], []. Therefore, t s possble to measure the zerosequence current on the AC sde of the rectfer system whch s characterstc for the crculatng current on the DC sde [6]. However, for the parallel connecton of current source converters there s more than one crculatng current on the DC sde of the rectfer systems due to the hgher number of DC sde energy storages (DC lnk nductors), whch results n a zero-sequence component at the AC sde. Ths has to be consdered for desgnng the control balancng the output currents of the ndvdual systems. In Fg. 6 a DC/DC equvalent crcut of two threephase buck-type rectfer systems s gven, the nput voltages are each spltted nto two voltages u pm, u nm, m =,, connected to a common artfcal pont (mans star pont). Va pont the paths of the crculatng currents K and K are closng. If, e.g., the crculatng current K n the postve DC lnk nductors L and L sassumedtobea,andthecrculatng current K s set to zero,.e., K =A,and K =, one receves for the average value of the zero-sequence current at the nput of rectfer system I, avg U,I, = avg U,I,R avg U,I,S avg U,I,T =. A, (5) and for the zero-sequence current at the nput of rectfer system II, avg U,II, = avg U,I, =. A, (6) the zero-sequence current of the total rectfer nput current s U, = A. The same results are obtaned for K =A,and K =A, avg U,I, =. A, avg U,II, =. A, U, =A. (7) Therefore, no unque concluson on the behavor of the crculatng currents can be drawn from the AC sde zero-sequence currents U,I,, and U,II,. Therefore, the novel control concept proposed n the followng for the balancng of the DC sde currents does not refer to the zero-sequence current.. Control Structures Control Structure I If an unbalance n the currents n the DC lnk nductors connected to the postve output termnal s consdered, e.g. L > L,thepotentalϕ p at the nput sde of rectfer system I has to be decreased (cf. Fg. 6), whle the potental ϕ p at the nput sde of rectfer system II has to be ncreased n order to equlbrate the DC lnk currents. The potentals on the negatve nputs ϕ n, and ϕ n do not have to be changed n ths case. A correspondng control structure s gven n Fg. 7, there the current reference value provded from an outer output voltage control loop (whch s not shown) s dvded by the number of parallel connected rectfer systems n and compared to the actual (averaged) DC lnk currents. P-type controllers (gan )dosetthe reference value of the voltage u p, andu n for rectfer system I, the reference values are transformed nto a buck-stage output voltage reference value u,, wherea pre-control of the output voltage reference value u s provded, u, = u p u n u. (8) u
Thesamestrueforrectfer system II; all reference values are ncorporated n the calculaton of the on-tmes of the swtchng states (cf. () n []). In order to acheve the desred modfcaton of the potentals ϕ p...ϕ n, an addtonal free-wheelng state s provded n the swtchng state sequence whch allows to ncrease or decrease the potentals as proposed n [5], []. Consderng nterval, swtchng state j = () s used as free-wheelng state by default; therefore, f swtchng state j = () s appled, the postve potentals ϕ p are ncreased due to u,r >u,s, whle swtchng state j = () ncreases the absolute value of the negatve potentals ϕ n due to u,s >u,t. The relatve on-tme δ of the addtonal free-wheelng state, whch s placed n the mddle of the pulse perod, can be calculated va u p δ =, (9) u ph,cl. u ph,± where u ph,cl. s the voltage of that phase, where the power transstor s n on-state durng the free-wheelng state by default, and u ph,± s the voltage of the phase, where the power transstor s n on-state durng the addtonal free-wheelng state. There, u ph, s used to ncrease the postve potental (u p > ), and u ph, to ncrease the negatve potental (u p < ). The performance of the proposed control concept s confrmed by smulaton results n secton 4. u p u n ϕ p ϕ n / n L L ϕ p u p ϕ = u u n ϕ n L K L K L L u p u n u p u n u u u u u p u, u p u, Fg. 6: DC/DC equvalent crcut of two paralleled rectfer systems showng the crculatng currents Km,andthepotentals ϕ pm, and ϕ nm, m =,, on the nput sde of the DC lnk nductors. On-tme calculaton δ δ δ δ Fg. 7: Control structure I for balancng the DC lnk nductor currents based on the DC/DC equvalent crcut gven n Fg. 6. Control Structure II The aforementoned control structure shows the drawback that by controllng the current n one DC lnk nductor the other currents are also nfluenced. In the followng, a control structure based on a modfed DC/DC equvalent crcut of the paralleled rectfer systems s presented brefly whch allows to control the DC currents ndependently. For the parallel connecton of n =buck-typerectfer systems there are (n) = ndependent currents, whchhavetobeconsderedforcontrol:, K, and K. Therefore, the voltage sources gven n Fg. 6 are combned n such a manner that one nput voltage u and two voltages u p and u n shftng each potental ndvdually on the nput sde of the DC lnk nductors ϕ p...ϕ n are obtaned. Under symmetrc condtons, all three voltages are balanced and are therefore spltted nto symmetrcal parts u /, u p/, and u n/(cf. Fg. 8). ϕ p u / u / ϕ n u n / u n / L u p / ϕ = L / K u p / ϕ p / / K ϕ n / u Fg. 8: Modfed DC/DC equvalent crcut of two paralleled rectfer systems whch allows to control the output current and the crculatng currents K, K ndependently. Intherealsystem,fourcurrentshavetobebalanced ( L... L ), whch are dependent on four voltages (cf. Fg. 6) u p...u n; the dependency can be gven by a 4 4-matrx, L 4L d dt L = () L L I L u p U = u p u U. U n u U n A U U One can see that there s a strong dependency of a DC sde nductor current on the related voltage (factor n A), and a weak dependence on the other voltages (factor ± na). For the mathematcal model whch gves the bass for the control (cf. Fg. 9), one has to reduce the mathematcal model of the real system to the system employng the (n ) ndependent currents,.e. to varables for two (n = ) paralleled rectfer systems, n
order to provde an ndependent control loop for each current, Ã!! K K I = à B I L. () u p u p u / n Fg. : Equvalent crcut to be consdered for the desgn of the control of the current n a DC lnk bus of one rectfer system (shown for L ). The current reference value s provded by an outer output voltage control loop, the reference values of the crculatng currents are set to zero. A P-type controller (k Pu,k Pn,k Pp) sets the reference values of the buck stage output voltage u,andofthedfferental potentals u p and u n. These values are transformed nto the real system model n order to derve the voltages occurrng n the actual crcut, u u p u p u n u n U = C system model 4L d d IL = t A U U U = C U 4L u u n u p k Pu k Pn k Pp à L L u u p u n! U balancng control I = B I L. K K () Fg. 9: Multvarable control of the DC lnk currents. The blockdagramscomprsedbysystemtobecontrolledhavng four nput and output varables u p...u n and L... L whch are transformed nto three nput and/or output varables K, K,, and u, u n, u p for control and the back-transformaton nto actual quanttes to be appled to the system by proper modulaton.. Control Desgn The P-type controllers n Fg. 7 can be desgned n a frst step by consderng only the respectve DC lnk nductor, the related nput voltage and the output voltage u whch can be assumed to be constant and mpressed (cf. Fg. ). We then have for the transfer functon of the control loop controllng the current n the postve DC lnk ral of rectfer system I, ĩ L ĩ n = L s, τ =. () The transfer functon consttutes a frst order delay (proportonal negatve-feedback of the ntegrator representng L ), the tme constant τ s set accordng to τ, (4) f n order to provde suffcent dynamcs for attenuatng the effect of dsturbances wth three tmes the mans frequency. 4 Smulaton Results In ths secton, smulaton results for the control structure descrbed n secton..i are gven. The system parameters are set accordng to secton.. In Fg. (a) thebehavorofmansphasecurrents,, = R, S, T, and of DC lnk currents L ± s shown. For t<t the control loop balancng the currents s deactvated. As no source of unbalance (whch would be present for a realsystem)snsertedntheparallelconnectonofthe rectfer systems an deally symmetrc partton of the total DC current to the ndvdual systems s gven n,s L,T t t t.. s R,I s S,I s T,I s R,II s S,II s T,II,R t 4 t 5 (d) L (a) (c) s R,I s S,I s T,I j = () j = () j = () j = () j = () Fg. : Smulaton results for unbalanced rectfer systems; (a) Tme behavor of mans phase currents,, = R, S, T and DC lnk currents L ±, (b) trajectores of total rectfer nput current U and mans phase current, (c) swtchng sgnals s,i and s,ii, = R, S, T,and(d) swtchng sgnals s,i wthn one pulse perod. P j = () U j = () (b) T P (d)
ths case. At t = t a DC voltage source of V s placed n seres to DC lnk nductor L n order to smulate a large unbalance. An unbalance of the DC lnk currents does occur mmedately, whch also results n a mans phase current dstorton. At t = t the control loop for DC lnk current balancng s actvated, whereby a current symmetrzaton s acheved at t = t by addng the addtonal free-wheelng states. In Fg. (b) the trajectory of the total rectfer nput current space vector U, and of the mans phase current space vector are gven for actvated balancng control n a subsequent mans perod; one can see that the addtonal free-wheelng state does not have any nfluence on the trajectores (cf. Fg. 5(b)), agan only current space vectors lyng n mmedate neghborhood of the mans phase current (reference) space vector are used,.e., the DC current rpple s held on a mnmum value. The swtchng sgnals s,i and s,ii, = R, S, T, appled to the power transstors of both rectfer stages I and II for actvated balancng control are gven n Fg. (c) for nterval ; at t = t 4 the addtonal free-wheelng state s nserted n the modulaton scheme for power stage I, and at t = t 5 for power stage II (8 phase-shfted). Fgure (d) shows the swtchng sgnals of power stage I wthn a pulse perod T P n detal; there, (δ T P ) denotes the duraton of the total free-wheelng state (swtchng states j = () and j = ()), (δ T P ) denotes the duraton of the addtonal swtchng state j = () (cf. (9)). 5 Conclusons In ths paper, the DC sde current balancng of threephase buck-type rectfer systems was nvestgated. Based on the current space vectors, whch are avalable for current formaton at the nput sde of the paralleled rectfer systems, a modulaton scheme was derved whch provdes all advantages of an nterleaved operaton, provdes mnmum rpple of the DC lnk nductor currents and mnmum rpple of the AC sde flter capactor voltage, and allows to nfluence the buck-stage output voltages n such a manner that a balancng of the currents n the DC sde nductors s ensured. Two dfferent control structures were treated; a scheme of low complexty where the four DC nductor currents are controlled ndependently,.e., where the mutual nfluence of the current controls s not consdered. There, a P-type controller was employed. Due to the controller type and the low balancng control dynamcs requred (unbalances are caused by only small dfferences of transstor or dode forward voltage drops, wrng resstances, or DC lnk nductor values) stablzng the control loop does not pose problems. Addtonally, a more complex multvarable control scheme was proposed whch sbasedonacontrol-orentedmodelofthepowercrcut consderng mutual nfluences. There, the four DC sde nductor currents are transformed nto three fcttous ndependent currents, whch provdes a bass for decoupled current control. Themoresmplecontrolstrategyshowstheadvantages of lower realzaton effort, also the strategy could be extended to n paralleled systems easly. Both control strateges wll be nvestgated expermentally and comparatvely evaluated on a kw prototype of the rectfersystemnthecourseoffutureresearch. References [] Baumann, M., Drofenk, U., and Kolar, J. W.: ew Wde Input Voltage Range Three-Phase Unty Power Factor Rectfer Formed by Integraton of a Three-Swtch Buck-Derved Front-End and a DC/DC Boost Converter Output Stage. Proceedngs of the nd IEEE Internatonal Telecommuncatons Energy Conference, Phoenx, Arzona, U.S.A., Sept. 4 8, pp. 46 47 (). [] Kolar, J. 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