Improvements of the LLRF system at FLASH Mariusz Grecki, Waldemar Koprek and LLRF team
Agenda GUN linearization Adaptive feed-forward at ACC1 Beam load compensation at ACC1 Klystron nonlinearity compensation Detuning measurement and Piezo control
Gun linearization
Where is the problem?
RF-Gun setup
High power chain linearization VECTOR MODULATOR DAC1 DAC2 TIR GGER Digital Input 1 1MHz Digital Input 2 Pfor I ADC5 Pfor Q Pref I Pref Q ADC6 ADC7 ADC8 Offset Timming & Control Module Calibration Offset I Calibration Offset Q Calibration Offset I Calibration Offset Q I Q Integrator GAIN Rotation Matrix Rotation Matrix I I + Q Q Feed-Forward Table VME I Q + I Q I Q x x Feedback GAIN I Q I - + Q Set-Point Table I Q + I Q Filter y=n*x n +(1-N)*y n-1 FPGA CONTROLLER Corr. tables Linearization FF table calculation Amplitude SP Phase SP DOOCS SERVER
Measurement devices of GUN forward power Klystron waveguide to RF-Gun Pref Pfor diode A/φ detector I/Q detector
High power chain linearization based on amplitude detector measurement normalized klystron power variation phase [deg]
Temperature behaviour during linearization
High power chain linearization based on diode measurement normalized klystron power variation phase [deg]
Temperature behaviour during linearization
Temperature behaviour during linearization
Phase of diode vs forward power measured in SIMCON normalized klystron power variation phase [deg]
Phase scan of forward power
Rotation matrix y I 2 cos(α) -sin(α) I 1 = x Q 2 sin(α) cos(α) Q 1 Q 2 Q 1 α I 2 V 2 I 1 V 1 x y I 2 Q 2 = A 11 *cos(α) -A 12 *sin(α) A 21 *sin(α) A 22 *cos(α) x I in Q in Qr 2 Qr 1 Ir 1 Ir 2 x
Non-orthogonal I & Q Q φ I I out = I in + Q in * sin(φ) Q out = Q in *cos(φ)
New DOOCS control panels I rot Q rot = A 11 *cos(α) -A 12 *sin(α) A 21 *sin(α) A 22 *cos(α) x I in Q in I out = I in + Q in * sin(φ) Q out = Q in *cos(φ) Input calibration panel Advanced input calibration panel
Phase scan of forward power
Before and after input linearization
Adaptive FF at ACC1
SIMCON 3.1BOARD FIRMWARE VECTOR MODULATOR BIS AND/OR RF GATE TIR GGER 1MHz TOROID CAVITY 1-8 DAC Digital Output 1 Digital Input 1 Digital Input 2 ADC9 ADC1-8 Offset Loop delay regulator Klystron correction tables + Exception Handling AFF table Timming & Control Module IRQ PowerPC IRQ to VME Exception detection Error table Error signal Averaging I/Q detector Rotation Matrix VECTOR SUM - + MIMO + Beam loading compensation Set-Point Table Feed-Forward Table Xilinx Virtex II Pro 40 signals from SIMCON DAQ VME
AFF vs FB FB, Gain=25, AFF OFF FB, Gain=5, AFF ON
AFF used for beam load compensation AFF OFF AFF ON
AFF status implemented in FPGA and PowerPC two versions of AFF tested stable operation over minutes control through virtual RS-232 port DOOCS control panel not ready
Beam load compensation at ACC1
SIMCON 3.1BOARD FIRMWARE VECTOR MODULATOR BIS AND/OR RF GATE TIR GGER 1MHz TOROID CAVITY 1-8 DAC Digital Output 1 Digital Input 1 Digital Input 2 ADC9 ADC1-8 Offset Loop delay regulator Klystron correction tables + Exception Handling AFF table Timming & Control Module IRQ PowerPC IRQ to VME Exception detection Error table Error signal Averaging I/Q detector Rotation Matrix VECTOR SUM - + MIMO + Beam loading compensation Set-Point Table Feed-Forward Table Xilinx Virtex II Pro 40 signals from SIMCON DAQ VME
Sampling of toroid signal 20 ns 70 ns t
30 bunches measured by SIMCON before clock=50mhz local clock after clock=54mhz clock from MO
Beam load compensation
Klystron nonlinearity compensation (more general: High Power Amplifiers nonlinearity compensation)
Current high power amplifiers diagnostic hardware status GUN LLRF CONTROLER DSP/FPGA Available DOOCS signals: TTF2.RF/ADC/KLY3_VM/CHANNEL.TD TTF2.RF/ADC/KLY3_PAMPL1/CHANNEL.TD TTF2.RF/ADC/KLY3_PAMPL2/CHANNEL.TD TTF2.RF/ADC/KLY3_OUT/CHANNEL.TD Vector Modulator Power splitter (3 db) LLRF amplif ier 20 db max out 0dBm Directional co upl er Preamplifier max out 40 0W Direc tional coupler Klystr on Circ ul ator (~2dB) Directional coupler attenuator attenuato r atten uator attenuat or LO LO LO LO A D C A D C A D C A D C ADC DOOCS Servers
Current high power amplifiers diagnostic hardware status LLRF CONTROLER DSP/FPGA Acc1 Available DOOCS signals: TTF2.RF/ADC/KLY2_VM/CHANNEL.TD TTF2.RF/ADC/KLY2_PAMPL1/CHANNEL.TD TTF2.RF/ADC/KLY2_PAMPL2/CHANNEL.TD TTF2.RF/ADC/KLY2_OUT/CHANNEL.TD Vector Modulator Power splitter (3 db) LLRF amplif ier 20 db max out 0dBm Power splitter (3 db) Preamplifier max out 40 0W Direc tional coupler Klystr on Circulator (~2dB ) Directional coupler att att att att LO LO LO LO A D C A D C A D C A D C ADC DOOCS Servers
Current high power amplifiers diagnostic hardware status Acc2_3 Available DOOCS signals (temporary location): TTF2.RF/ADC/ACC3.TOTAL/CH02.TD DAC output I TTF2.RF/ADC/ACC3.TOTAL/CH03.TD DAC output Q TTF2.RF/ADC/ACC3.TOTAL/CH04.TD after RF gate TTF2.RF/ADC/ACC3.TOTAL/CH05.TD after 1 st preamp LLRF CONTROLER DSP/FPGA TTF2.RF/ADC/ACC3.TOTAL/CH06.TD after 2 nd preamp TTF2.RF/ADC/ACC3.TOTAL/CH07.TD after klystron Vec tor Modulator Power s plitter (3 db) LLRF am pli fier 20dB max out 0dBm Power s plitt er (3 db) Preamplifier max out 400W Directional coupler Klys tron Directional coupler attenuator attenu ator atten uator attenuator LO LO LO LO A D C A D C A D C A D C ADC DOOCS Servers
Current high power amplifiers diagnostic hardware status Acc4_5_6 LLRF CONTROLER DSP/FPGA Vec tor Modulator Available DOOCS signals (temporary location): TTF2.RF/ADC/ACC5.TOTAL/CH02.TD DAC output I TTF2.RF/ADC/ACC5.TOTAL/CH03.TD DAC output Q TTF2.RF/ADC/ACC5.TOTAL/CH04.TD after RF gate TTF2.RF/ADC/ACC5.TOTAL/CH05.TD after 1 st preamp TTF2.RF/ADC/ACC5.TOTAL/CH06.TD after 2 nd preamp TTF2.RF/ADC/ACC5.TOTAL/CH07.TD after klystron TO BE INSTALLED Power splitter (3 db) LL RF am pli fie r 20 db max out 0dBm Power splitt er (3 db) Preamplifier max out 40 0W Directional coupler Klystron Directional co upl er attenuator attenuator attenuato r attenuator LO LO LO LO A D C A D C A D C A D C ADC DOOCS Servers
HPA AM/AM and AM/PM characteristics measurements. The set of amplitude-amplitude and amplitudephase characteristics measurements have been done for the klystron 5 and klystron 2 during last two years. The constellation diagram method have been used for the characterization results visualization. Basing on achieved characteristics the correction coefficients have been calculated.
High power chain non-linearities characterization Non-linearities and saturation phenomena: increasing the driving power non-linear amplifier behaviour constant increasing of driving power saturation different saturation level for a different operation conditions Signal parameters: Pulse length 1200 us, Number of steps 50, Signal range 0 up to max. available level I max I Q tp time Complex representation of the HP chain devices Example for kly. 5 (each axis unit is an ADC voltage)
Results example klystron 5 KLYSTRON 5 Constellation diagram: Measurement for one phase (Q=0). Klystron output characteristics for different HV levels. DAC output VM output 1st preamp 2nd preamp Klystron output Constellation diagram: Grid measurement with 20 steps resolution
Results example klystron 2 Constellation diagram measurement: Measurement for one phase (Q=0). Klystron output characteristics for different HV levels. Constellation diagram: Grid measurement with 50 steps resolution
HPA's Linearisation algorithm principles. From the nonlinearity measurement the AM/AM (amplitude to amplitude) and PM/AM (phase to amplitude) of the high power chain can be achieved. NOTE!! The nonlinearity is only function of input amplitude. Output amp. max amp. req amp linear char. real char. Driving signal representation: Z = Id + Qd = Z * [cos(phi) + i * sin(phi)] Correction signal: C = Ic +Qc = C * [cos(th) + i * sin(th)] From the linearisation both amplitude and phase correction are achieved. Can be realised using the complex multiplication. Output phase [deg] corr amp. controler output signal corr. amp controler out. signal max max Input amp. Input amp. C*Z = Idc + i*qdc C*Z = Z * C *[cos(phi+th)+i*sin(phi+th)] Phase correction
Linearization tool implementation in LLRF field controller (Simcon). The linearization tool realization is based on the set of look-up tables The amplitude of the controller driving signal (calculated in the FPGA) is used for addressing the look-up tables with correction coefficients for I and Q. There are 32 word 18bits tables with corrections calculated in the MATLAB from the characteristics achieved during the characterization. In order to minimize the tables size (save the FPGA resources) the tables with linear interpolation between the knots. The contents of the tables is updated according to the changes of the HV level (for instance adjusted by an operator). Proportional feedback controller I d Q d Rotation matrix I lin. Q lin. Qc Amplitude calculation I corr. Amp. Range 32 posit. tables I corr. Range table I curve slope range table Ic Q corr. Amp. Range 32 posit. tables Q corr. Range table Q curve slope range table
Tool tests results in ACC2&3 and MTS. The set of in-situ tests were performed in the MTS and the FLASH in order to evaluate performance of different configuration of linearization tool. During the characterization phase the nonlinearities of the amplitude and phase characteristics have been determined for the different HV level of the klystron modulator. Achieved data was processed and used for the correction coefficients calculation. Depending on tested variant of configuration the tables with 4, 8,16 or 32 positions were up-loaded to the FPGA. Although the most often used configuration was 32 positions tables with linear interpolation, others were also possible but required the LLRF controller reconfiguration (recompilation).
Examples of tool tests results in Amplitude and phase characteristics of MTS HPC nonlinearities (blue trace) and linearized characteristics (red trace). Characteristics for modulator HV level 9,4kV MTS. Study of the RMS error of vector sum error signal in function of LLRF feedback loop gain. Black traces with linearisation blue and red trace without linearization
Klystron 5 HPC linearisation results Linearisation test had been performed using Simcon(FPGA) controler, Correction tables were on HV level 10800 (value on PLC) about 110kV Two iteration of the linearization were performed.
Current work linearization tool implementation in ACC1 LLRF feedback controller. Linearization tool will be installed in the ACC1 LLRF control loop controller. Appropriate modification of the controller structure, dedicated controller DOOCS server, and Matlab scripts have been done. The offline tests of the tool performance is planned for July and August 2007. In-situ tests before regular operation will be performed during August-September 2007 accelerator study period in FLASH.
Conclusions. Diagnostic setup installation ready for the high power chain amplifiers examination has been prepared for most of the FLASH modules. Linearization method that can be implemented in standard LLRF feedback loop controller have been developed and tested. Successful tests of the linearization tool have been performed in the MTS and the HPC of ACC2&3. Tool implementation in ACC1 field controller is in progress.
Detuning measurement and Piezo control
Detuning compensation control system PIEZO STACK DAC PIEZO DRIVER ACTUATOR FPGA ADC PIEZO SENSOR SENSOR ADC RF PROBES Detuning block downconverter Simcon3.1L
Detuning computation block 3 clk Probe signal Forward calibration atan 6 clk atan FIR Phs probe substraction Amp probe Phs forwa division Amp forwa 4 clk 4 clk sincos Phs forwa -Phs probe Amp forwa /Amp probe 1 clk 19 clk substraction detuning 1 clk
Data acquisition block DAQ recording II reading 2 ms 98 ms MT1 10 Hz of RF pulse repetition rate MT2 Arbitrary access of II to DAQ internal memory
Measurements in ACC7/CAV6 3000 2000 1000 Probes debug x 10 4 Detuning 200 0-200 Pulse debug 0 4-400 -1000-2000 -3000-4000 0.08 0. 1 0.12 0.14 0. 16 0.18 0.2 0. 22 amplitude and phase Forward power 3 2 1 0-1 400 600 800 1000 1200 1400 1600 1800 2000-600 -800-1000 -1200 0.097 0.098 0.099 0.1 0.101 0.102 0.103 0.104 0.105 amplitude and phase Probe signal 000 6 x 104 15000 1 x 105 000 4 000 2 0.5 000 000 0-2 10000 0 000-4 000 000 000 000-14 0 0 500 1000 1500 2000 2500 0 500 1000 1500 2000 2500-6 -8-10 -12-0.5 5000-1 0-1.5 0 50 0 10 00 1500 20 00 2500 0 50 0 10 00 1500 20 00 2500
Detuning measurement filling ACC7/CAV6 - online detuning measure 700 detuning[hz ] 600 500 400 300 200 X: 544 Y: 226.2 FT detuning equals to 180 Hz decay 100 0 flat X: 1205 Y: 52.8 200 400 600 800 1000 1200 1400 1600 1800 2000 time[us]
Amplitude and Phase measurement 0.45 ACC7/CAV6 - Amplitude of probe signal -20 ACC7/CAV6 - Phase of probe signal 0.4-40 0.35-60 gradient[mv/m] 0.3 0.25 0.2 0.15 degrees -80-100 -120 0.1-140 0.05-160 0 0 500 1000 1500 2000 2500 ti me[us] Probe signal after coodrinate conversion -180 0 500 1000 1500 2000 2500 time[us]
Microphonics -265 x 10 4 4.5 mechanical cavity resonance around 130 Hz abs(fft) -270 4 X: 131.3 Y : 4.372e+004 amplitude[a.u] -275-280 -285 amplitude [a.u.] 3.5 3 2.5 2 1.5 X: 431. 3 Y : 1.486e+004-290 -295 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 time[s] 1 0.5 X: 731.3 Y : 6241 100 200 300 400 500 600 700 800 900 1000 freq [Hz]
Piezo driver results (1) Umo [V] 120 Gu dla Cpiezo = 2,47uF Gu dla Cpiezo = 5uF Imo dla Cpiezo = 3,37uF Gu dla Cpiezo = 3,37uF Imo dla Cpiezo = 2,47uF Imo dla Cpiezo = 5uF Imo [ma] 400,00 100 350,00 80 Half a sine 300,00 250,00 60 200,00 40 150,00 100,00 20 Umi [V] 50,00 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1 1,1 1,2 0,00
Piezo driver results (2) θ[ C] 140 θ(n) 2nd order polynomial aproximation θ(n) 120 100 80 y = 0,3067x 2 + 0,909x + 26 R 2 = 0,9012 Imo = 510 ma 60 40 20 rising number of pulses piezo 5 uf N 0 0 2 4 6 8 10 12 14 16 18
Piezo driver results (3) A B C