Design of High-linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS

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JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 ISSN(Prin) 1598-1657 hps://doi.org/10.5573/jsts.2017.17.6.742 ISSN(Online) 2233-4866 Design of High-lineariy Delay Deecion Circui for 10-Gb/s Communicaion Sysem in 65-nm CMOS Kosuke Furuichi, Hiromu Uemura, Nasuyuki Koda, Hiromi Inaba, and Keiji Kishine Absrac This paper describes a mehod of designing a circui o deec high-lineariy delay a 10 Gb/s. We proposed a ransmission sysem for addiional daa in previous work, by using a frequency modulaion echnique. The demodulaion characerisics in he receiver srongly depended on daa speed. As he daa speed ges higher, demodulaion characerisics lineariy degradaion become larger. In his paper, we propose a circui o provide high-lineariy demodulaion characerisics by using an emphasis echnique which reduces degradaion in he demodulaed signal. We fabricaed he circui o deec delay wih an emphasis echnique by using 65- nm CMOS process. The resuls we obained from measuremens, revealed an inegraed circui (IC) achieved 10% higher lineariy han a receiver wihou emphasis a 10 Gb/s. Index Terms Delay deecion, analog, emphasis, high-lineariy receiver, he configuraions are defined by cerain specificaions. In order o increase capaciy of opical communicaion sysems, i is effecive o embed addiional daa ino daa frame wihou alering daa frame configuraions. We proposed a communicaion sysem in previous work ha could embed addiional daa wihou alering daa frames [Fig. 1] [4]. Addiional daa in he proposed sysem were ransmied by frequency modulaion on he daa frames. The demodulaion characerisics srongly depended on he daa speed. The key issue in he sysem was how o reduce lineariy deerioraion in he demodulaed signal when he daa speed increased. We have proposed he emphasis echnique for receiver circuis [5] o obain higher-speed operaion. In his paper, we presen he deailed design of a delay deecion circui ha use an emphasis echnique, which provides higher speed operaion. We fixed he circui parameers in implemening he design by using a small-signal equivalen circui. In addiion, we fabricaed a delay I. INTRODUCTION Recen communicaion sysems can ransmi and receive large amouns of informaion. Therefore, opical communicaion sysems are required o have large amoun of capaciy [1]. Opical communicaion sysems are used for local area neworks (LANs) and wide area neworks (WANs), mobile informaion sysems, and Ehernes [2, 3]. These sysems use daa frames in which Manuscrip received Apr. 14, 2017; acceped Jul. 24, 2017 Universiy of Shiga Prefecure E-mail : oo23kfuruich@ec.usp.ac.jp Fig. 1. Overview of proposed communicaion sysem.

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 743 deecion circui using he 65-nm CMOS process. The IC achieved 10% higher deecion-characerisic lineariy han a receiver wihou emphasis. II. CIRCUIT DIAGRAM AND DEGRADATION OF DEMODULATION CHARACTERISTICS A delay deecion circui wih a low-pass filer is used in he proposed sysem as he demodulaor [Fig. 2]. Frequency modulaion componens are convered o oupu volage level by he demodulaor. The delay circui in demodulaing generaes phase difference, which becomes π/2 [rad] a he ime bi rae is referenced. As his phase difference does no depend on he inpu bi rae, he delay ime is consan despie he inpu bi rae. In oher words, he high-level period of Exclusive-OR (EXOR) circui oupu is consan wihou having o depend on he inpu bi rae. The low-level period of EXOR circui oupu, on he oher hand, depends on he inpu bi rae [Fig. 3]. Therefore, only he low-level period of EXOR circui oupu changes according o he frequency modulaion componens. Modulaion componens are convered o oupu duy rae in his way by he EXOR circui and delay circui. Fig. 4 is a circui diagram of he EXOR circui. The change in he EXORcircui oupu duy rae is convered o an average volage by he low-pass filer. The oupu of he low-pass filer in he demodulaor can be approximaed wih formula (1) where V H is he oupu ampliude of he EXOR circui, 1 is he high-level period of EXOR circui oupu, and 0 is he low-level period of EXOR circui oupu. x 1 1 + 0 æ - ö - x Vpeak = å VH ç 1- e e k = 1 è ø (1) The oupu average volage of he low-pass filer in he delay deecion circui is proporional o he inpu bi rae. We can see he oupu volage of he low-pass filer srongly depend on he EXOR circui ampliude (V H ). Therefore, he operaion characerisics of he EXOR circui are he key o improving demodulaion characerisics. We used an EXOR circui, which consiss of curren mode logic (CML) [Fig. 4]. Curren mode logic effecively obains higher-speed operaions. Neverheless, parasiic capaciance degrades he operaion characerisics of he EXOR circui a high frequency. Therefore, we had o consider he influence of parasiic capaciance. Here, we can calculae he frequency characerisics of he EXOR circui from a small-signal equivalen circui [Fig. 5] wih formula (2), where parasiic capaciance (C p ) degrades gain in he EXOR circui a high frequency. Fig. 6 plos he frequency characerisics of he EXOR circui used in he simulaion. The high-frequency componens degrade Fig. 2. Block diagram of convenional delay deecion circui. Fig. 4. Deailed view of EXOR circui used for phase comparison. Fig. 3. Overview of phase comparison operaion in demodulaor. Fig. 5. Small-signal equivalen circui of EXOR circui.

744 KOSUKE FURUICHI e al : DESIGN OF HIGH-LINEARITY DELAY DETECTION CIRCUIT FOR 10-Gb/s COMMUNICATION Fig. 8. Block diagram of proposed delay deecion circui. Fig. 6. Gain characerisics of EXOR circui a all inpu gaes. Fig. 9. Consrucion of he compensaion circui in emphasis circui. Fig. 7. Degradaion of demodulaion characerisics caused by deerioraion of he EXOR circui gain. more han hose of low-frequency. Consequenly, he oupu volage of he low-pass filer loses he proporional relaionship wih he inpu bi rae when he daa speed increases. Demodulaion characerisics deeriorae when he daa speed increases for his reason [Fig. 7]. To avoid his, we propose using he emphasis echnique for he delay deecion circui. G exor = - g RD 1 + jwc R (2) m1 ( w) III. USING EMPHASIS TECHNIQUE FOR DELAY DETECTION 1. Emphasis Technique and Characerisics We propose a circui o deec high-lineariy delay by using an emphasis echnique. Fig. 8 shows he proposed p D demodulaor, which adops a high-pass filer as an emphasis circui [Fig. 9] [6]. The emphasis pah in he circui generaes high frequency componens. A signal generaed in he emphasis pah is combined wih he signal in he main pah o compensae for degradaion and he high frequency componens depend on he ime consan of he high-pass filer (T). The T in he emphasis circui represens C R R E R + R 1 2 1 2. Here, he emphasis characerisics are he amoun of emphasis, he emphasis frequency band, and he leading phase characerisics of he high-pass filer. The leading phase characerisics affec he duy rae of EXOR oupu which depend on he frequency componens. We herefore considered heir influence by using he group delay characerisics, which indicaed he difference in he relaive delay ime. Group delay deviaion causes waveform disorion, which appears as jier in EXOR circui oupu. This jier affecs he resul of he phase comparison in he EXOR circui. Therefore, we had o resrain group delay deviaion in he emphasis circui when deermining he circui parameers. 2. Dependence of he Emphasis Characerisics on ime Consan of High-pass Filer The emphasis characerisics depend on he ime consan of he high-pass filer. The gain and he group

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 745 Table 1. Resuls from dependence emphasis characerisics on T T [ps] ΔG [db] ΔT g [ps] Jier [ps] 19.9 2.73 18 0.82 39.8 3.23 35 1.66 79.6 3.51 69 2.33 Fig. 10. Small-signal equivalen circui of emphasis circui. delay characerisics could be evaluaed by using a smallsignal equivalen circui. The gain and he group delay obained from he small-signal equivalen circui [Fig. 10] are G emp ( w) gmc RD jwtg me RD = - - 1+ jwc R 1+ jwt 1+ jwc R ( )( ) p D p D (3) and T ( w) = - T 1 + w T (4) g _ emp 2 2 (a) Fig. 11 plos T he dependence of gain characerisics on T in he emphasis circui, where he amoun of emphasis is ΔG and group delay deviaion is ΔT g. These emphasis characerisics obained from circui simulaion are summarized in Table 1, where he inpu signals are 20 Gb/s (PN 7). The amoun of he emphasis and frequency band increase as T increases, and group delay deviaion also increases. Consequenly, i is necessary o deermine he appropriae circui parameers o be used in he emphasis circui. 3. Mehod of Designing Circui o Deec High-lineariy Delay The demodulaion characerisics srongly depend on he average volage of he signal, which is he resul obained from comparing phase in he demodulaor. Thus, we calculaed he average volage using a small-signal equivalen circui of he EXOR circui and he emphasis circui o deermine he appropriae circui parameers agains he degradaion in lineariy. The average volage enabled us o calculae he average volage from he ransien response of he oupu signal. Therefore, we obained he ransien responses of he EXOR and (b) Fig. 11. Resul from simulaion of dependence of emphasis characerisics on parameer T (a) Gain, (b) Group delay. emphasis circuis [v exor () and v emp ()] by using he inverse Laplace ransform on G exor (ω) and G emp. (ω). We calculaed he demodulaion characerisics by comparing he lineariy characerisics by using ransien response formulas [7]. æ - ö vexor gm 1RD 1 e vin ç è ø Cp RD ( ) = ç - ( ) (5)

746 KOSUKE FURUICHI e al : DESIGN OF HIGH-LINEARITY DELAY DETECTION CIRCUIT FOR 10-Gb/s COMMUNICATION and æ - ö vemp gmc RD e vin ç è ø Cp RD ( ) = ç 1- ( ) TgmE R æ - - ö D T Cp RR + e - e vin T - C pr ç D è ø ( ) (6) Here, he emphasis characerisics are he amoun of emphasis, he emphasis frequency band, and group delay deviaion. The amoun of emphasis can be conrolled by using an exernal erminal (VDDA). On he oher hand, he amoun of jier which is caused by group delay deviaion depends on group delay deviaion and he inpu bi paern. Hence, i is difficul o calculae he amoun of jier. Therefore, we designed T by focusing on he emphasis frequency band. Fig. 12(a) plos he ransien responses of EXOR circui oupu and hose of emphasis circui oupus. We compare several Ts (T 1, T 2, and T 3 ) in he emphasis circui in Fig. 12(a). Fig. 12(b) plos he average volage of he oupu signal obained from v exor () and v emp (). We compared he lineariy of average volage in Fig. 12(b) o verify he lineariy of deecion characerisics. Here, we used he coefficien of deerminaion (R 2 ) as an index of lineariy [8]. The R 2 become one, when here was no deerioraion in he deecion characerisics. As he deecion characerisics deerioraed, R 2 decreased from one. The lineariy of he deecion characerisics was higher han ha of a demodulaor wihou emphasis from he value of R 2 [Fig. 12(b)]. Therefore, we could confirm demodulaion characerisics had improved by adaping he emphasis echnique o he delay deecion circui. Therefore, we deermined he appropriae parameers for T by using formulas (5) and (6). When T was lower han he appropriae value (T 1 ), he emphasis frequency band became high. In his case, he emphasis frequency band became higher han he deerioraed frequency band in he EXOR circui. Therefore, he deecion characerisics remained deerioraed. In conras, when T was larger han he appropriae value (T 3 ), he emphasis frequency band became low. In his case, he lineariy of deecion characerisics remained deerioraed. In oher words, he emphasis circui no only compensaed for he high frequency band, which degraded he EXOR circui, bu also he low frequency band, which did no degraded he EXOR circui. The lineariy of deecion characerisics (a) (b) Fig. 12. Demodulaion characerisics obained from heoreical formulas (a) Phase deecive signals, (b) Average volge of oupu. became maximum when T was T 2 [Fig. 12(b)] from he value of he R 2. Thus, we fixed he appropriae parameer o T 2. We nex invesigaed he effec of jier ha was caused by group delay deviaion on he demodulaion characerisics. Fig. 13(a) plos he resuls obained from simulaing he demodulaion characerisics. We calculaed he coefficien of deerminaion (R 2 ) from he demodulaion characerisics [Fig. 13(b)], where he lineariy of demodulaion-characerisics deeriorae due o group delay deviaion, when T becomes as large as T 3. In conras, he demodulaion characerisics reain high lineariy, when group delay deviaion is sufficienly resrained like ha in T 1 and T 2. We confirmed ha group delay deviaion was sufficienly resrained, when he ime

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 747 (a) Fig. 14. Phoogragh of fabricaed chip. (b) Fig. 13. Resuls from simulaing demodulaion characerisics in proposed demodulaor (a) Dependence of demodulaion characerisics on T, (b) Coefficien of deerminaion. (a) consan of high-pass filer was 31.5 [ps], which is he same as he appropriae parameer ha was deermined wih he heoreical formula. Therefore, we fixed he appropriae parameer of T o 31.5 [ps] in he proposed demodulaor. IV. EXPERIMENTAL RESULTS We fabricaed an IC wih a delay deecion circui using he 65-nm CMOS process [Fig. 14] o confirm he advanages of he proposed delay deecion circui. The ime consan for he high-pass filer [T] was 31.5 [ps] in he IC. When measuring he fabricaed IC, he inpu signal was generaed by using a pulse-paern-generaor (PPG). The PPG oupu signal was a PRBS (2 7-1) signal. We changed he bi-rae of he inpu signal from 10 Gb/s o 12.5 Gb/s. In his way, we changed he frequency of (b) Fig. 15. Experimenal resuls for fabricaed IC (a) Experimenal resul, (b) Comparison of lineariy. he inpu-signal as a subsiue for frequency modulaion. The experimenal resuls and he lineariy of he deecion characerisics are ploed in Fig. 15. The IC

748 KOSUKE FURUICHI e al : DESIGN OF HIGH-LINEARITY DELAY DETECTION CIRCUIT FOR 10-Gb/s COMMUNICATION Table 2. Comparison wih circui composiions Inpu bi rae R 2 of each circui composiion [Gb/s] Convenional Proposed achieved 10% higher lineariy han a receiver wihou emphasis by applying he appropriae VDDA. The resuls we obained from measuremens are summarized in Table 2. Ⅴ. CONCLUSION We described improvemens o he performance of a delay deecion circui used as a receiver. We improved he lineariy of he deecion characerisics of he receiver by using an emphasis circui. We deermined he circui parameers in implemening he design by using a small-signal equivalen circui. We fabricaed an IC by using he 65-nm CMOS process. The experimenal resuls confirmed ha he lineariy of he deecion characerisics was improved by deermining he circui parameers on he basis of heoreical formulas and applying an appropriae volage o he VDDA. The IC achieved 10% higher deecion-characerisic lineariy han a receiver wihou emphasis a 10 Gb/s. ACKNOWLEDGMENTS Par of his research was suppored by Grans-in-Aid for Scienific Research from he Japan Sociey for he Promoion of Science. REFERENCES Difference in R 2 10 \ \ \ 10.5 1 1 0 11 0.903 0.998 0.095 11.5 0.920 0.963 0.043 12 0.960 0.981 0.021 12.5 0.970 0.982 0.012 [1] O. Suzuki, e al, R & D on he Digial Coheren Signal Processing Technology for Large-capaciy Opical Communicaion Neworks, Technical Repor of IEICE, vol.95,no.12, pp. 1100-1116, December., 2012. [2] A. G. Malis and W. A. Simpson, PPP over SONET/ SDH, RFC-2615,. June 1999. [3] H. Toyoda, e al, Signal Transmission and coding Archiecure for Nex-Generaion Eherne, Trans. Inf. & Sys., vol.e86-d, No.11, pp.2317-2324, November, 2003. [4] D. Omoo i, e al, Simple Rouing Conrol Sysem for 10 Gb/s Daa Transmission Using a Frequency Modulaion Technique, IEIE Transacions on Smar Processing and Compuind, vol.5,no.3, pp199-206, June 2016. [5] K. Furuichi, e al,. Bandwidh of he Delay Deecion Circui according Emphasis Circui, The Insiue of Elecronics, Informaion and Communicaion Engineers, p.25, 2015. [6] T. Tanaka, e al, A 32-Gb/s Inducorless Oupu Buffer Circui wih Adjusble Pre-emphasis in 65- nm CMOS, IEIE Transacions on Smar Processing and Compuind, vol.5,no.3, pp207-214, June 2016. [7] K. Furuichi, e al, Design of High-Lineariy Delay Deecion Circui for 10-Gb/s Communicaion Sysem in 65-nm CMOS, [8] W. Mendenhall, Inroducion o Probabiliy and Saisics, p.518, 2008. Kosuke Furuichi was born in Shiga, Japan, on January 9, 1993. He received a BSc in elecronic sysems engineering from The Universiy of Shiga Prefecure in 2015. The same year, he enrolled in a maser s course a he Graduae School of Engineering in The Universiy of Shiga Prefecure. His research ineres is an ulra-high-speed IC design. Hiromu Uemura was born in Kyoo, Japan, on May 8, 1992. He received a BSc in elecronic sysems engineering from The Universiy of Shiga Prefecure in 2016. The same year, he enrolled in a maser s course a he Graduae School of Engineering in The Universiy of Shiga Prefecure. His research ineres is high-performance RF communicaions sysems.

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 749 Nasuyuki Koda was born in Shiga, Japan, on June 15h, 1993. He received a BSc in elecronic sysems engineering from The Universiy of Shiga Prefecure in 2016. The same year, he enrolled in a maser s course a he Graduae School of Engineering in The Universiy of Shiga Prefecure. His research ineres is high-performance RF communicaions sysems. Hiromi Inaba was born in Tokyo, Japan, on Sepember 1, 1950. He received a BSc and a Dr.Eng. from Hokkaido Universiy, Hokkaido, Japan, in 1974 and 1997, respecively. In 1974, he joined Hiachi Research Laboraory, Hiachi, Ld., Ibaraki, Japan. He has been engaged in research and developmen of an elevaor and seel conrol sysem. In 2008, he became a Professor wih he School of Engineering, The Universiy of Shiga Prefecure, Shiga, Japan. Dr. Inaba is a member of he IEEE Indusry Applicaions Sociey (IAS) and he Insiue of Elecrical Engineers (IEE) of Japan. Keiji Kishine (M97') received a BSc and an MSc in engineering science from Kyoo Universiy, Kyoo, Japan, and a PhD in informaics from Kyoo Universiy, Kyoo, Japan, in 1990, 1992, and 2006, respecively. In 1992, he joined he Elecrical Communicaion Laboraories, Nippon Telegraph and Telephone Corporaion (NTT), Tokyo, Japan. He has been engaged in he research and design of high-speed, low-power circuis for gigabis-per-second LSIs using Sibipolar ransisors, wih applicaion o opical communicaions sysems for NTT Sysem Elecronics Laboraories, Kanagawa, Japan. Since 1997, he has been working on research and developmen of gigabis-per-second clock and daa recovery ICs for he Nework Service Innovaion Laboraory in NTT Nework Innovaion Laboraories, Kanagawa, Japan. He worked a he Ubiquious Inerface Laboraory in NTT Microsysems Inegraion Laboraories, Kanagawa, Japan. Since 2008, he has been an Associae Professor wih he School of Engineering, The Universiy of Shiga Prefecure, Shiga, Japan. Dr. Kishine is a member of he IEEE Solid-Sae Circuis Sociey (SSCS) and Circuis and Sysems (CAS), he Insiue of Elecronics, Informaion and Communicaion Engineers (IEICE) of Japan, and he Insiue of Elecrical Engineers (IEE) of Japan.