Order code V DS R DS(on) max I D

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Transcription:

Datasheet N-channel 6 V,.23 Ω typ., 13 A, MDmesh M2 EP Power MOSFET in a TO-22FP package Features TO-22FP D(2) 1 2 3 Order code V DS R DS(on) max I D STF2N6M2-EP 6 V.278 Ω 13 A Extremely low gate charge Excellent output capacitance (C OSS ) profile Very low turn-off switching losses 1% avalanche tested Zener-protected Applications G(1) Switching applications Tailored for very high frequency converters (f > 15 khz) S(3) AM15572v1_no_tab Description This device is an N-channel Power MOSFET developed using MDmesh M2 enhanced performance (EP) technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering it suitable for the most demanding very high frequency converters. Product status STF2N6M2-EP Product summary Order code Marking Package Packing STF2N6M2-EP 2N6M2EP TO-22FP Tube DS11486 - Rev 4 - June 218 For further information contact your local STMicroelectronics sales office. www.st.com

Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ±25 V V GS Transient gate-source voltage (t p 1 ns) ±35 V I (1) D Drain current (continuous) at T C = 25 C 13 A I (1) D Drain current (continuous) at T C = 1 C 8 A I (2) DM Drain current (pulsed) 52 A P TOT Total dissipation at T C = 25 C 25 W dv/dt (3) Peak diode recovery voltage slope 15 V/ns dv/dt (4) MOSFET dv/dt ruggedness 5 V/ns V ISO T stg T j Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, T c = 25 C) Storage temperature range Operating junction temperature range 2.5 kv -55 to 15 C 1. Limited by maximum junction temperature 2. Pulse width limited by safe operating area. 3. I SD 13 A, di/dt 4 A/µs, V DS(peak) < V (BR)DSS, V DD = 4 V 4. V DS 48 V Table 2. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case 5 C/W R thj-amb Thermal resistance junction-ambient 62.5 C/W Table 3. Avalanche characteristics Symbol Parameter Value Unit I AR E AS Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) Single pulse avalanche energy (starting T j = 25 C, I D = I AR, V DD = 5 V) 2.7 A 138 mj DS11486 - Rev 4 page 2/14

Electrical characteristics 2 Electrical characteristics T C = 25 C unless otherwise specified Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage Drain current V GS = V, I D = 1 ma 6 V V GS = V, V DS = 6 V 1 µa V GS = V, V DS = 6 V, T C = 125 C (1) 1 µa I GSS Gate-body leakage current V DS = V, V GS = ±25 V ±1 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 25 µa 3.25 4 4.75 V R DS(on) Static drain-source onresistance V GS = 1 V, I D = 6.5 A.23.278 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 787 - C oss Output capacitance V DS = 1 V, f = 1 MHz, V GS = V - 5 - pf C rss Reverse transfer capacitance - 1.2 - C oss eq. (1) Equivalent output capacitance V DS = to 48 V, V GS = V - 89 - pf R G Intrinsic gate resistance f = 1 MHz, I D = A - 5.9 - Ω Q g Total gate charge V DD = 48 V, I D = 13 A, V GS = to 1 V - 22 - Q gs Gate-source charge (see Figure 15. Test circuit for gate - 3.5 - Q gd Gate-drain charge charge behavior) - 1.5 - nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from to 8% V DSS Table 6. Switching energy Symbol Parameter Test conditions Min. Typ. Max. Unit E off Turn-off energy (from 9% V GS to % I D ) V DD = 4 V, I D = 2 A, R G = 4.7 Ω, V GS = 1 V V DD = 4 V, I D = 5 A, R G = 4.7 Ω, V GS = 1 V - 7.2 - μj - 2.4 - μj DS11486 - Rev 4 page 3/14

Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time - 1.5 - ns t r Rise time V DD = 3 V, I D = 6.5 A, R G = 4.7 Ω, V GS = 1 V (see Figure 14. Test circuit - 5.2 - ns t d(off) Turn-off delay time for resistive load switching times and Figure 19. Switching time waveform) - 41 - ns t f Fall time - 8 - ns Table 8. Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 13 A I (1) SDM Source-drain current (pulsed) - 52 A V (2) SD Forward on voltage V GS = V, I SD = 13 A - 1.6 V t rr Reverse recovery time I SD = 13 A, di/dt = 1 A/µs, V DD = 6 V - 23 ns Q rr Reverse recovery charge (see Figure 16. Test circuit for inductive load switching and diode recovery - 2.3 µc I RRM Reverse recovery current times ) - 2 A t rr Reverse recovery time I SD = 13 A, di/dt = 1 A/µs, V DD = 6 V, - 287 ns Q rr Reverse recovery charge T j = 15 C (see Figure 16. Test circuit for inductive load switching and diode - 2.9 µc I RRM Reverse recovery current recovery times) - 2.2 A 1. Pulse width is limited by safe operating area 2. Pulsed: pulse duration = 3 µs, duty cycle 1.5% DS11486 - Rev 4 page 4/14

Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance ID [ A] 1 1 Operation in this area is limited by R DS(on) GIPD2212161348SOA t p = 1 µs t p = 1 µs K δ=.5 δ=.2 1-1 Single pulse.2.1.5.1 GC294_ZTH.1 single pulse, T = 25 C, T 15, V GS = 1 V t p = 1ms tp = 1 ms 1-2.1.1 1 1 1 V DS[V] 1-3 1-4 1-3 1-1 1 1-2 tp(s) Figure 3. Output characteristics Figure 4. Transfer characteristics I D (A) 3 25 GIPG182216958OCH VGS = 8, 9, 1 V VGS = 7 V I D (A) 3 25 VDS = 17 V GIPG922161518TCH 2 2 15 VGS = 6 V 15 1 1 5 VGS = 5 V 5 4 8 12 16 V DS (V) 3 4 5 6 7 V GS (V) Figure 5. Gate charge vs gate-source voltage Figure 6. Static drain-source on-resistance V GS (V) GIPG211216166QVG V DS (V) R DS(on) (Ω) GIPG222161146RID 12 1 VDD = 48 V, ID V = 13 A DS 6 5.24 V GS = 1 V 8 4.235 6 3.23 4 2 2 1.225 5 1 15 2 25 Q g (nc).22 2 4 6 8 1 12 ID (A) DS11486 - Rev 4 page 5/14

Electrical characteristics (curves) Figure 7. Capacitance variations Figure 8. Output capacitance stored energy C (pf) GIPG2112161637CVR E OSS (µj) GIPG211216126EOS 1 Ci ss 6 5 1 Coss 4 3 1 C rss 2 1 1.1 1 1 1 V DS (V) 1 2 3 4 5 6 V DS (V) Figure 9. Normalized V (BR)DSS vs temperature V (BR)DSS (norm.) 1.8 1.4 1..96.92 I D = 1 ma GIPG41215V3PBDV Figure 1. Normalized gate threshold voltage vs temperature V GS(th) (norm.) 1.1 1..9.8.7 I D = 25 µa GIPG41215V3PVTH.88-75 -25 25 75 125 T j ( C).6-75 -25 25 75 125 T j ( C) Figure 11. Normalized on-resistance vs temperature Figure 12. Source-drain diode forward characteristics R DS(on) (norm.) 2.2 V GS = 1 V GIPG41215V3PRON V SD (V) 1.1 GIPG21121612SDF TJ = -5 C 1.8 1 1.4 1..9.8.7 TJ = 25 C TJ = 15 C.6.6.2-75 -25 25 75 125 T j ( C).5 2 4 6 8 1 12 I SD (A) DS11486 - Rev 4 page 6/14

Electrical characteristics (curves) Figure 13. Turn-off switching energy vs drain current Eoff [µj] GIPG322161548SDF 3 25 VDD = 4 V RG = 4.7 Ω VGS = 1 V 2 15 1 5 1 2 3 4 5 6 7 Id [A] DS11486 - Rev 4 page 7/14

Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD VD RL + 22 μf 3.3 μf VDD VGS 12 V IG= CONST 47 kω 1 Ω 1 nf D.U.T. 1 kω VGS pulse width RG D.U.T. pulse width 22 μf + 2.7 kω 47 kω VG 1 kω AM1468v1 AM1469v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit G 25 Ω A D D.U.T. S B A fast diode B A B G 1 µh 3.3 1 D µf + µf VDD D.U.T. VD ID L + 22 µf 3.3 µf VDD + _ RG S Vi pulse width D.U.T. AM1471v1 AM147v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton toff VD td(on) tr td(off) tf IDM 9% 1% 9% ID 1% VDS VDD VDD VGS 9% 1% AM1472v1 AM1473v1 DS11486 - Rev 4 page 8/14

Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS11486 - Rev 4 page 9/14

TO-22FP package information 4.1 TO-22FP package information Figure 2. TO-22FP package outline 71251_Rev_12_B DS11486 - Rev 4 page 1/14

TO-22FP package information Table 9. TO-22FP package mechanical data Dim. mm Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E.45.7 F.75 1 F1 1.15 1.7 F2 1.15 1.7 G 4.95 5.2 G1 2.4 2.7 H 1 1.4 L2 16 L3 28.6 3.6 L4 9.8 1.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DS11486 - Rev 4 page 11/14

Revision history Table 1. Document revision history Date Revision Changes 29-Feb-216 1 First release. 18-Aug-216 2 2-Mar-218 3 4-Jun-218 4 Modified: Table 2: "Absolute maximum ratings" Minor text changes Removed maturity status indication from cover page. The document status is production data. Updated Table 1. Absolute maximum ratings, Table 4. On/off states and Table 5. Dynamic. Updated Figure 1. Safe operating area, Figure 3. Output characteristics, Figure 4. Transfer characteristics and Figure 5. Gate charge vs gate-source voltage. Minor text changes. Modified Table 1. Absolute maximum ratings. Modified Figure 1. Safe operating area. Modified Table 8. Source-drain diode. Minor text changes. DS11486 - Rev 4 page 12/14

Contents Contents 1 Electrical ratings...2 2 Electrical characteristics...3 2.1 Electrical characteristics (curves)... 5 3 Test circuits...8 4 Package information...9 4.1 TO-22FP package information...9 Revision history...12 DS11486 - Rev 4 page 13/14

IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 218 STMicroelectronics All rights reserved DS11486 - Rev 4 page 14/14