FDS776A N-Channel Logic Level PowerTrench MOSFET February 2 PRELIMINARY FDS776A General Description This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor s advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Applications DC/DC converter Features 5 A, 3 V. R DS(ON) = 5.5 mω @ V GS = V R DS(ON) = 8 mω @ V GS = 4.5 V. Low gate charge (37nC typical) Fast switching speed. High performance trench technology for extremely low R DS(ON). High power and current handling capability. Load switch Motor drives D D D D 5 6 4 3 SO-8 S G S S 7 8 2 Absolute Maximum Ratings TA=25 o C unless otherwise noted Symbol Parameter Ratings Units V DSS Drain-Source Voltage 3 V V GSS Gate-Source Voltage ±2 V I D Drain Current Continuous (Note a) 5 A P D Pulsed 6 Power Dissipation for Single Operation (Note a) 2.5 (Note b).2 (Note c) T J, T STG Operating and Storage Junction Temperature Range -55 to +5 C Thermal Characteristics R θja Thermal Resistance, Junction-to-Ambient (Note a) 5 C/W R θja Thermal Resistance, Junction-to-Ambient (Note c) 5 ( sec) C/W R θjc Thermal Resistance, Junction-to-Case (Note ) 3 C/W Package Outlines and Ordering Information Device Marking Device Reel Size Tape Width Quantity FDS776A FDS776A 3 2mm 25 units W 999 Fairchild Semiconductor Corporation FDS776A Rev. B (W)
DMOS Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain Source Breakdown Voltage V GS = V, I D = 25 µa 3 V BVDSS T J Breakdown Voltage Temperature Coefficient I D = 25 µa, Referenced to 25 C 24 mv/ C I DSS Zero Gate Voltage Drain Current V DS = 24 V, V GS = V µa I GSSF Gate Body Leakage, Forward V GS = 2 V, V DS = V na I GSSR Gate Body Leakage, Reverse V GS = 2 V V DS = V na FDS776A On Characteristics (Note 2) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 25 µa.6 3 V VGS(th) T J R DS(on) Gate Threshold Voltage Temperature Coefficient Static Drain Source On Resistance I D = 25 µa, Referenced to 25 C -5 mv/ C V GS = V, I D = 5 A V GS = V, I D = 5 A, T J = 25 C V GS = 4.5 V, I D = 3 A I D(on) On State Drain Current V GS = V, V DS = 5 V 5 A g FS Forward Transconductance V DS = V, I D = 5 A 65 S Dynamic Characteristics C iss Input Capacitance V DS = 5 V, V GS = V, 354 pf C oss Output Capacitance f =. MHz 23 pf Reverse Transfer Capacitance 37 pf C rss Switching Characteristics (Note 2) t d(on) Turn On Delay Time V DD = 5 V, I D = A, 3 2 ns t r Turn On Rise Time V GS = V, R GEN = 6 Ω 2 9 ns t d(off) Turn Off Delay Time 78 25 ns Turn Off Fall Time 32 5 ns t f Q g Total Gate Charge V DS = 5 V, I D = 5 A, 37 55 nc Q gs Gate Source Charge V GS = 5 V nc Gate Drain Charge 2 nc Q gd Drain Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain Source Diode Forward Current 2. A V SD Drain Source Diode Forward Voltage V GS = V, I S = 2. A (Note 2).7.2 V Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. 4.5 7 6 5.5 8 mω a) 5 /W when mounted on a in 2 pad of 2 oz copper b) 5 /W when mounted on a.4 in 2 pad of 2 oz copper c) 25 /W when mounted on a minimum pad. Scale : on letter size paper 2. Pulse Test: Pulse Width < 3µs, Duty Cycle < 2.% FDS776A Rev. B (W)
Typical Characteristics I D, DRAIN CURRENT (A) 6 V GS = V 4.V 5 5. 3.5V 4 3.V 3 2 2.5V R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.8.6.4.2 V GS = 4.V 4.5V 5.V 6.V 7.V V FDS776A.5.5 V DS, DRAIN-SOURCE VOLTAGE (V).8 2 3 4 5 6 I D, DRAIN CURRENT (A) Figure. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE.6.4.2.8 I D = 9A V GS = V R DS(ON), ON-RESISTANCE (OHM).2.5..5 T A = 25 o C T A = 25 o C I D = 7.5 A.6-5 -25 25 5 75 25 5 T J, JUNCTION TEMPERATURE ( o C) 2 4 6 8 V GS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. I D, DRAIN CURRENT (A) 8 V DS = 5V T A = -55 o C 7 25 o C 6 25 o C 5 4 3 2.5 2 2.5 3 3.5 4 V GS, GATE TO SOURCE VOLTAGE (V) I S, REVERSE DRAIN CURRENT (A) V GS = V T A = 25 o C 25 o C. -55 o C....2.4.6.8.2.4 V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS776A Rev. B (W)
Typical Characteristics V GS, GATE-SOURCE VOLTAGE (V) I D = 7.5A 8 6 4 2 V DS = 5V 5V V CAPACITANCE (pf) 6 5 4 3 2 C ISS C OSS C RSS f = MHz V GS = V FDS776A 2 3 4 5 6 Q g, GATE CHARGE (nc) 5 5 2 25 3 V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. I D, DRAIN CURRENT (A). R DS(ON) LIMIT V GS = V SINGLE PULSE R θja = 25 o C/W T A = 25 o C µs ms ms ms s s DC... V DS, DRAIN-SOURCE VOLTAGE (V) P(pk), PEAK TRANSIENT POWER (W) 5 4 3 2 SINGLE PULSE R θja = 25 C/W T A = 25 C.. t, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE.. D =.5.2..5.2. SINGLE PULSE R θja (t) = r(t) + R θja R θja = 25 C/W T J - T A = P * R θja (t) Duty Cycle, D = t / t 2..... t, TIME (sec) Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note c. Transient thermal response will change depending on the circuit board design. P(pk) t t 2 FDS776A Rev. B (W)
ELECTRO MAGN ETI C, MAG NETIC O R R ADIO ACTIVE FI ELD S TNR DATE PT NUMBER PEEL STRENGTH MIN gms MAX gms SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure. ELECTROSTATIC SENSITIVE DEVICES DO NO T SHI P OR STO RE N EAR STRO NG ELECTROSTATIC ESD Label Antistatic Cover Tape Static Dissipative Embossed Carrier Tape Packaging Description: SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,5 units per 3" or 33cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 5 units per 7" or 77cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure.) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. F63TNR Label Customized Label Note/Comments SOIC (8lds) Packaging Information Packaging Option Standard (no flow code) L86Z F D84Z Packaging type TNR Rail/Tube TNR TNR Qty per Reel/Tube/Bag 2,5 95 4, 5 Reel Size 3" Dia - 3" Dia 7" Dia Box Dimension (mm) 343x64x343 53x3x83 343x64x343 84x87x47 Max qty per Box 5, 3, 8,, Weight per unit (gm).774.774.774.774 Weight per Reel (kg).66 -.9696.82 SOIC-8 Unit Orientation Pin 343mm x 342mm x 64mm Standard Intermediate box F63TNR Label sample LOT: CBVK74B9 QTY: 25 F63TNLabel ESD Label F63TN Label FSID: FDS9953A SPEC: ESD Label D/C: D9842 QTY: SPEC REV: D/C2: QTY2: CPN: N/F: F (F63TNR)3 SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2. Carrier Tape Cover Tape Trailer Tape 64mm minimum or 8 empty pockets Components Leader Tape 68mm minimum or 2 empty pockets July 999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3. T P D E F K Wc B E2 W Tc A P D User Direction of Feed Dimensions are in millimeter Pkg type A B W D D E E2 F P P K T Wc Tc SOIC(8lds) (2mm) 6.5 +/-. 5.3 +/-. 2. +/-.3.55 +/-.5.6 +/-..75 +/-..25 min 5.5 +/-.5 8. +/-. 4. +/-. 2. +/-..45 +/-.5 9.2 +/-.3.6 +/-.2 Notes: A, B, and K dimensions are determined with respect to the EIA/Jedec RS-48 rotational and lateral movement requirements (see sketches A, B, and C). 2 deg maximum.5mm maximum B Typical component cavity center line.5mm maximum 2 deg maximum component rotation Sketch A (Side or Front Sectional View) Component Rotation SOIC(8lds) Reel Configuration: Figure 4. A Sketch B (Top View) Component Rotation Typical component center line Sketch C (Top View) Component lateral movement W Measured at Hub Dim A Max Dim A max Dim N 7" Diameter Option See detail AA B Min Dim C See detail AA W3 Dim D min 3" Diameter Option W2 max Measured at Hub DETAIL AA Tape Size Reel Option Dimensions are in inches and millimeters Dim A Dim B Dim C Dim D Dim N Dim W Dim W2 Dim W3 (LSL-USL) 2mm 7" Dia 7. 77.8.59.5 52 +.2/-.8 3 +.5/-.2.795 2.2 2.65 55.488 +.78/-. 2.4 +2/.724 8.4.469.66.9 5.4 2mm 3" Dia 3. 33.59.5 52 +.2/-.8 3 +.5/-.2.795 2.2 7. 78.488 +.78/-. 2.4 +2/.724 8.4.469.66.9 5.4 998 Fairchild Semiconductor Corporation July 999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S) : Scale : on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram):.774 9 September 998, Rev. A
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