Data Sheet No. PD014-D Features Floating channel designed for bootstrap operation Fully operational to +00V Tolerant to negative transient voltage dv/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V and V input logic compatible Matched propagation delay for both channels Logic and power ground +/- V offset. Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4A/1.8A Description The IR2184(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for Typical Connection Part Packages IR2184(4)(S) HALF-BRIDGE DRIVER 8-Lead SOIC IR2184S 8-Lead PDIP IR2184 14-Lead PDIP IR21844 14-Lead SOIC IR21844S IR2181/IR2183/IR2184 Feature Comparison Input logic Crossconduction prevention logic Dead-Time Ground Pins Ton/Toff 2181 H/L no none 21814 VSS/ 2183 Internal 00ns H/L yes 21834 Program 0.4 ~ us VSS/ 2184 Internal 00ns / yes 21844 Program 0.4 ~ us VSS/ 180/220 ns 180/220 ns 80/20 ns minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 00 volts. up to 00V TO AD IR2184 up to 00V IR21844 TO AD (Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. S R S www.irf.com 1
Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units High side floating absolute voltage -0.3 2 High side floating supply offset voltage - 2 + 0.3 V High side floating output voltage - 0.3 + 0.3 Low side and logic fixed supply voltage -0.3 2 V Low side output voltage -0.3 + 0.3 Programmable dead-time pin voltage (IR21844 only) S - 0.3 + 0.3 V Logic input voltage ( & ) S - 0.3 S + 10 S Logic ground (IR21844 only) - 2 + 0.3 d /dt Allowable offset supply voltage transient 0 V/ns P D Package power dissipation @ T A +2 C (8-lead PDIP) 1.0 (8-lead SOIC) 0.2 (14-lead PDIP) 1. W (14-lead SOIC) 1.0 Rth JA Thermal resistance, junction to ambient (8-lead PDIP) 12 (8-lead SOIC) 200 (14-lead PDIP) C/W (14-lead SOIC) 120 T J Junction temperature 10 T S Storage temperature -0 10 C T L Lead temperature (soldering, 10 seconds) 300 Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The and S offset rating are tested with all supplies biased at 1V differential. Symbol Definition Min. Max. Units VB High side floating supply absolute voltage + 10 + 20 High side floating supply offset voltage Note 1 00 V High side floating output voltage Low side and logic fixed supply voltage 10 20 V Low side output voltage 0 V V Logic input voltage ( & ) S S + Programmable dead-time pin voltage (IR21844 only) S S Logic ground (IR21844 only) - T A Ambient temperature -40 12 C Note 1: Logic operational for of - to +00V. Logic state held for of -V to -S. (Please refer to the Design Tip 9-3 for more details). Note 2: and are internally clamped with a.2v zener diode. 2 www.irf.com V
Dynamic Electrical Characteristics IAS (, S ) = 1V, S =, C L = 1000 pf, T A = 2 C, = VSS unless otherwise specified. IR2184(4) (S) Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay 80 900 = 0V toff Turn-off propagation delay 20 400 = 0V or 00V tsd Shut-down propagation delay 180 20 MTon Delay matching, HS & LS turn-on 0 90 MToff Delay matching, HS & LS turn-off 0 40 tr Turn-on rise time 40 0 = 0V tf Turn-off fall time 20 3 = 0V Deadtime: turn-off to turn-on(-) & 280 400 20 R= 0 turn-off to turn-on (-) 4 µsec R = 200k M Deadtime matching = - - - 0 0 nsec R=0 0 00 R = 200k Static Electrical Characteristics IAS (, S ) = 1V, S =, = S and T A = 2 C unless otherwise specified. The V IL, V IH and I parameters are referenced to S / and are applicable to the respective input leads: and. The V O, I O and Ron parameters are referenced to and are applicable to the respective output leads: and. Symbol Definition Min. Typ. Max. Units Test Conditions V IH Logic 1 input voltage for & logic 0 for 2. = 10V to 20V V IL Logic 0 input voltage for & logic 1 for 0.8 = 10V to 20V V,TH+ input positive going threshold 2. = 10V to 20V V,TH- input negative going threshold 0.8 V = 10V to 20V V OH High level output voltage, IAS - V O 1.2 I O = 0A V OL Low level output voltage, V O 0.1 I O = 0A I LK Offset supply leakage current 0 = = 00V µa I QBS Quiescent S supply current 20 0 10 V = 0V or V I QCC Quiescent supply current 0.4 1.0 1. ma V = 0V or V I + Logic 1 input bias current 20 = V, = 0V µa I - Logic 0 input bias current 1 2 = 0V, = V UV+ and S supply undervoltage positive going 8.0 8.9 9.8 SUV+ threshold UV- and S dupply undervoltage negative going.4 8.2 9.0 SUV- threshold UVH Hysteresis 0.3 0. V SUVH I O+ Output high short circuit pulsed vurrent 1.4 1.9 V O = 0V, PW 10 µs I O- Output low short circuit pulsed current 1.8 2.3 A V O = 1V, PW 10 µs nsec www.irf.com 3
4 www.irf.com Functional Block Diagrams 2184 UV DETECT DELAY VS VB PULSE FILTER HV SHIFTER R R S Q UV DETECT PULSE GENERATOR VSS/ SHIFT VSS/ SHIFT +V DEAIME VCC 21844 UV DETECT DELAY VSS VS VB PULSE FILTER HV SHIFTER R R S Q UV DETECT PULSE GENERATOR VSS/ SHIFT VSS/ SHIFT +V DEAIME VCC
Lead Definitions Symbol Description VSS Lead Assignments IR2184(4) (S) Logic input for high and low side gate driver outputs ( and ), in phase with (referenced to for IR2184 and VSS for IR21844) Logic input for shutdown (referenced to for IR2184 and VSS for IR21844) Programmable dead-time lead, referenced to VSS. (IR21844 only) Logic Ground (21844 only) High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return 1 8 1 8 2 2 3 3 4 4 8-Lead PDIP 8-Lead SOIC IR2184 IR2184S 1 14 1 14 2 13 2 13 3 VSS 12 3 VSS 12 4 11 4 11 10 10 9 9 8 8 14-Lead PDIP IR21844 14-Lead SOIC IR21844S www.irf.com
8-Lead PDIP 01-014 01-3003 01 (MS-001AB) A E X D 8 1 2 3 4 e B H 0.2 [.010] A.4 [.2] 3X 1.2 [.00] FOOTPRT 8X 0.2 [.028] 8X 1.8 [.00] DIM CHES MILLIMETERS M MAX M MAX A A1.032.0040.088.0098 1.3 0.10 1. 0.2 b.013.020 0.33 0.1 c.00.0098 0.19 0.2 D E.189.149.198.14 4.80 3.80.00 4.00 e.00 BASIC 1.2 BASIC e1.02 BASIC 0.3 BASIC H K L y.2284.0099.01 0.2440.019.00 8.80 0.2 0.40 0.20 0.0 1.2 8 e1 A C y K x 4 8X b A1 0.2 [.010] C A B 0.10 [.004] 8X L 8X c NOT ES: 1. DIMENSIONG & TOLERANCG PER ASME Y14.M-1994. 2. CONTROLLG DIMENSION: MILLIMETER 3. DIMENSIONS ARE SWN MILLIMETERS [CHES]. 4. OUTLE CONFORMS TO JEDEC OUTLE MS-012AA. 8-Lead SOIC DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.1 [.00]. DIMENSION DOES NOT CLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.2 [.010]. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERG TO A SUBS TRATE. 01-02 01-0021 11 (MS-012AA) www.irf.com
14-Lead PDIP 01-010 01-3002 03 (MS-001AC) 14-Lead SOIC (narrow body) 01-019 01-303 00 (MS-012AB) www.irf.com
() () 0% 0% t on t r t off t f Figure 1. Input/Output Timing Diagram 90% 90% 10% 10% Figure 2. Switching Time Waveform Definitions 0% t sd 0% 0% 90% 90% - 10% Figure 3. Shutdown Waveform Definitions 90% - () () 0% 0% 10% M= - - - Figure 4. Deadtime Waveform Definitions 10% MT MT 90% Figure. Delay Matching Waveform Definitions IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9024 Tel: (310) 22-10 Data and specifications subject to change without notice. /24/2001 8 www.irf.com