Datasheet N-channel 600 V, 0.175 Ω typ., 18 A MDmesh M2 EP Power MOSFET in a TO-247 package Features TO-247 1 3 2 Order code V DS @ T Jmax R DS(on) max. I D STW25N60M2-EP 650 V 0.188 Ω 18 A Extremely low gate charge Excellent output capacitance (C OSS ) profile Very low turn-off switching losses 100% avalanche tested Zener-protected G(1) D(2, TAB) Applications Switching applications Tailored for Very high frequency converters (f > 150 khz) Description S(3) AM01476v1 This device is an N-channel Power MOSFET developed using MDmesh M2 enhanced performance (EP) technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering it suitable for the most demanding very high frequency converters. Product status link STW25N60M2-EP Product summary Order code Marking Package Packing STW25N60M2-EP 25N60M2EP TO-247 Tube DS11482 - Rev 3 - May 2018 For further information contact your local STMicroelectronics sales office. www.st.com
Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ± 25 V I D Drain current (continuous) at T C = 25 C 18 A I D Drain current (continuous) at T C = 100 C 11.3 A I (1) DM Drain current (pulsed) 72 A P TOT Total dissipation at T C = 25 C 150 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns T stg T j Storage temperature range Operating junction temperature range - 55 to 150 C 1. Pulse width limited by safe operating area. 2. I SD 18 A, di/dt 400 A/µs, V DS peak < V (BR)DSS, V DD = 400 V. 3. V DS 480 V Table 2. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case 0.83 C/W R thj-amb Thermal resistance junction-ambient 50 C/W Table 3. Avalanche characteristics Symbol Parameter Value Unit I AR Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) 3.5 A E AS Single pulse avalanche energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 200 mj DS11482 - Rev 3 page 2/14
Electrical characteristics 2 Electrical characteristics T C = 25 C unless otherwise specified Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS Drain-source breakdown voltage V GS = 0 V, I D = 1 ma 600 V I DSS Zero gate voltage drain current V GS = 0 V, V DS = 600 V 1 µa V GS = 0 V, V DS = 600 V, T C = 125 C (1) 100 µa I GSS Gate-body leakage current V DS = 0 V, V GS = ±25 V ±10 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa 3.25 4 4.75 V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 9 A 0.175 0.188 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 1090 - pf C oss Output capacitance V DS = 100 V, f = 1 MHz, V GS = 0 V - 56 - pf C rss Reverse transfer capacitance - 1.6 - pf C oss eq. (1) Equivalent output capacitance V DS = 0 to 480 V, V GS = 0 V - 255 - pf R G Intrinsic gate resistance f = 1 MHz, I D = 0 A - 7 - Ω Q g Total gate charge V DD = 480 V, I D = 18 A, - 29 - nc Q gs Gate-source charge V GS = 0 to 10 V - 6 - nc (see Figure 15. Test circuit for gate Q gd Gate-drain charge charge behavior) - 12 - nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS. Table 6. Switching energy Symbol Parameter Test conditions Min. Typ. Max. Unit E (off) Turn-off energy (from 90% V GS to 0% I D ) V DD = 400 V, I D = 2 A, R G = 4.7 Ω, V GS = 10 V V DD = 400 V, I D = 4 A, R G = 4.7 Ω, V GS = 10 V - 7 - µj - 8 - µj DS11482 - Rev 3 page 3/14
Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V DD = 300 V, I D = 9 A, - 15 - ns t r Rise time R G = 4.7 Ω, V GS = 10 V - 10 - ns t d(off) Turn-off delay time (see Figure 14. Test circuit for resistive load switching times and - 61 - ns t f Fall time Figure 19. Switching time waveform) - 16 - ns Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 18 A I (1) SDM Source-drain current (pulsed) - 72 A V (2) SD Forward on voltage V GS = 0 V, I SD = 18 A - 1.6 V t rr Reverse recovery time I SD = 18 A, di/dt = 100 A/µs, - 360 ns Q rr Reverse recovery charge V DD = 100 V (see Figure 16. Test circuit for inductive load switching - 5 µc I RRM Reverse recovery current and diode recovery times) - 28 A t rr Reverse recovery time I SD = 18 A, di/dt = 100 A/µs, - 445 ns Q rr Reverse recovery charge V DD = 100 V, T j = 150 C (see Figure 16. Test circuit for - 6.5 µc I RRM Reverse recovery current inductive load switching and diode recovery times) - 29 A 1. Pulse width is limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS11482 - Rev 3 page 4/14
Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance I D (A) GIPG230320161159SOA Operation in this area is limited by R DS (on) 10 t p = 10 µs t p = 100 µs 1 single pulse, T C = 25 C, T j 150 C, V GS = 10 V t p = 1 ms t p = 10 ms 0.1 0.1 1 10 100 V DS (V) Figure 3. Output characteristics Figure 4. Transfer characteristics I D (A) 40 V GS = 8, 9, 10 V GIPG090220181022OCH V GS =7 V I D (A) 40 V DS =16 V GIPG090220181022TCH 32 32 24 V GS =6 V 24 16 16 8 V GS =5 V 8 0 0 4 8 12 16 V DS (V) 0 3 4 5 6 7 V GS (V) Figure 5. Gate charge vs gate-source voltage Figure 6. Static drain-source on-resistance V GS (V) 12 10 V DS GADG260320181223QVG V DS (V) V DD = 480 V, I D = 18 A 600 500 R DS(on) (Ω) 0.185 V GS = 10 V GIPG090220181138RID 8 400 0.18 6 300 0.175 4 2 200 100 0.17 0 0 5 10 15 20 25 30 0 Q g (nc) 0.165 0 3 6 9 12 15 18 I D (A) DS11482 - Rev 3 page 5/14
Electrical characteristics (curves) Figure 7. Capacitance variations Figure 8. Output capacitance stored energy C (pf) GIPG090220181022CVR E OSS (µj) GIPG090220181024EOS 10 3 Ciss 8 10 2 C oss 6 4 10 1 f = 1 MHz 2 10 0 10-1 10 0 10 1 10 2 C rss V DS (V) 0 0 100 200 300 400 500 600 V DS (V) Figure 9. Turn-off switching energy vs drain current E off (µj) 14 12 10 8 6 4 V DD = 400 V R G = 4.7Ω V GS = 10V GADG260320181227TSL Figure 10. Normalized gate threshold voltage vs temperature V GS(th) (norm.) 1.1 1.0 0.9 0.8 0.7 I D = 250 µa GIPG090220181018VTH 2 0 1 2 3 4 5 6 ID (A) 0.6-75 -25 25 75 125 T j ( C) Figure 11. Normalized on-resistance vs temperature Figure 12. Normalized V (BR)DSS vs temperature R DS(on) (norm.) 2.5 V GS = 10 V GIPG090220181019RON V (BR)DSS (norm.) 1.10 I D = 1 ma GIPG090220181020BDV 2.0 1.05 1.5 1.00 1.0 0.95 0.5 0.90 0.0-75 -25 25 75 125 T j ( C) 0.85-75 -25 25 75 125 T j ( C) DS11482 - Rev 3 page 6/14
Electrical characteristics (curves) Figure 13. Source-drain diode forward characteristics V SD (V) 1.1 GIPG090220181021SDF T j = -50 C 1.0 0.9 T j = 25 C 0.8 0.7 T j = 150 C 0.6 0.5 0 3 6 9 12 15 18 I SD (A) DS11482 - Rev 3 page 7/14
Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD VD RL + 2200 μf 3.3 μf VDD VGS 12 V IG= CONST 47 kω 100 Ω 100 nf D.U.T. 1 kω VGS pulse width RG D.U.T. pulse width 2200 μf + 2.7 kω 47 kω VG 1 kω AM01468v1 AM01469v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit G 25 Ω A D D.U.T. S B A fast diode B A B G 100 µh 3.3 1000 D µf + µf VDD D.U.T. VD ID L + 2200 µf 3.3 µf VDD + _ RG S Vi pulse width D.U.T. AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton toff VD td(on) tr td(off) tf IDM 90% 10% 90% ID 0 10% VDS VDD VDD VGS 90% 0 10% AM01472v1 AM01473v1 DS11482 - Rev 3 page 8/14
Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS11482 - Rev 3 page 9/14
TO-247 package information 4.1 TO-247 package information Figure 20. TO-247 package outline 0075325_9 DS11482 - Rev 3 page 10/14
TO-247 package information Table 9. TO-247 package mechanical data Dim. mm Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 5.45 5.60 L 14.20 14.80 L1 3.70 4.30 L2 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 DS11482 - Rev 3 page 11/14
Revision history Table 10. Document revision history Date Revision Changes 21-Mar-2016 1 First release. 15-Feb-2018 2 28-May-2018 3 Removed maturity status indication from cover page. Updated Section 1 Electrical ratings, Section 2 Electrical characteristics and Section 2.1 Electrical characteristics (curves). Minor text changes. Updated Table 1. Absolute maximum ratings. Updated Section 2 Electrical characteristics and Section 2.1 Electrical characteristics (curves). Minor text changes DS11482 - Rev 3 page 12/14
Contents Contents 1 Electrical ratings...2 2 Electrical characteristics...3 2.1 Electrical characteristics (curves)... 5 3 Test circuits...8 4 Package information...9 4.1 TO-247 package information...9 Revision history...12 DS11482 - Rev 3 page 13/14
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