1 Chapter 1 INTRODUCTION 1.1. Introduction In the industrial applications, many three-phase loads require a supply of Variable Voltage Variable Frequency (VVVF) using fast and high-efficient electronic control. Predominant applications are variable speed AC drives and power conditioning systems. In AC drives, the rotor speed is controlled through the supply frequency, and the machine flux through the supply voltage. Among AC drives, Induction motors are the work force in industrial drives since they have the features of simple construction, and require less maintenance. Induction motor drives can be controlled for speed and torque by using PWM inverter with suitable control strategy. Generally it is preferred to take the power from a DC source and convert it to threephase AC using Power Electronic Converters (PEC), especially inverters. The function of an inverter is to convert DC voltage to a symmetric AC output voltage of desired magnitude and frequency. The Voltage Source Inverter (VSI) is fed from a voltage source and the load current is forced to fluctuate from positive to negative, and vice versa. To cope with the inductive loads, the power switches with freewheeling diodes are required. The input DC voltage is mostly of constant magnitude and variable magnitude in exceptional applications [1-2, 119].
2 The conversion of DC power to three-phase AC power is exclusively performed in the switched mode. The temporary connections to the power semiconductor switches at high repetition rates between the two DC terminals and the three phases of the AC motor are performed. The actual power flow in each motor phase is controlled by the duty-cycle, of the respective switches. The desired sinusoidal waveform of the currents is achieved by varying the duty-cycles sinusoidally with time, employing techniques of Pulse Width Modulation (PWM). The design procedure of DC link capacitor [3] and the filter components [4] are presented. The PWM strategy plays a vital role in the minimization of harmonics and switching losses in these converters, especially in three-phase applications. In the past two decades, various PWM strategies, control schemes, and realization/implementation techniques have been developed. Many PWM schemes have been developed by many researchers to obtain the desired performance or to overcome the existing limitations such as DC bus utilization, linear operating range, high harmonic contents in the output, performance of Field Programmable Gate Array ( FPGA) based PWM controllers. The performance includes FPGA resource utilization, speed and accuracy. The different types of PWM control schemes are Sinusoidal PWM ( SPWM), Space Vector PWM (SVPWM), Selected Harmonic Injection PWM (SHIPWM) and Selected Harmonic Elimination PWM (SHEPWM) [2, 92-110]. In the field of digital control in electrical systems, advanced microprocessors and Programmable Logic Devices (PLDs) are playing a
3 critical role. Due to the higher gate densities and lower cost, FPGAs can target a large market of Application Specific Standard Products (ASSPs). FPGA vendors are offering the software and hardware resources and Computer Aided Design (CAD) tools for their devices [ 5, 126-128]. The algorithm is developed using Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) [124-125]. In industrial sector, FPGA is playing a key role in many electrical system applications such as PEC control, automotive electronics, and measurement system applications [5-13]. Further FPGA has been used in soft-core processors and embedded systems, soft computing, power systems [14-25] are described by various researchers and these are detailed in literature survey part of the Thesis. A soft-core processor is a HDL model of a specific processor that can be customized for a given application and synthesized for FPGA target. In many applications, softcore processors provide several advantages over custom designed processors such as reduced cost, flexibility, platform independence and greater immunity to obsolescence [14]. The Digital Signal Processing Algorithms (DSPA) involves the number system to represent the co-efficient in the algorithm [121-122]. The Q- Format based data representation and signal processing is explained in [129-131]. FPGA has been used for high speed computations in the domain using Q-Format representation which includes the applications like 3-D graphics, neural networks and PEC applications [28-32]. The floating point representation standard is given in [34]. In FPGA, Q-format
4 based signal processing provides the advantages in terms of reduced area with required accuracy as reported in [28-32, 95, 107]. The real time implementation of a PWM control scheme requires high performance digital controllers such as Digital Signal Processor (DSP), FPGA and combination of these. During 1980s, the low performance microprocessors were used [40-41]. In late 1990s, the Digital Signal Processors (DSPs) were used for PEC control [42-46]. DSPs providing the sequentially executable software solution and FPGA provide the concurrently executable hardware solution. Each device is having specific merits and demerits in terms of speed, input/output (I/O) capabilities, and memory space/ chip resources to store the application software and data size in signal processing. Since, FPGAs are executing the control statements concurrently, they offer the high speed computation in real time. Therefore, FPGA has been extensively used in many PEC control like DC-DC converters [47-48], matrix converters [49], resonant converters [50], converters with power factor correction [51], AC-DC converters [52]. In three-phase DC-AC converter (Inverters) control using SPWM [53-63], SVPWM [64-70], and multi level/multiphase SVPWM [71-81] are reported. The host processors interfaced with FPGA in the control sysyem to generate PWM [64, 82-84]. During last decade, the single chip FPGA based PWM controls using holistic modelling approach, Xilinx System Generator (XSG) based design, and modifying the PWM algorithm suitable for FPGA implementation are developed [86-90].
5 Another possibility of single chip FPGA implementation is possible in the form of Dynamic Reconfigurable Hardware (DRH). The feature of dynamic reconfiguration [108-118] i.e. two or more control structure can be programmed in a single FPGA and the control can be changed between them, without shutting down the system is reported in [109-111]. In the PEC control, the DRH is used in the PWM and the drive control functions [112-118]. The industrial control application requirements are single chip control or System on Chip (SoC) with reduction in FPGA cost and speed. The limitations in the existing FPGA based PWM control implementations are the need of a co-processor to compute the algorithms, operational speed and more utilization of FPGA resources. This Thesis presents the design and implementation of FPGA based area efficient PWM (SPWM and SVPWM) controllers in single FPGA using Q- Format based VLSI signal processing and also the implementation of Dynamically Partially Reconfigurable PWM ( DPRPWM) control through single FPGA. 1.2. Literature survey There is vast development in the PWM controllers used in VSI to meet the desired performance [1-2, 119]. The various applications like signal processing, Q-Format representation and its applications with examples are presented in the introduction part [5-25]. From the literature, an efficient signal processing using Q-format for FPGA applications,
6 provides the advantages in terms of reduced area and power [28-32, 95, 107]. This literature survey focuses on importance of FPGA and its usage in the realm of PEC control including three phase PWM inverter control. In the beginning, when only low performance processors and were available, developing code for controllers was a tedious process [40-41]. With the advent of DSPs, the design approach has significantly changed. In the literature, DSP based control of PWM in PECs for the applications such as AC drives and power conditioning systems [42-46] have become an area of research due to its features. Traditional software based systems suffer from disadvantages of complex circuitry, limited functions, difficulty in circuit modification, high cost, low executive speed and longer development time. The success of VLSI technology has given a good solution to overcome some of the above limitations. Therefore, in the past two decades, a cluster of customised PEC applications are developed [47-52] and especially in three phase VSI with SPWM [53-63] and SVPWM [64-70]. The multi level/multiphase SVPWM are implemented using DSP-FPGA [71-81]. Sine PWM is practically used in three phase power conversion applications [53-63] due to its simplicity in implementation. In [53], a comparison between DSP and FPGA based control capabilities in PWM power converters has been carried out. It has been demonstrated how FPGA based digital control properties are better than the DSP. A digital
7 Application Specific Integrated Circuit ( ASIC) is used to replace a microprocessor in a SPWM system as developed [54]. Three-phase SPWM is implemented in Xilinx FPGA for three phase PWM inverter used in photo voltaic (PV) system [ 55]. The FPGA based three phase SPWM controller is implemented using FPGA and the design takes more FPGA area and it has to be optimized [56]. Furthermore, the design can be converted into a soft Intellectual Property (IP) core and similar kind of SPWM is reported in [59, 62]. In order to improve the SPWM control system s real time capability and to reduce the system s complexity, a high precision programmable digital three phase SPWM chip based on variable sampling frequency method is designed [58]. The concept of slope PWM generated by comparing a trapezoidal modulator wave with a discontinuous triangular carrier wave, is implemented in a Xilinx FPGA with Digilent board [61]. 1.2.1. DSP-FPGA based Control of Inverters The inverter/motor control algorithms have the computation intensive arithmetic calculations. The main part in the three phase PEC control is PWM modulator. The two different modulation schemes used in industrial applications are SPWM and SVPWM. The arithmetic equations in the algorithms are implemented in DSP and the digital PWM generation is implemented in FPGA. In the literature [64], reference vector and angle are calculated in DSP and a part of SVPWM generation is carried out by a low density Xilinx FPGAs 4003 and 4010.
8 In SVPWM implementations reported, the complex algorithmic functions such as the reference vector and angle are computed by a host processor such as DSP, dspace controller and fed to the FPGA/CPLD for further processing especially timing functions [64-69] and FPGA can serve as a co-processor to relieve the computational intensive task from MCU or DSP. An optimised SVM schemes is developed using an external microprocessor and an ALTERA FPGA working with a fundamental of 10 Hz in [65]. In [67], an FPGA-based SVPWM generator has been reported, where a total of 1156 LEs was required with 8-bit reference inputs, and a maximum operating frequency is 7.12 MHz. Also, the predictive current controller for a VSI using fixed-point DSP TMS320C50 and FPGA is developed [68]. In [85], the multi-functional converter control in threephase four-wire systems is implemented in DSP-FPGA. In some digital implementations, Personal Computer (PC) based control and in recent period the dspace development board is used as host controllers. Two parallel connected VSIs are controlled as master inverter by PC-based xpc target real-time control system having sampling period of 100 ms and as follower inverter by DSP development kit of Altera FPGA with 40MHz clock [70]. A dspace-fpga based control of PEC applications employing stochastic arithmetic as a solution for the FPGA implementation of complex control algorithms, resulting in simplified computation and reduced digital resources is carried out [82]. In three phase system, multilevel/multi phase converters with higher number of levels and phases are important for handling higher power at
9 high voltage and research in these converter control with applications have been very observable in literature. FPGA implementation of PEC fed electric motor drives such as DC and AC motor drives [93], synchronous motors [94], and linear induction motors [95], induction motors [96-98], stepper motors [99], Permanent Magnet Synchronous Motors (PMSM) [100-101], Switched Reluctance Motors (SRM) [102-103], and Brushless DC (BLDC) motors [104-106] have been developed. The FPGA-based control system for an Linear induction motor ( LIM) drive using currentcontrolled PWM voltage source inverter is implemented in FPGA using VHDL with the Q-format arithmetic representation. In the development of the VHDL codes for a 16-bit FPGA processor, by using fractional numbers between -1 and 1 with the Q-format representation, the results of multiplication can be easily handled because the product of two numbers is always in the same range. Besides, all the sine, cosine, multiplier and divider are implemented using available intellectual property (IP) [95]. FPGA-based speed control IC for PMSM drive with adaptive fuzzy control is implemented in FPGA using Q11 format [107]. 1.2.2. FPGA Based Control of Inverters FPGA based SVPWM control implementation for inverter [86-90] is reported with various design methodologies which does not require host microprocessors like DSP or dspace. An innovative application which involves four FPGAs is presented. The duty-cycle modulation scheme for multilevel inverters is developed exploiting two-to-three axis coordinate transformation, and it does not require trigonometric functions to
10 achieve duty-cycles of each phase. Therefore, the algorithm complexity in digital implementation is reduced. The implementation of the modulator is distributed on multiple FPGAs. The controller, transformations and the calculation of phase references are performed by main FPGA and rest of the algorithm having switching time calculation and dead time by one FPGA in each module for three phases [86]. A single chip realization of SVPWM is developed in which an induction motor controller combines a predictive PWM current control strategy with the neural approach [87]. It is mentioned that the concept of automatic code generation and the resulting hardware architectures are not areaoptimised, a fact not acceptable in an industrial approach [6, 88]. In [88], the design methodologies and specific library of reusable modules for inverter/ drive control are presented, and various FPGA based current controller architectures using space vector based regulator is presented. It is very interesting to note that, by modifying the existing PWM algorithm, it is possible to implement entire modulator architecture in a single FPGA with required accuracy. In this context [89], a compact SVPWM algorithm for three phase inverters is developed without using multiplier or divider and this fast algorithm is especially suitable for FPGA applications. SVPWM algorithm using non-orthogonal coordinates for a three-level inverter is implemented in FPGA with a relatively low quantity of FPGA resources and computation of reference vectors in the dq reference frame [90]. The delay time plays a major role in producing
11 the inverter output voltage, and the analysis and implementation of dead time effect and its compensation is carried out in [91-92]. Of late, an embedded control and IP core design was developed and downloaded into FPGA to construct a System on Programmable Chip (SoPC) environment for AC drive systems. The multiple FPGA are used to generate PWM in which arithmetic functions are carried out [86]. In the literature, the implementations which bring out single chip solutions for SVPWM control are reported in [87-90]. The Q-Format based signal processing is used to improve the accuracy and to reduce the resource utilization [95]. Now a day, due to the availability of processor IP cores, design methodologies, and by modifying the structure of PWM algorithms, single chip solutions are developed. Also the Q- Format based signal processing in FPGA is gaining attractiveness as it reduces the area burden with adequate accuracy in single chip solutions [28-32, 95,107]. An alternative to provide single chip solution is reconfigurable systems which usually appear in the form of FPGAs [108-111]. In the application domain, DRH is commonly used in computer vision and communication applications [5, 110-111] and a few PEC and electric drive controls [112-118]. The DRH implementation of PWM schemes are implemented in a single low cost Spartan FPGA using the concepts and features presented in [132-135]. The design and development is carried out using the CAD tools of ModelSim and Xilinx [136-139].
12 1.3. Problem Formulation From thorough literature survey on the development and implementation of PWM control schemes, it is found that the some of shortcomings/limitations. In view of these, the problem of this research is considered to provide alternate solutions to overcome the limitations, and to propose a new configuration for PWM control schemes for getting optimized solution. (i) The signal processing is a key issue in the performance of a digital system. In the existing FPGA based implementations, integer fixed point format is used in the signal processing [64-70]. Therefore, an efficient VLSI signal processing is necessary to improve the utilization of FPGA in terms of resource, reduction of hardware cost and with required accuracy through single chip solution [28-32, 95,107]. (ii) The second kind of limitation is observed from literature is, the implementation of PWM schemes through FPGA requires an additional DSP [64-85]. (iii) Further, a new type of PWM generation control namely Dynamic Reconfigurable PWM is proposed to design and implement in a single FPGA. The Dynamic Reconfigurable Hardware (DRH) was mainly used in computer vision and communication applications, and it has to be applied for PEC control by dynamic reconfiguration [108-111].
13 1.4. Objectives of the Thesis The main objectives of the Thesis are to address the above limitations and to develop methods to overcome the limitations. The objectives are: (i) To develop, simulate and implement the Q-Format based signal processing as QALU to perform the arithmetic computation in the FPGA and to obtain a single chip solution. (ii) To design a proto type hardware for PWM inverter, its driver, and the FPGA digital controller. (iii) To develop, simulate and implement the proposed Q-Format based signal processing to SPWM controller. (iv) To develop, simulate and implement the proposed Q-Format based signal processing to SVPWM controller. (v) To model, design the DRHPWM control and implement the DRH with SPWM and SVPWM controllers. In all above cases, attention is focused on the single chip FPGA solution using the Q-Format based signal processing to reduce the FPGA resource utilization i.e. area efficient FPGA based PWM control, and also the recent development of DRH is implemented for PWM control.
14 1.5. Contributions The major contributions of this work are summarized as follows: The modelling of VLSI architecture for signal processing, SPWM, SVPWM and DRHPWM controllers. Design and development of prototype hardware for PWM inverter feeding induction motor load. Design and development of the Q-Format based signal processing for PEC control to obtain a single chip solution. Design and development of SPWM controller using Q-Format based signal processing to obtain a single chip solution. Design and development of SVPWM controller using Q-Format based signal processing to obtain a single chip solution. Design and development of DPRPWM controller with SPWM and SVPWM. 1.6. Organization of the Thesis The Thesis is organized into five chapters. Each chapter highlights the contributions of the author, investigations undertaken and significant results arrived. Chapter 1 presents the general introduction and preliminary concepts related to the problem, and the previous investigations on PECs and AC drives reported in the literature. The objectives of the proposed work and the methods to overcome the drawbacks of the previous works
15 are presented. The contributions such as the real time FPGA implementation of Q-Format based signal processing to PEC control, VLSI signal processing based SPWM and SVPWM and DPR PWM controller having SPWM and SVPWM through single FPGA are presented. Chapter 2 discusses the basics of digital data representation, and advantages of Q-format representation in FPGA. The design and development of QALU using Q-Format is developed for PEC control applications. The QALU functions such as addition and multiplication are simulated. The simulation and experimental results for QALU and PEC control are presented. Chapter 3 considers an implementation of area efficient SPWM control through a single FPGA using Q-Format ALU. The SPWM modulator is designed and developed using VHDL. The SPPWM control is simulated using modelsim 5.7 and synthesized using Xilinx 9.1i. The simulation and experimental results are presented. Chapter 4 considers an implementation of area efficient SVPWM control through a single FPGA using Q-Format ALU. The SVPWM modulator is designed and developed using VHDL. The SVPWM control is simulated using modelsim 5.7 and synthesized using Xilinx 9.1i. The simulation and experimental results are presented. Chapter 5 presents the concepts of dynamic reconfiguration, dynamic partial reconfiguration and the implementation of dynamic
16 reconfigurable PWM control scheme in FPGA and verified with the experiments. Chapter 6 draws the conclusions from the work done in this research and discusses further directions of research possible in the future. 1.7. Summary This chapter presents the introduction, literature survey on FPGA application in PECs and electric drive control, problem formulation, technical contributions and organization of the Thesis.