TCD2908BFG TCD2908BFG. Features. Pin Connections (top view) Maximum Ratings (Note1) TOSHIBA CCD Image Sensor CCD (charge coupled device)

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TOSHIBA CCD Image Sensor CCD (charge coupled device) TCD2908BFG The TCD2908BFG is a high sensitive and low dark current 5400 elements 8 line CCD color image sensor which includes CCD drive circuit and clamp circuit. The sensor is designed for scanner. The device contains a row of 5400 elements 8 line staggered photodiodes which provide a 48 lines/mm (1200 dpi) across a A4 size paper. The device is operated by 5 V pulse and 12 V power supply. Features Number of Image Sensing Elements: 5400 elements 8 line Weight: 2.0g (typ.) Image Sensing Element Size: 5.25 µm by 5.25 µm on 5.25 µm Photo Sensing Region: High sensitive and low dark current PN photodiode Distanced Between Photodiode Array: 63 µm (12 lines) R array G array, G array B array 84 µm (16 lines) B array B/W array 10.5 µm (2 lines) Odd array Even array Clock: 2 phase (5 V) Power Supply:12 V Power Supply Voltage Internal Circuit: Clamp Circuit Package: 22 pin CLCC Package Color Filter: Red, Green, Blue Pin Connections (top view) OS3 1 22 OS2 SS 2 1 1 1 1 21 OS1 Maximum Ratings (Note1) 3 20 OD Characteristic Symbol Rating Unit Clock pulse voltage V φa, V φb Shift pulse voltage V SH Reset pulse voltage V 0.3~8.0 V Clamp pulse voltage V CP Switch pulse voltage V SW Power supply voltage V OD 0.3~15 V Operating temperature T opr 0~60 C Storage temperature T stg 25~85 C CP φ1b1 φ2b1 NC φ2b2 φ1b2 SH1 SS 4 5 6 7 8 9 10 11 10800 R G B 10800 10800 10800 Black&White 19 18 17 16 15 14 13 12 SW 1 SW 2 NC NC φ2a1 φ1a1 NC SH0 Note 1: All voltage are with respect to SS terminals (ground). 1

Block Diagram OD 20 φ 2A1 15 φ 1A1 14 TCD2908BFG CLAMP CCD ANALOG SHIFT REGISTER 1 SHIFT GATE 1 12 SH0 D12 D14 D16 D60 D62 S1 S3 S5 PHOTO DIODE(B/W) (odd line) S10797 S10799 D64 D66 D74 D76 CLAMP CCD ANALOG SHIFT REGISTER 2 SHIFT GATE 2 D45 D75 D77 D79 D123 D125 D127 S2 S4 PHOTO DIODE (B/W) (even line) S10796 S10798 S10800 D129 D131 D141 D143 SHIFT GATE 3 CLAMP CCD ANALOG SHIFT REGISTER 3 CCD ANALOG SHIFT REGISTER 1 φ 2B1 6 5 φ 1B1 SHIFT GATE 1 OS1 21 CLAMP D13 D14 D15 D16 D17 D18 D59 D60 D61 D62 D63 S1 S2 S3 S4 S5 PHOTO DIODE (B) (odd line) PHOTO DIODE (B) (even line) S10796 S10797 S10798 S10799 S10800 D64 D65 D66 D73 D74 D75 D76 SHIFT GATE 2 CCD ANALOG SHIFT REGISTER 2 CCD ANALOG SHIFT REGISTER 3 SHIFT GATE 3 SH1 10 OS2 22 CLAMP D13 D14 D15 D16 D17 D18 D59 D60 D62 S1 S3 S5 D61 D63 S2 S4 PHOTO DIODE (G) (odd line) PHOTO DIODE (G) (even line) S10796 S10797 S10798 S10799 S10800 D46 D65 D66 D73 D74 D75 D76 SHIFT GATE 4 CCD ANALOG SHIFT REGISTER 4 CCD ANALOG SHIFT REGISTER 5 SHIFT GATE 5 OS3 1 CLAMP D13 D14 D15 D16 D17 D18 D59 D60 D62 S1 S3 S5 D61 D63 S2 S4 PHOTO DIODE (R) (odd line) PHOTO DIODE (R) (even line) S10796 S10797 S10798 S10799 S10800 D64 D65 D66 D73 D74 D75 D76 SHIFT GATE 6 CCD ANALOG SHIFT REGISTER 6 4 CP 3 19 SW 1 18 SW 2 2 8 φ 2B2 9 φ 1B2

Pin Names Pin No. Symbol Name Pin No. Symbol Name 1 OS3 Signal Output 3 (red) 12 SH0 Shift Gate 0 for B/W 2 SS Ground 13 NC Non Connection 3 Reset Gate 14 φ1a1 Clock 1A (phase 1) for B/W 4 CP Clamp Gate 15 φ2a1 Clock 1A (phase 2) for B/W 5 φ1b1 Clock 1B (phase 1) for Color 16 NC Non Connection 6 φ2b1 Clock 1B (phase 2) for Color 17 NC Non Connection 7 NC Non Connection 18 SW 2 Switch Gate 2 for Color or B/W 8 φ2b2 Clock 2B (phase 2) for Color 19 SW 1 Switch Gate 1 for Color Resolution 9 φ1b2 Clock 2B (phase 1) for Color 20 OD Power 10 SH1 Shift Gate 1 for Color 21 OS1 Signal Output 1 (blue) 11 SS Ground 22 OS2 Signal Output 2 (green) Arrangement of The 1st Effective Pixel (S1) S1 B/W Photo Diode Arrays (5400 pixels 2 line) 5.25 µm 1 3 5 7 26.25 µm 31.5 µm 5.25 µm 2 4 6 8 63 µm 84 µm S1 5.25 µm Blue Photo Diode Arrays (5400 pixels 2 line) 5.25 µm 5.25 µm 1 3 5 7 10.5 µm 2 4 6 8 52.5 µm 63 µm S1 Green Photo Diode Arrays (5400 pixels 2 line) 5.25 µm 5.25 µm 5.25 µm 1 3 5 7 2 4 6 8 10.5 µm 52.5 µm 63 µm S1 Red Photo Diode Arrays (5400 pixels 2 line) 5.25 µm 5.25 µm 5.25 µm 1 3 5 7 2 4 6 8 10.5 µm 5.25 µm 5.25 µm 3

Optical/Electrical Characteristics (Ta = 25 C, V OD = 12 V, V SW = 5 V, V φ = V SH = V = V CP = 5 V (pulse), f φ = 1 MHz, f = 2 MHz, t INT = 11 ms, light source = a light source + CM500S filter (t = 1 mm), load resistance = 100 kω) TCD2908BFG Characteristics Symbol Min Typ. Max Unit Note Black&White R (B/W) 17.9 22.4 26.9 Sensitivity Red R (R) 3.4 4.9 6.4 Green R (G) 4.6 6.7 8.7 V/lx s (Note2) Blue R (B) 2.5 3.6 4.7 Photo response non uniformity PRNU (1) 10 20 % (Note3) PRNU (3) 3 12 mv (Note4) Register imbalance(color) RI 1 % (Note5) Saturation output voltage V SAT 3.2 3.5 V (Note6) Saturation exposure SE 0.11 0.15 lx s (Note7) Dark signal voltage V DRK 0.8 2.0 mv (Note8) Dark signal non uniformity DSNU 2.0 10.0 mv (Note8) DC power dissipation PD 420 650 mw Total transfer efficiency TTE 92 98 % Output impedance Z O - 0.3 1.0 kω DC output voltage V OS 5.0 6.0 7.0 V (Note9) Reset noise V N 0.3 V (Note9) Random noise N Dσ 0.9 mv (Note10) 4

Note 2: Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. Note 3: PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. X PRNU (1) = 100 (%) X Where X is average of total signal output and X is the maximum deviation from X. The amount of incident light is shown below. Red = 1/2 SE Green = 1/2 SE Blue = 1/4 SE Note 4: PRNU (3) is defined as maximum voltage with next pixel, where measured at 5% of SE (typ.) Note 5: Register imbalance is defined as follows. 10799 xn x (n + 1) RI = n = 1 10799 X 100 (%) Note 6: V SAT is defined as minimum saturation output of all effective pixels. Note 7: Definition of SE SE = V SAT R B/W (lx s) Note 8: V DRK is defined as average dark signal voltage of all effective pixels. DSNU is defined as different voltage between V DRK and V MDK when V MDK is maximum dark signal voltage. V DRK V MDK DSNU Note 9: DC signal output voltage is defined as follows. Reset Noise Voltage is defined as follows. OS V N V MS V OS SS 5

Note 10: Random noise is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e. dark conditions) calculated by the following procedure. video output video output Output waveform (effective pixels under dark condition) 200 ns 200 ns V pixel (n) pixel (n + 1) (1) Two adjacent pixels (pixel n and n + 1) after reference level clamp in one reading are fixed as measurement points. (2) Each of the output level at video output periods averaged over 200 ns period to get V (n) and V (n + 1). (3) V (n + 1) is subtracted from V (n) to get V. V = V (n) V (n + 1) (4) The standard deviation of V is calculated after procedure (2) and (3) are repeated 30 times (30 readings). 30 1 V = Vi σ = 1 ( V V) 30 30 i - i = 1 (5) Procedure (2), (3) and (4) are repeated 10 times to get sigma value. (6) 10 sigma values are averaged. σ = 1 10 10 σ j j= 1 30 i= 1 (7) σ value calculated using the above procedure is observed 2 times larger than that measured relative to the ground level. So we specify random noise as follows. 2 N D σ = 1 2 σ 6

Operating Condition Characteristics Symbol Min Typ. Max Unit Clock pulse voltage H Level V φa 4.5 5.0 5.5 V L Level, V φb 0 0 0.3 Shift pulse voltage H Level V SH 4.5 5.0 5.5 V L Level 0 0 0.5 Reset pulse voltage H Level V 4.5 5.0 5.5 V L Level 0 0 0.5 Clamp pulse voltage H Level V CP 4.5 5.0 5.5 V L Level 0 0 0.5 Switch pulse voltage H Level V SW 4.5 5.0 5.5 V L Level 0 0 0.5 Power supply voltage V OD 11.4 12.0 12.6 V Clock Characteristics (Ta = 25 C) Characteristics Symbol Min Typ. Max Unit Clock pulse frequency f φa, f φb 0.15 1.0 12.0 MHz Reset pulse frequency f 0.3 2.0 10.0 MHz Clamp pulse frequency f CP 0.3 2.0 10.0 MHz Clock(A) capacitance (Note 11) C φa 265 pf Clock(B) capacitance (Note 11) C φb 300 pf Shift gate capacitance C SH 15 pf Reset gate capacitance C 15 pf Clamp gate capacitance C CP 10 pf Switch gate capacitance C SW 10 pf Note 11: V OD = 12 V Clocking Mode Mode SW 1 SW 2 SH0 SH1 φ1a, φ2a φ1b, φ2b CP Color 1200DPI H L H Pulse L Pulse Pulse Pulse Bit Clamp Line Clamp Color 600DPI L L H Pulse L Pulse Pulse Pulse B/W L H Pulse H Pulse L Pulse Pulse Color 1200DPI H L H Pulse L Pulse Pulse Color 600DPI L L H Pulse L Pulse Pulse B/W L H Pulse H Pulse L Pulse SH1 or H SH1 or H SH0 or H 7

Timing Chart (Color 1200DPI Bit Clamp mode) SH0( H ) tint (integration time) SH1 φ 1B φ 2B CP SW 1( H ) SW 2( L ) OS D0 D1 D2 D3 D4 D10 D11 D12 D13 D14 D15 D16 D58 D59 D60 D61 D62 D63 S1 S2 S3 S10799 S10800 D64 D65 D66 D67 D68 D74 D75 D76 D77 (13 elements) LIGHT SHIELD OUTPUTS (47 elements) (4 elements) (4 elements) TEST OUTPUTS (2 elements) DUMMY OUTPUTS (7 elements) DUMMY OUTPUT (1 element) (64 elements) SIGNAL OUTPUTS (10800 elements) (14 elements) 1 LINE READOUT PERIOD (10878 elements) 8

Timing Chart (Color 1200DPI Line Clamp mode) SH0( H ) tint (integration time) SH1 φ 1B φ 2B CP = SH 1 SW 1( H ) SW 2( L ) OS D0 D1 D2 D3 D4 D10 D11 D12 D13 D14 D15 D16 D58 D59 D60 D61 D62 D63 S1 S2 S3 S10799 S10800 D64 D65 D66 D67 D68 D74 D75 D76 D77 (13 elements) LIGHT SHIELD OUTPUTS (47 elements) (4 elements) (4 elements) TEST OUTPUTS (2 elements) DUMMY OUTPUTS (7 elements) DUMMY OUTPUT (1 element) (64 elements) SIGNAL OUTPUTS (10800 elements) (14 elements) 1 LINE READOUT PERIOD (10878 elements) 9

Timing Chart (Color 600DPI Bit Clamp mode) SH0( H ) tint (integration time) SH1 φ 1B φ 2B CP SW 1( L ) SW 2( L ) OS D1 D3 D9 D11 D13 D15 D57 D59 D61 D63 S2 S4 S10798 S10800 D65 D67 D69 D71 D73 D75 D77 (6 elements) LIGHT SHIELD OUTPUTS (24 elements) DUMMY OUTPUTS (3 elements) TEST OUTPUT (1 element) (2 elements) (2 elements) DUMMY OUTPUT (1 element) (32 elements) SIGNAL OUTPUTS (5400 elements) (7 elements) 1 LINE READOUT PERIOD (5439 elements) 10

Timing Chart (Color 600DPI Line Clamp mode) SH0( H ) tint (integration time) SH1 φ 1B φ 2B CP = SH 1 SW 1( L ) SW 2( L ) OS D1 D3 D9 D11 D13 D15 D57 D59 D61 D63 S2 S4 S10798 S10800 D65 D67 D69 D71 D73 D75 D77 (6 elements) LIGHT SHIELD OUTPUTS (24 elements) DUMMY OUTPUTS (3 elements) TEST OUTPUT (1 element) (2 elements) (2 elements) DUMMY OUTPUT (1 element) (32 elements) SIGNAL OUTPUTS (5400 elements) (7 elements) 1 LINE READOUT PERIOD (5439 elements) 11

12 Timing Chart (B/W Bit Clamp mode) 1 LINE READOUT PERIOD (5440 ELEMENTS) (6 ELEMENTS) LIGHT SHIELD OUTPUTS (24 ELEMENTS) (2 ELEMENTS) DUMMY OUTPUTS (1 ELEMENTS) TEST OUTPUTS (1 ELEMENTS) (4 ELEMENTS) (32 ELEMENTS) SIGNAL OUTPUTS (5400 ELEMENTS) tint (integration time)s1d20d2d0cp D12D58D62D60(2 ELEMENTS) (8 ELEMENTS) 1 LINE READOUT PERIOD (2737 ELEMENTS) (11 ELEMENTS) LIGHT SHIELD OUTPUTS (20 ELEMENTS) (1 ELEMENTS) DUMMY OUTPUT (1 ELEMENT) TEST OUTPUT (1 ELEMENT) (32 ELEMENTS) (1 ELEMENTS) (5 ELEMENTS) SIGNAL OUTPUTS (2700 ELEMENTS)D10S3S5399S5401S5403S5405S5407S5409S5411S10799D64D66D68D70D72D74D76D78S5397S5413S10797D56D1D3D5D7D27D23D25D21D41D45D117D113D119D115D123D121D125D127S4S2S6S8S10798S10794S10800S10796D129D131D133D135D137D139D143D141D145D147DUMMY OUTPUT (2 ELEMENT)D22D43D47φ 1A SH0 OS1 (B/W_ODD) OS2 (B/W_EVEN) OS3 (B/W_EVEN) SH1( H ) SW2( H ) φ 2A SW1( L )

13 Timing Chart (B/W Line Clamp mode) φ 1A SH0 OS1 (B/W_ODD) OS2 (B/W_EVEN) OS3 (B/W_EVEN) SH1 ( H ) SW2 ( H ) φ 2A 1 LINE READOUT PERIOD (5440 ELEMENTS) (6 ELEMENTS) LIGHT SHIELD OUTPUTS (24 ELEMENTS) (2 ELEMENTS) DUMMY OUTPUTS (1 ELEMENTS) TEST OUTPUTS (1 ELEMENTS) (4 ELEMENTS) (32 ELEMENTS) SIGNAL OUTPUTS (5400 ELEMENTS) tint (integration time)s1d20d2d0d12d58d62d60(2 ELEMENTS) (8 ELEMENTS) 1 LINE READOUT PERIOD (2737 ELEMENTS) (11 ELEMENTS) LIGHT SHIELD OUTPUTS (20 ELEMENTS) (1 ELEMENTS) DUMMY OUTPUT (1 ELEMENT) TEST OUTPUT (1 ELEMENT) (32 ELEMENTS) (1 ELEMENTS) (5 ELEMENTS) SIGNAL OUTPUTS (2700 ELEMENTS)D10S3S5399S5401S5403S5405S5407S5409S5411S10799D64D66D68D70D72D74D76D78S5397S5413S10797D56D1D3D5D7D27D23D25D21D41D45D117D113D119D115D123D121D125D127S4S2S6S8S10798S10794S10800S10796D129D131D133D135D137D139D143D141D145D147DUMMY OUTPUT (2 ELEMENT)D22D43D47CP = SH0 SW1 ( L )

Timing Requirements t2 t3 t4 SH φ 1 t1 t5 φ 1 φ 2 t20 GND 3.5 V (max) 1.5 V (min) 3.5 V (max) 1.5 V (min) CP t21 SW 1, SW 2 ( L H ) SW 1, SW 2 ( H L ) Color 1200DPI Mode ( SW 1= H, SW 2= L ) φ 1 t6 10% t7 φ 2 10% t9 t15 t14 t8 t10 CP t16 t12 t17 t11 t13 10% to the peak 10% to the peak OS (bit clamp mode) 10% Video signal Peak t18 10% Peak t18 OS (line clamp mode) Video signal t19 10% to the peak t19 10% to the peak 14

B/W Mode ( SW 1= L, SW 2= H ) / Color 600DPI Mode ( SW 1= L, SW 2= L ) φ 1 t6 10% t7 φ 2 10% t22 t9 t15 t14 CP t17 t12 10% to the peak OS (bit clamp mode) Peak t18 10% OS (line clamp mode) t19 10% to the peak 15

Characteristics Symbol Min Pulse timing of SH and φ 1 Typ. (Note 12) Max t1 110 1000 t5 800 1000 SH pulse rise time, fall time t2, t4 0 50 ns SH pulse width t3 3000 5000 ns φ 1, φ 2 pulse rise time, fall time t6, t7 0 50 ns pulse rise time, fall time t8, t10 0 20 ns pulse width t9 15 100 ns CP pulse rise time, fall time t11, t13 0 20 ns CP pulse width t12 25 100 ns Pulse timing of φ 1, φ 2 and CP t14 10 40 ns Pulse timing of and CP t15 0 100 ns Video data delay time (Note 13) t16, t17 20 ns Reference level settle time Unit t18 20 ns t19 35 ns Pulse timing of SH and CP t20 0 500 ns Pulse timing of SH and SW 1, SW 2 t21 0 0 ns Pulse timing of φ 1, φ 2 and t22 0 10 ns Note 12: Typ. is the case of fφ = 1.0 MHz. Note 13: Load resistance is 100 kω. ns 16

Typical Spectral Response Spectral Response 1.0 0.8 Ta = 25 C Red Relative response 0.6 0.4 Blue Green 0.2 0 400 450 500 550 600 650 700 Wavelength λ (nm) B/W 17

Typical Drive Circuit +5 V 0.1 µf/25 V 12 V φ 1A1 0.1 µf/25 V 10 µf/25 V φ 2A1 φ 1B1 φ 2B1 φ 1B2 φ 2B2 IC1 22 21 20 19 18 17 16 15 14 13 12 OS2 OS1 OD SW 1 SW 2 NC OS3 SS CP TCD2908BFG φ 1B1 φ 2B1 NC φ 2A1 φ 1A1 NC SH0 φ 2B2 φ 1B2 SH1 SS 1 2 3 4 5 6 7 8 9 10 11 NC +12 V +5 V 0.1 µf/25 V R1 R1 R1 0.1 µf/25 V R1 R1 R1 10 µf/25 V TR1 OS1 TR2 OS2 TR3 OS3 R2 R2 R2 SW 1 SW 2 SH0 SH1 CP IC2 IC1: TC74AC04P IC2: TC74HC04AP TR1, 2, 3: 2SC1815-Y R1: 150 Ω R2: 1500 Ω 18

Caution 1. Electrostatic Breakdown Store in shorting clip or in conductive foam to avoid electrostatic breakdown. CCD Image Sensor is protected against static electricity, but inferior puncture mode device due to static electricity is sometimes detected. In handing the device, it is necessary to execute the following static electricity preventive measures, in order to prevent the trouble rate increase of the manufacturing system due to static electricity. a. Prevent the generation of static electricity due to friction by making the work with bare hands or by putting on cotton gloves and non-charging working clothes. b. Discharge the static electricity by providing earth plate or earth wire on the floor, door or stand of the work room. c. Ground the tools such as soldering iron, radio cutting pliers of or pincer. It is not necessarily required to execute all precaution items for static electricity. It is all right to mitigate the precautions by confirming that the trouble rate within the prescribed range. d. Ionized air is recommended for discharge when handling CCD image sensors. 2. Incident Light CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and PRNU of CCD sensor. 3. Cloudiness of Glass Inside CCD surface mount products may have a haze on the inside of glass, so be careful about following. Even if the haze arises inside of glass, when it is not on the pixel area, there is no problem in quality. Before the aluminum bag is opened, please keep the products in the environment below 30 90%RH. And after the aluminum bag is opened, please keep the products in the environment below 30 60%RH. Please mount the products within 12month from sealed date and within 6 month from opening the aluminum bag. (Sealed date is printed on aluminum bag.) 4. Ultrasonic Cleaning Ultrasonic cleaning should not be used with such hermetically-sealed ceramic package as CCD because the bonding wires can become disconnected due to resonance during the cleaning process. 5. Mounting In the case of solder mounting, the devices should be mounted with the window glass protective tape in order to avoid dust or dirt included in reflow machine. 6. Window Glass Protective Tape The window glass protective tape is manufactured from materials in which static charges tend to build up. When removing the tape from CCD sensor after solder mounting, install an ionizer to prevent the tape from being charged with static electricity. When the tape is removed, adhesives will remain in the glass surface. Since these adhesives appear as black or white flaws on the image, please wipe the window glass surface with the cloth into which the organic solvent was infiltrated. Then please attach CCD to a product. Do not reuse the tape. 19

7. Soldering Temperature Profile for Pb free TCD2908BFG Good temperature profile for each soldering method is as follows. In addition, in case of the repair work accompanied by IC removal, since the degree of parallel may be spoiled with the left solder, please do not carry out and in case of the repair work not accompanied by IC removal, carry out with a soldering iron or, in reflow, only one time. a. Using a soldering iron Complete soldering within ten seconds for lead temperatures of up to 260 C, or within three seconds for lead temperatures of up to 350. b. Using long infrared rays reflow / hot air reflow Please do reflow at the condition that the package surface (electrode) temperature is on the solder maker's recommendation profile. And that reflow profile is within below condition 1 to 3. 1. Peak temperature: 250 or less. 2. Time to keep high temperature : 220~250, 30~40sec. 3. Pre. heat : 150~190, 60~120sec 8. Window Glass The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage. 9. Cleaning Method of the Window Glass Surface Wiping Cloth a. Use soft cloth with a fine mesh. b. The wiping cloth must not cause dust from itself. c. Use a clean wiping cloth necessarily. Recommended wiping cloth is as follow; - MK cloth (Toray Industries) Cleaner Recommended cleaning liquid of window glass are as follow; - EE-3310 (Olympus) When using solvents, such as alcohol, unavoidably, it is cautious of the next. a. A clean thing with quick-drying. b. After liquid dries, there needs to be no residual substance. c. A thing safe for a human body. And, please observe the use term of a solvent and use the storage container of a solvent to be clean. Be cautious of fire enough. Way of Cleaning First, the surface of window glass is wiped with the wiping cloth into which the cleaner was infiltrated. Please wipe down the surface of window glass at least 2 times or more. Next, the surface of window glass wipes with the dry wiping cloth. Please wipe down the surface of window glass at least 3 times or more. Finally, blow cleaning is performed by dry N2 filtered. If operator wipes the surface of the window glass with the above-mentioned process and dirt still remains, Toshiba recommends repeating the clean operation from the beginning. Be cautious of the next thing. a. Don't infiltrate the cleaner too much. b. A wiping portion is performed into the optical range and don't touch the edge of window glass. c. Be sure to wipe in a long direction and the same direction. d. A wiping cloth always uses an unused portion. Wiper 20

3.1 10. Foot Pattern on the PCB We recommend fig1 's foot pattern for your PCB(Printed circuit Board). TCD2908BFG 41.4 37.6 P1.27 X 10 = 12.70 1.27 6.5 0.67 0.67 11. Mask for Solder Paste Application fig1 We recommend metal mask that have the following thickness. TCD****BFG(Pad material : Au) : a thickness of 0.2mm. And we recommend that the size of the pattern of the metal mask is 95% to 100% of recommended foot pattern at fig1. 12. Temperature cycle After mounting, if temperature cycle stress is too much, CCD surface mount products have a possibility that a crack may arise in solder. As a method of preventing a solder crack, underfil is effective 13. Reuse of a Tray We reuse tray in order to reduce plastic waste as we can. Please cooperate with us in reusing for ecology. 21

14. Caution for Package Handling TCD2908BFG Over force on CCD products may cause crack and chip removing on the product. The three point bending strength of this product is the following. (Reference data) If the stress is loaded far from a fulcrum, the stress on the package will be increase. When you will treat CCD on every process, please be careful particularly. For example, soldering on PCB, cutting PCB, wiping on the glass surface, optical assemble and so on. Bending Test force(n) force(n) 13mm 36mm force(n) force(n) 13mm 36mm 22CLCC Bearing length 13mm : Bearing length 36mm : The force from upside : 300[N] The force from downside : 200[N] The force from upside : 150[N] The force from downside : 80[N] 22

Application Note The TCD2908BFG can be operated in two modes: Color 1200DPI Mode and Color 600DPI Mode. Each mode is selected by SW 1 terminal. SW 1 Mode Application Example H Color 1200 DPI 1200 DPI/A4 Reading L Color 600 DPI 600 DPI/A4 Reading Color 1200DPI Mode In Color 1200DPI Mode, the dummy and signal outputs in odd and even lines are read out. This mode provides 1200 DPI/A4 resolution. The timing for this mode is shown in page 8/25, 9/25 and 14/25. Color 600DPI Mode In Color 600DPI Mode, the dummy and signal outputs in even lines are read out. The dummy and signal outputs in odd lines cannot be read out in this mode. This mode provides 600 DPI/A4 resolution. Timing examples for 600 DPI/A4 reading using this mode are shown in page 10/25, 11/25 and 15/25 for reference. Color 300DPI Mode In Color 600DPI mode, signal charges of adjacent pixels in even line can be merged at an output stage capacitor using intermittent reset drive. Timing examples for 300 DPI/A4 reading using this mode are shown in page 21/25, 22/25 and 23/25 for reference. 23

Timing Chart (Color 300DPI mode) SH0( H ) tint (integration time) SH φ 1A, φ 1B φ 2A, φ 2B CP SW 1( L ) SW 2( L ) OS D1 + D3 D9 + D11 D13 + D15 D57 + D59 D61 + D63 S2 + S4 S10798 + S10800 D65 + D67 D69 + D71 D73 + D75 D77 (3 elements) LIGHT SHIELD OUTPUTS (12 elements) DUMMY OUTPUT (1 element) TEST OUTPUT (1 element) (1 element) (1 element) DUMMY OUTPUT (1 element) (16 elements) SIGNAL OUTPUTS (2700 elements) 1 LINE READOUT PERIOD (2720 elements) (4 elements) 24

Timing Chart (Color 300DPI Line Clamp mode) SH0( H ) SH1 φ 1B φ 2B CP = SH SW 1( L ) SW 2( L ) OS D1 + D3 D9 + D11 D13 + D15 D57 + D59 D61 + D63 S2 + S4 S10798 + S10800 D65 + D67 D69 + D71 D73 + D75 D77 (3 elements) LIGHT SHIELD OUTPUTS (12 elements) DUMMY OUTPUT (1 element) TEST OUTPUT (1 element) (1 element) (1 element) DUMMY OUTPUT (1 element) (16 elements) SIGNAL OUTPUTS (2700 elements) 1 LINE READOUT PERIOD (2720 elements) (4 elements) 25

Timing Example (Color 300DPI mode: SW 1= L, SW 2= L ) φ 1 φ 2 CP OS (bit clamp mode) Video Signal OS (line clamp mode) Video Signal 26

Package Dimensions Weight: 2.0g (typ.) 27

RESTRICTIONS ON PRODUCT USE 030619EBA The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the Handling Guide for Semiconductor Devices, or TOSHIBA Semiconductor Reliability Handbook etc.. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ( Unintended Usage ). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer s own risk. The products described in this document are subject to the foreign exchange and foreign trade laws. TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. 28