Operating Junction and Storage 150,-55 to150 Temperature Range. Symbol Parameter Typ. Units Test Conditions

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N-Channel MOSFET Applications: Adaptor Charger SMPS Lead Free Package and Finish V DSS R DS(ON) (Typ.) I D 40V 3.5mΩ 202A Features: RoHS Compliant Low ON Resistance Low Gate Charge Peak Current vs Pulse Width Curve Inductive Switching Curves Ordering Information PART NUMBER PACKAGE BRAND FTP1404 TO-220 IPS Absolute Maximum Ratings T C =25 unless otherwise specified Symbol Parameter FTP1404 Units V DSS Drain-to-Source Voltage 40 V I D Continuous Drain Current 202 A Continuous Drain Current T C =100 143 A I DM Pulsed Drain Current (NOTE *1) 808 A P D Power Dissipation 271 W Derating Factor above 25 2.16 W/ V GS Gate-to-Source Voltage ±20 V E AS Single Pulse Avalanche Energy(NOTE *2) 519 mj T L Maximum Temperature for Soldering 300 T J and T STG Operating Junction and Storage 150,-55 to150 Temperature Range Thermal Resistance Symbol Parameter Typ. Units Test Conditions R θjc Junction-to-Case 0.46 W Water cooled heatsink, P D adjusted for a peak junction temperature of +150. R θja Junction-to-Ambient 81.6 1 cubic foot chamber, free air. 2016 InPower Semiconductor Co., Ltd. Page 1 of 9 FTP1404 REV. A. Aug. 2016

OFF Characteristics T C =25 unless otherwise specified BV DSS Drain-to-Source Breakdown Voltage 40 -- -- V V GS =0V, I D =250μA I DSS I GSS V DS =40V, V GS =0V -- -- 1 T J =25 Drain-to-Source Leakage Current μa V DS =32V, V GS =0V -- -- 100 T J =125 Gate-to-Source Forward Leakage -- -- +100 V GS =+20V na Gate-to-Source Reverse Leakage -- -- -100 V GS = -20V ON Characteristics T J =25 unless otherwise specified R DS(ON) StaticDrain-to-Source On-Resistance -- 3.5 4.5 mω V GS =10V, I D =81A V GS(TH) Gate Threshold Voltage 2 -- 4 V V DS =V GS,I D =250μA Pulse width 300μs; duty cycle 2% Dynamic Characteristics Essentially independent of operating temperature C iss Input Capacitance -- 5431 -- C oss Output Capacitance -- 1542 -- C rss Reverse Transfer Capacitance -- 170 -- Q g Total Gate Charge -- 103.6 -- Q gs Gate-to-Source Charge -- 20 -- Q gd Gate-to-Drain ( Miller ) Charge -- 33.2 -- pf nc V GS = 0V,V DS = 25V f =1.0MHz I D =81A,V DD =32V V GS = 10V Resistive Switching Characteristics Essentially independent of operating temperature t d(on) Turn-on Delay Time -- 29.1 -- t rise Rise Time -- 27.5 -- t d(off) Turn-Off Delay Time -- 85.3 -- t fall Fall Time -- 35.7 -- ns V DD =20V, I D =81A, V GS =10V R G =2.5Ω 2016 InPower Semiconductor Co., Ltd. Page 2 of 9 FTP1404 REV. A. Aug. 2016

Source-Drain Diode Characteristics Tc=25 unless otherwise specified I S I SM Continuous Source Current -- -- 202 A (Body Diode) T C =25 Maximum Pulsed Current -- -- 808 A (Body Diode) V SD Diode Forward Voltage -- -- 1.5 V I SD =95A, V GS =0V t rr Reverse Recovery Time -- 1708 -- ns I S = 10A Q rr Reverse Recovery Charge -- 4.36 -- uc di/dt=100a/us Pulse width 300μs; duty cycle 2% Notes: *1. Repetitive rating; pulse width limited by maximum junction temperature. *2. L=0.12mH, I D =95A, Start T J =25 2016 InPower Semiconductor Co., Ltd. Page 3 of 9 FTP1404 REV. A. Aug. 2016

Characteristics Curve: Figure1 Maximum Forward Bias Safe Operating Area Figure 2 Maximum Power Dissipation vs Case Temperature Figure 3 Maximum Continuous Drain Current vs Case Temperature Figure 4 Typical Output Characteristics Figure 5 Typical Output Characteristics Figure 6 Typical Transfer Characteristics 2016 InPower Semiconductor Co., Ltd. Page 4 of 9 FTP1404 REV. A. Aug. 2016

Figure 7 Typical Gate Charge vs Gate to Source Voltage Figure 8 Typical Body Diode Transfer Characteristics Figure 9 Typical Capacitance vs Drain to Source Voltage Figure 10 Typical Drian to Source on Resistance vs Junction Temperature 2016 InPower Semiconductor Co., Ltd. Page 5 of 9 FTP1404 REV. A. Aug. 2016

Figure 11 Typical Theshold Voltage vs Junction Temperature Figure 12 Typical Breakdown Voltage vs Junction Temperature Figure 13 Maximum Effective Transient Thermal Impedance, Junction-to-Case 2016 InPower Semiconductor Co., Ltd. Page 6 of 9 FTP1404 REV. A. Aug. 2016

Test Circuits and Waveforms Figure 14. Gate Charge Test Circuit Figure 15. Gate Charge Waveforms Figure 16. Resistive Switching Test Circuit Figure 17. Resistive Switching Waveforms 2016 InPower Semiconductor Co., Ltd. Page 7 of 9 FTP1404 REV. A. Aug. 2016

Figure 18. Diode Reverse Recovery Test Circuit Figure 19. Diode Reverse Recovery Waveform Figure20.Unclamped Inductive Switching Test Circuit Figure21.Unclamped Inductive Switching Waveform 2016 InPower Semiconductor Co., Ltd. Page 8 of 9 FTP1404 REV. A. Aug. 2016

Disclaimers: InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability, function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant information before orders and should verify that such information is current and complete. All products are sold subject to IPS s terms and conditions supplied at the time of order acknowledgement. InPower Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time of sale, Testing reliability and quality control are used to the extent IPS deems necessary to support this warrantee. Except where agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed. InPower Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit designs described herein. Customers are responsible for their products and applications using IPS s components. To minimize risk, customers must provide adequate design and operating safeguards. InPower Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its patent rights, nor the rights of others. Reproduction of information in IPS s data sheets or data books is permissible only if reproduction is without modification or alteration. Reproduction of this information with any alteration is an unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for such altered documentation. Resale of IPS s products with statements different from or beyond the parameters stated by InPower Semiconductor Co., Ltd for that product or service voids all express or implied warrantees for the associated IPS s product or service and is unfair and deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for any such statements. Life Support Policy: InPower Semiconductor Co., Ltd s products are not authorized for use as critical components in life support devices or systems without the expressed written approval of InPower Semiconductor Co., Ltd. As used herein: 1. Life support devices or systems are devices or systems which: a. are intended for surgical implant into the human body, b. support or sustain life, c. whose failure to perform when properly used in accordance with instructions for used provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 2016 InPower Semiconductor Co., Ltd. Page 9 of 9 FTP1404 REV. A. Aug. 2016