Processes for Flexible Electronic Systems Michael Feil Fraunhofer Institut feil@izm-m.fraunhofer.de
Outline Introduction Single sheet versus reel-to-reel (R2R) Substrate materials R2R printing processes R2R fine conductor lines R2R integration of active components Conclusion
Today Trends in Electronic Applications Tomorrow Logitech Fraunhofer Casio Infineon Philips Research
Electronic Goes Flexible Flexible Electronic Systems Advantages of flexible electronics rigid freedom in design cheap foil substrates light-weight compact portable products cost-effective assembly with reel-to-reel processing environment-friendly ubiquitous applications rigid-flex full flexible
EU IP Project SHIFT - Smart High-Integration Flex 2004-2007 embedded chip capacitive layer embedded IPD antenna integrated resistor
Single sheet production Characteristics Typically for standard PCBs, From cassette to cassette handling, Transport inside of a machine via belts and/or rolls All processes from flex circuit board up to the assembled and finished system possible Advantages: Multilayer easier and with better accuracy producible, Some assembly and curing processes simpler Critical points: - Handling of thin foil substrates, the thinner the more difficult, - Fixing on a rigid temporary carrier needed, - High throughput
Reel-to-reel (R2R) Characteristics Increase of throughput from stop and go to continuously working processes rotatory principles e.g. printing methods from flatbed screen printing to offset printing (paper industry) At the moment mainly used for single layer processing R2R assembly used for smart labels, Vacuum processes may, but must not be expensive (cigarette paper) Force free web transport Advantages: Very fast continuously running processes possible (from m/min to some m/s) Easier handling of thin foils Critical points: - Unexpected belt stop (especially at thermal processes), - Electrostatic charge - Layer to layer adjustment with high accuracy
Substrate materials Important parameters: Cost Mechanical Characteristics Thermal stability (solder processes at > 240 C) Moisture absorption Warpage resistant, shrinkage Coefficient of thermal expansion (CTE) Isotropy of the material Surface tension, wettability (adhesion) Chemicals resistant Biocompatibility Electrical Characteristics Dielectric coefficient (typ. 3 4) Loss angle (typ. 0,01 0,001) Voltage stability (typ. some kv at 50μm substrate thickness) Spec. resistance (typ. >10 16 Ωcm), surface resistance (typ. > 10 12 Ωcm)
Low Cost Materials Flexible Electronic Systems Lower thermal stability, improvable by special treatment T g <100 C Polyester (PET) Standard material for smart label, good chem. resistance, max. process temperature: 120 C, medium moisture absorption (0,5%), lowest price PET thermal stabilized good chem. resistance, max. process temperature: 150 C, Polyethylen-naphtalat good chem. resistance, max. process temperature: 160 C, relatively (PEN) low-priced Temperature resistant substrates Polyimid (PI) Standard material for flex boards, good chem. resistance (alcali!), max. process temperature: > 280 C, medium moisture absorption (0,8%), high price Liquid Crystalline Polymer relatively new material especially for high frequency applications (LCP) very high chem. resistance, max. process temperature: 280 C, very low moisture absorption (0,04%), high price
Modules of the Reel-to-Reel Application Center Substrate Technology Direct Metallization System Alignement Screen Printing Curing Resist Coating Development Standard Substrates Assembly Technology Bonding Module Fine-Pitch Substrates Etiching, Stripping Screen Printing Dispensing Die-Attach FC-Bonding Curing Laminator El. Test Laser treatment
R2R Screen Printing, Example: Electroluminescent Pastes Structure of the display Process steps 1. Substrate (PET) 2. Print of bottom electrode, Ag paste ca. 10μm 3. 2 Prints of isolating layers, dielectric paste 20μm 4. Print of luminescent material, 35μm (3 colors possible) 5. Print of transparent electrode,10μm 6. Lamination of cover foil cover foil transparent electrode luminescent material dielectric layers bottom electrode substrate 1 2 3 4 5
R2R screen printing processes used in SHIFT 2-layer process Print of dielectric layer Min. size of printed via openings: 200μm Via openings by laser: 50 150μm Second conductor layer by screen printing Substrate Layer 2: Polymer Ag paste Dielectric layer Layer 1: Cu
Integration of printed resistors ESL R12112 (100 Ω/ ) and ESL R12114 (10 kω/ ) L/W between 0.33 and 10 Minimal dimensions: 0.5 mm thermal treatment at 150 C up to 2h
R2R fine conductor lines Process flow subtractive technique (Cleaning) Lamination of photo resist (15μm solid resist, 15μm Mylar cover foil) Exposure (vacuum contact) Develop of photo resist Cu etch Removal of photo resist Process flow semiadditive technique (Cleaning) Lamination of photo resist (15μm solid resist, 15μm Mylar cover foil) Exposure (vacuum contact) Develop of photo resist Electro plating of Cu up to the desired thickness Removal of photo resist Cu difference etching
Fine pitch substrates Subtractive technique: 5μm Cu Semiadditive technique: 6-7μm Cu Interdigital test pattern, 40μm pitch Interdigital test pattern, 30μm pitch
R2R integration of active components Ultra thin silicon becomes bendable ideal for application in ultra thin flexible systems Base material = monocrystalline Si brittle material adequate handling Dicing by thinning process (DbyT) using dry Si etching nearly ideal chip edges for highest breakage resistance DbyT allows any chip geometry (circle, polygone, rounded corners, etc.) Need of adapted assembly methods 3-Punkt-Biegetest Biegeradius ca. 2mm!
Manufacture and transfer of 20 μm thin chips according to Dicing-by-Thinning concept Device wafer Device wafer Carrier wafer Device wafer Carrier wafer Device wafer having dryetched chip grooves Laminate double side adhesive tape; combination of temperature- and UVreleasable tape Bonding of device and carrier wafer under vacuum conditions; Waferstack ready for thinning Carrier wafer Backside thinning ( grinding, etching)until front side grooves are opened Remove chip / tape ensemble by heating; Transfer of chips onto pick-up tape Removal of tape Chips ready for pick&place
Assembly and Electrical Interconnection Methods for Thin Chips Face Up Assembly and Isoplanar Contacts Face Down Assembly FC-like Technique Contacts across chip edge Contacts through laminated foil Contacts through coated film ACA ICA /NCA ICA Solder
Pick and Place of 20 μm Thin Chips Process is based on: Dicing-by-Thinning concept using dryetched grooves Pick & place process using thermal releasable tapes IC local heating Automated, fast pick-up process for 20 50 μm thin chips developed by Mühlbauer Principle of thermal releasable connection
Isoplanar Interconnection Technique NCA IC Conductor line IC Substrate Curing Substrate ICA Due to low topography of thin ICs, electrical interconnection is achieved by printing or dispensing of silver-filled polymer across chip edge Pressure less method Lowest total system thickness (thickness of conductor line does not contribute to the assembly height of IC) Pitch depending on print method Cross-section of an Isoplanar Contact source: Epson
Flip Chip Bonding Technique with ACA bumps IC substrate bonding force ACA conductor after placement curing with continuous bonding force IC substrate Flip Chip with ACA: Low resistance State of the art High pin count Narrow pitches
Reel-to-reel (R2R) assembly of thin chip
Ultrathin soldered Flip Chip Interconnections Chips: Contact: Flex: min. thickness: 20 μm size: 5 x 5 mm2, pitch: 100 μm 3 μm SnCu PI 25 μm, Cu 10 μm epoxy+ Kapton each 25 μm Barbara Pahl, Berlin
Ultra thin foil package 6 2, 3 5 4 1 1. Substrate: PET/Polyimide 2. Metallization: Cu 3. Cu Patterning: Litho/etching 4. ACA deposition/ chip placement 5. Screen printing dielectric layer 6. Screen printing of Ag paste or Cu-technique
Demonstrator for Film Package Flexible Electronic Systems Combination of Flat Battery, IC (SMD) and display Integrated with cold assembly steps Further integration with solar cell and charging circuit
Conclusion In future, flexible electronic systems have a very high application potential This requires thin flexible foils as substrates In view of cost and handling of thin foils, R2R processes are the right choice Need of integration methods of various elements like active and passive elements, sensors, power supply, etc. with adequate mechanical properties and geometrical dimensions Many methods are working in a laboratory scale, but from production point of view there is something to do In this field, the Fraunhofer with his R2R application center is a competent partner for the industry