Features Advanced Process Technology Ultra Low On-Resistance 75 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUTOMOTIVE GRADE V DSS R DS(on) typ. max. I D (Silicon Limited) I D (Package Limited) HEXFET Power MOSFET 40V 0.90m.25m 400A 240A Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications. D 2 Pak 7 Pin G D S Gate Drain Source Base Part Number Package Type D 2 Pak 7 Pin Standard Pack Form Quantity Orderable Part Number Tube 50 Tape and Reel Left 800 TRL Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless otherwise specified. Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 400 I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 280 I D @ T C = 25 C Continuous Drain Current, V GS @ V (Wire Bond Limited) 240 A I DM Pulsed Drain Current 6 P D @T C = 25 C Maximum Power Dissipation 380 W Linear Derating Factor 2.5 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy (Thermally Limited) 290 mj I AR Avalanche Current See Fig.4,5, 22a, 22b A E AR Repetitive Avalanche Energy mj dv/dt Peak Diode Recovery 2.0 V/ns T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds (.6mm from case) 300 Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 0.40 R JA Junction-to-Ambient ( PCB Mount) 40 C/W HEXFET is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 205--20
Static @ (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 40 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.038 V/ C Reference to 25 C, I D = 5mA R DS(on) Static Drain-to-Source On-Resistance 0.90.25 m V GS = V, I D = 95A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 250µA gfs Forward Trans conductance 300 S V DS = V, I D = 95A R G Gate Resistance 2.0 I DSS Drain-to-Source Leakage Current 20 V DS = 40V, V GS = 0V µa 250 V DS = 40V,V GS = 0V,T J =25 C Gate-to-Source Forward Leakage V GS = 20V I GSS na Gate-to-Source Reverse Leakage - V GS = -20V Dynamic Electrical Characteristics @ (unless otherwise specified) Q g Total Gate Charge 60 240 I D = 80A Q gs Gate-to-Source Charge 42 V DS = 20V nc Q gd Gate-to-Drain Charge 65 V GS = V Q sync Total Gate Charge Sync. (Q g - Q gd ) 95 t d(on) Turn-On Delay Time 23 V DD = 26V t r Rise Time 240 I D = 240A ns t d(off) Turn-Off Delay Time 9 R G = 2.7 t f Fall Time 60 V GS = V C iss Input Capacitance 930 V GS = 0V C oss Output Capacitance 2020 V DS = 25V C rss Reverse Transfer Capacitance 990 pf ƒ =.0MHz, See Fig. 5 C oss eff.(er) Effective Output Capacitance (Energy Related) 2590 V GS = 0V, V DS = 0V to 32V C oss eff.(tr) Effective Output Capacitance (Time Related) 2650 V GS = 0V, V DS = 0V to 32V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 400 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 6 (Body Diode) p-n junction diode. V SD Diode Forward Voltage.3 V,I S = 95A,V GS = 0V t rr Reverse Recovery Time 49 V DD = 34V ns 5 I F = 240A, Q rr Reverse Recovery Charge 37 di/dt = A/µs nc 4 I RRM Reverse Recovery Current 3.2 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting, L = 0.0mH, R G = 25, I AS = 240A, V GS =V. Part not recommended for use above this value. I SD 240A, di/dt 740A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at T J approximately 90 C. R JC value shown is at time zero 2 205--20
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 60µs PULSE WIDTH Tj = 25 C 0. 0. 0 V DS, Drain-to-Source Voltage (V) 4.5V 60µs PULSE WIDTH Tj = 75 C 0. 0 V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 0 2.0 Fig. 2 Typical Output Characteristics I D = 95A V GS = V T J = 75 C.5 0. V DS = 25V 60µs PULSE WIDTH 3 4 5 6 7 8 V GS, Gate-to-Source Voltage (V).0 0.5-60 -40-20 0 20 40 60 80 20406080 T J, Junction Temperature ( C) Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance vs. Temperature 000 00 V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss C oss 4.0 2.0.0 8.0 I D = 80A V DS = 32V V DS = 20V C rss 0 6.0 4.0 2.0 V DS, Drain-to-Source Voltage (V) 0.0 0 50 50 200 250 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 205--20
Energy (µj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) 0 T J = 75 C 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) µsec msec V GS = 0V 0. 0.0 0.5.0.5 2.0 V SD, Source-to-Drain Voltage (V) Tc = 25 C Tj = 75 C Single Pulse msec 0 V DS, Drain-to-Source Voltage (V) DC 420 Fig. 7 Typical Source-to-Drain Diode Forward Voltage 50 Fig 8. Maximum Safe Operating Area Id = 5mA 360 Limited By Package 48 300 46 240 80 44 20 42 60 0 25 50 75 25 50 75 40-60 -40-20 0 20 40 60 80 20406080 T J, Temperature ( C ) T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature 3.5 3.0 2.5 E AS, Single Pulse Avalanche Energy (mj) Fig. Drain-to-Source Breakdown Voltage 200 0 800 I D TOP 44A 80A BOTTOM 240A 2.0.5.0 0.5 600 400 200 0.0-5 0 5 5 20 25 30 35 40 45 V DS, Drain-to-Source Voltage (V) 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig. Typical COSS Stored Energy Fig 2. Maximum Avalanche Energy vs. Drain Current 4 205--20
E AR, Avalanche Energy (mj) Thermal Response ( Z thjc ) C/W 0. 0.0 D = 0.50 0.20 0. 0.05 0.02 0.0 SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R 3 R R 2 R 3 J J 2 2 3 3 Ci= i Ri Ci= i Ri Ri ( C/W) I (sec) R 4 R 4 0.00757 0.000006 0.4378 0.009800 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc 0.00 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case 4 4 C C 0.06508 0.000064 0.833 0.005 0 Duty Cycle = Single Pulse 0.0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) Avalanche Current (A) 0.05 0. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 50 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 4. Avalanche Current vs. Pulse width 320 280 240 200 60 20 80 40 TOP Single Pulse BOTTOM.0% Duty Cycle I D = 240A 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.infineon.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 8a, 8b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 3, 4). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5 205--20
Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) 4.5 4.0 9 I F = 96A V R = 34V 3.5 3.0 8 7 2.5 2.0 I D = 250µA I D =.0mA I D =.0A 6 5 4.5 3.0-75 -50-25 0 25 50 75 25 50 75 200 T J, Temperature ( C ) 2 200 300 400 500 di F /dt (A/µs) Fig 6. Threshold Voltage vs. Temperature Fig. 7 - Typical Recovery Current vs. dif/dt 2 9 8 I F = 44A V R = 34V 40 20 I F = 96A V R = 34V 7 80 6 5 60 4 3 40 2 200 300 400 500 di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. dif/dt 20 200 300 400 500 di F /dt (A/µs) Fig. 9 - Typical Stored Charge vs. dif/dt 80 60 40 20 I F = 44A V R = 34V 80 60 40 20 200 300 400 500 di F /dt (A/µs) Fig. 20 - Typical Stored Charge vs. dif/dt 6 205--20
Fig 2. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G D.U.T + I AS - V DD A 20V tp 0.0 Fig 22a. Unclamped Inductive Test Circuit I AS Fig 22b. Unclamped Inductive Waveforms Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Vds Id Vgs Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 205--20
D 2 Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches)) D 2 Pak - 7 Pin Part Marking Information Part Number IR Logo AUFS3004-7P YWWA XX XX Date Code Y= Year WW= Work Week Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 205--20
D 2 Pak - 7 Pin Tape and Reel Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 205--20
Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model RoHS Compliant Automotive (per AEC-Q) Comments: This part number(s) passed Automotive qualification. Infineon s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D 2 -Pak 7 Pin MSL Class M4 (+/- 800V) AEC-Q-002 Class H3A (+/- 6000V) AEC-Q-00 Class C5 (+/- 2000V) AEC-Q-005 Yes Highest passing voltage. Revision History Date Comments 3/4/205 Updated datasheet based on new IR corporate template. Updated part marking from "AUS3004-7P" to "AUFS3004-7P" on page. /20/205 Updated datasheet with corporate template Corrected ordering table on page. Published by Infineon Technologies AG 8726 München, Germany Infineon Technologies AG 205 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 205--20