NDDN3U N-Channel Power MOSFET V, 3 m Features % Avalanche Tested These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant ABSOLUTE MAXIMUM RATINGS ( unless otherwise noted) V (BR)DSS R DS(ON) MAX Parameter Symbol NDD Unit Drain to Source Voltage V DSS V Gate to Source Voltage V GS ±5 V Continuous Drain Current R JC Power Dissipation R JC Pulsed Drain Current Steady State Steady State Operating Junction and Storage Temperature T C = 5 C I D A T C = C.9 T C = 5 C P D W t p = s I DM A T J, T STG 55 to +5 Source Current (Body Diode) I S 3 A Single Pulse Drain to Source Avalanche Energy (I D = 3.5 A) C EAS mj V 3 m @ V N Channel MOSFET D () G () S (3) RMS Isolation Voltage (t =.3 sec., R.H. 3%, T A = 5 C) (Figure 5) V ISO V 3 Peak Diode Recovery (Note ) dv/dt 5 V/ns Lead Temperature for Soldering Leads T L C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. I SD 3 A, di/dt A/ s, V DS peak V (BR)DSS, V DD = % V (BR)DSS THERMAL RESISTANCE Parameter Symbol Value Unit Junction to Case (Drain) R JC. C/W Junction to Ambient Steady State (Note 3) NDDN3U (Note ) NDDN3U (Note ) NDDN3U 35G. Insertion mounted 3. Surface mounted on FR board using sq. pad size (Cu area =.7 in sq [ oz] including traces) R JA 7 9 95 C/W 3 DPAK CASE 39C CASE 39D MARKING AND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. 3 CASE 39AD Semiconductor Components Industries, LLC, January, Rev. Publication Order Number: NDDN3U/D
NDDN3U ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Test Conditions Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage V (BR)DSS V GS =V, I D =ma V Drain to Source Breakdown Voltage Temperature Coefficient V (BR)DSS /T J Reference to 5 C, I D = ma 5 mv/ C Drain to Source Leakage Current I DSS V DS = V, V GS =V T J =5 C A Gate to Source Leakage Current I GSS V GS = ±5 V ± na ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GS(TH) V DS =V GS, I D = 5 A 3. V Negative Threshold Temperature Coefficient V GS(TH) /T J Reference to 5 C, I D = 5 A. mv/ C Static Drain-to-Source On Resistance R DS(on) V GS =V, I D = 5.5 A 3 3 m Forward Transconductance g FS V DS =5V, I D = 5.5 A S Input Capacitance C iss DYNAMIC CHARACTERISTICS 79 pf Output Capacitance C oss VDS =5V, VGS = V, f = MHz 7 Reverse Transfer Capacitance C rss 3. Effective output capacitance, energy C o(er) 3.9 related (Note ) V GS = V, V DS = to V Effective output capacitance, time related (Note 7) C o(tr) I D = constant, V GS = V, V DS = to V Total Gate Charge Q g nc Gate-to-Source Charge Q gs.7 V DS = 3 V, I D = 3 A, V GS =V Gate-to-Drain Charge Q gd.9 Plateau Voltage V GP 5. V Gate Resistance R g.5 RESISTIVE SWITCHING CHARACTERISTICS (Note 5) Turn-on Delay Time t d(on) ns Rise Time t r V DD = 3 V, I D =3A, Turn-off Delay Time t d(off) V GS =V, R G = Fall Time t f SOURCE DRAIN DIODE CHARACTERISTICS Diode Forward Voltage V SD I S = 3 A, V GS =V Reverse Recovery Time t rr 35 T J =5 C.93. V T J = C. Charge Time t a V GS =V, V DD =3V Discharge Time t b I S = 3 A, d i /d t = A/ s 97 33 ns Reverse Recovery Charge Q rr 3. C. Pulse Width 3 s, Duty Cycle %. 5. Switching characteristics are independent of operating junction temperatures.. C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from to % V (BR)DSS 7. C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to % V (BR)DSS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NDDN3U MARKING DIAGRAMS Drain YWW N 3UG Drain YWW N 3UG Drain YWW N 3UG 3 Gate Drain Source 3 Gate Drain Source Drain 3 Gate Source DPAK Y WW G = Year = Work Week = Pb Free Package ORDERING INFORMATION NDDN3U G NDDN3U 35G NDDN3UTG Device Package Shipping (Pb-Free, Halogen-Free) (Pb-Free, Halogen-Free) DPAK (Pb-Free, Halogen-Free) 75 Units / Rail 75 Units / Rail 5 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. 3
NDDN3U TYPICAL CHARACTERISTICS I D, DRAIN CURRENT (A) 3 5 5 3 V GS = V to.5 V V GS =. V V GS = 5.5 V V GS = 5. V V GS =.5 V V GS =. V 5 3 I D, DRAIN CURRENT (A) V DS = 5 V T J = 55 C T J = 5 C V GS, GATE TO SOURCE VOLTAGE (V) Figure. On Region Characteristics Figure. Transfer Characteristics R DS(on), DRAIN TO SOURCE RESISTANCE ( ) R DS(on), NORMALIZED DRAIN TO SOURCE RESISTANCE.75.7.5..55.5.5..35.3.5.7.9.7.3..7.5 5 5 Figure 3. On Resistance vs. Gate to Source Voltage.5 I D = 5.5 A.3 V GS = V..5.9 5 V GS, GATE VOLTAGE (V) 5 7 5 75 T J, JUNCTION TEMPERATURE ( C) 5 Figure 5. On Resistance Variation with Temperature I D = 5.5 A 9 5 R DS(on), DRAIN TO SOURCE RESISTANCE ( ) BV DSS, NORMALIZED BREAKDOWN VOLTAGE.75.7.5..55.5.5..35.3.5.5..75.5.5..975.95.95 5 V GS = V 3 I D, DRAIN CURRENT (A) Figure. On Resistance vs. Drain Current and Gate Voltage I D = ma 5 5 5 T J, JUNCTION TEMPERATURE ( C) 5 Figure. Breakdown Voltage Variation with Temperature 75 5
NDDN3U TYPICAL CHARACTERISTICS V GS(th), NORMALIZED THRESHOLD VOLTAGE.5..5..95.9.5..75.7.5 5 5 5 5 75 I D = 5 A T J, JUNCTION TEMPERATURE ( C) 5 5 I DSS, LEAKAGE (na),, T J = 5 C T J = C 3 5 Figure 7. Threshold Voltage Variation with Temperature Figure. Drain to Source Leakage Current vs. Voltage C, CAPACITANCE (pf),. C OSS C ISS C RSS V GS = V f = MHz V GS, GATE TO SOURCE VOLTAGE (V) Q GS V DS Q T Q GD V GS V DS = 3 V I D = 3 A 35 3 5 5 5 Q G, TOTAL GATE CHARGE (nc) Figure 9. Capacitance Variation Figure. Gate to Source and Drain to Source Voltage vs. Total Charge I S, SOURCE CURRENT (A) T J = 5 C T J = C t, TIME (ns) V GS = V V DD = 3 V t d(off) t f t r t d(on)...5..7. T J = 55 C.9. V SD, SOURCE TO DRAIN VOLTAGE (V). Figure. Diode Forward Voltage vs. Current.. R G, GATE RESISTANCE ( ) Figure. Resistive Switching Time Variation vs. Gate Resistance 5
R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE... E Duty Cycle =.5...5.. E 5 I D, DRAIN CURRENT (A) Single Pulse... NDDN3U TYPICAL CHARACTERISTICS V GS 5 V Single Pulse T C = 5 C Figure 3. Maximum Rated Forward Biased Safe Operating Area NDDN3U E E 3 E E E+ t, TIME (s) R DS(on) Limit Thermal Limit Package Limit s s ms ms dc Figure. Thermal Impedance (Junction to Case) for NDDN3U R JC steady state =. C/W E+ E+ E+3
NDDN3U PACKAGE DIMENSIONS CASE 39D ISSUE C V B R C E NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 9.. CONTROLLING DIMENSION: INCH. S T SEATING PLANE F 3 G A K D 3 PL J.3 (.5) M T H Z INCHES MILLIMETERS DIM MIN MAX MIN MAX A.35.5 5.97.35 B.5.5.35.73 C..9.9.3 D.7.35.9. E..3..5 F.37.5.9. G.9 BSC.9 BSC H.3..7. J..3..5 K.35.3.9 9.5 R..5.5 5.5 S.5..3. V.35.5.9.7 Z.55 3.93 STYLE : PIN. GATE. DRAIN 3. SOURCE. DRAIN 3.5 MM, STRAIGHT LEAD CASE 39AD ISSUE B L L T SEATING PLANE b X e E E3 D L 3X b.3 M T A A A A E E D D NOTES:.. DIMENSIONING AND TOLERANCING PER ASME Y.5M, 99... CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN.5 AND.3mm FROM TERMINAL TIP.. DIMENSIONS D AND E DO NOT INCLUDE MOLD GATE OR MOLD FLASH. MILLIMETERS DIM MIN MAX A.9.3 A.. A.7. b.9.9 b.77. D 5.97. D. E.35.73 E.57 5.5 E3.5 5. e. BSC L 3. 3. L. L.9.7 OPTIONAL CONSTRUCTION STYLE : PIN. GATE. DRAIN 3. SOURCE. DRAIN 7
NDDN3U PACKAGE DIMENSIONS L3 L b e E b3 3 b A D B DETAIL A c.5 (.3) M C A DPAK (SINGLE GAUGE) CASE 39C ISSUE D C c H L GAUGE PLANE SOLDERING FOOTPRINT*.. L L DETAIL A ROTATED 9 CW.5. A H 3.. C Z SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.5M, 99.. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED. INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX A..9..3 A..5..3 b.5.35.3.9 b.3.5.7. b3..5.57 5. c.... c.... D.35.5 5.97. E.5.5.35.73 e.9 BSC.9 BSC H.37. 9.. L.55.7..7 L. REF.7 REF L. BSC.5 BSC L3.35.5.9.7 L.. Z.55 3.93 STYLE : PIN. GATE. DRAIN 3. SOURCE. DRAIN 5....3.7.3 SCALE 3: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 53, Denver, Colorado 7 USA Phone: 33 75 75 or 3 3 Toll Free USA/Canada Fax: 33 75 7 or 3 37 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 955 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 33 79 9 Japan Customer Focus Center Phone: 3 57 5 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NDDN3U/D