NTR4101P, NTRV4101P. Trench Power MOSFET 20 V, Single P Channel, SOT 23

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NTRP, NTRVP Trench Power MOSFET V, Single P Channel, SOT Features Leading V Trench for Low R DS(on). V Rated for Low Voltage Gate Drive SOT Surface Mount for Small Footprint NTRV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC Q Qualified and PPAP Capable These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant Applications Load/Power Management for Portables Load/Power Management for Computing Charging Circuits and Battery Protection MAXIMUM RATINGS (T J = C unless otherwise noted) Parameter Symbol Value Unit Drain to Source Voltage V DSS V Gate to Source Voltage V GS ±. V Continuous Drain Current (Note ) Power Dissipation (Note ) Continuous Drain Current (Note ) Power Dissipation (Note ) T A = C I D. A T A = C.7 t s T A = C. T A = C P D.7 W t s. T A = C I D. A T A = C. T A = C P D. W Pulsed Drain Current tp = s I DM A ESD Capability (Note ) C = pf, RS = Operating Junction and Storage T J, T STG ESD V to Source Current (Body Diode) I S. A Single Pulse Drain to Source Avalanche Energy (V GS = V, I L =. Apk, L = mh, R G = ) Lead for Soldering Purposes (/ from case for s) C EAS mj T L C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. G SOT CASE STYLE P Channel MOSFET S Device Package Shipping D MARKING DIAGRAM & PIN ASSIGNMENT Gate Drain TR M TR = Device Code M = Date Code = Pb Free Package (*Note: Microdot may be in either location) NTRPTG V (BR)DSS R DS(ON) TYP I D MAX V NTRPTH NTRVPTG 7 m @. V 9 m @. V m @. V ORDERING INFORMATION SOT (Pb Free) SOT (Pb Free). A Source / Tape & Reel / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. Semiconductor Components Industries, LLC, May, Rev. 9 Publication Order Number: NTRP/D

NTRP, NTRVP THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction to Ambient (Note ) R JA 7 C/W Junction to Ambient t < s (Note ) R JA Junction to Ambient (Note ) R JA. Surface mounted on FR board using in sq pad size (Cu area =.7 in sq [ oz] including traces). Surface mounted on FR board using the minimum recommended pad size.. ESD Rating Information: HBM Class ELECTRICAL CHARACTERISTICS (T A = C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage (Note ) (V GS = V, I D = A) Zero Gate Voltage Drain Current (Note ) (V GS = V, V DS = V) V (BR)DSS V I DSS. A Gate to Source Leakage Current (V GS = ±. V, V DS = V) I GSS ± na ON CHARACTERISTICS Gate Threshold Voltage (Note ) (V GS = V DS, I D = A) Drain to Source On Resistance (V GS =. V, I D =. A) (V GS =. V, I D =. A) (V GS =. V, I D =.9 A) V GS(th)..7. V R DS(on) 7 9 Forward Transconductance (V DS =. V, I D =. A) g FS 7. S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance (V GS = V, f = MHz, V DS = V) C oss m C iss 7 pf Reverse Transfer Capacitance C rss 7 Total Gate Charge (V GS =. V, V DS = V, I D =. A) Q G(tot) 7.. nc Gate to Source Gate Charge (V DS = V, I D =. A) Q GS. nc Gate to Drain Miller Charge (V DS = V, I D =. A) Q GD. nc Gate Resistance R G. SWITCHING CHARACTERISTICS (Note ) Turn On Delay Time t d(on) 7. ns Rise Time (V GS =. V, V DS = V, t r. Turn Off Delay Time I D =. A, R G =. ) t d(off). Fall Time t f. DRAIN SOURCE DIODE CHARACTERISTICS Forward Diode Voltage (V GS = V, I S =. A) V SD.. V Reverse Recovery Time t rr. ns Charge Time (V GS = V, di SD /dt = A/ s, I S =. A) t a 9.9 ns Discharge Time t b. ns Reverse Recovery Charge Q rr nc. Pulse Test: Pulse Width s, Duty Cycle %.. Switching characteristics are independent of operating junction temperature.

NTRP, NTRVP TYPICAL PERFORMANCE CURVES (T J = C unless otherwise noted) V GS = V. V T J = C. V. V. V.. V 7 V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) 9 7 T J = C C C V DS V V GS, GATE TO SOURCE VOLTAGE (VOLTS) Figure. On Region Characteristics Figure. Transfer Characteristics R DS(on), DRAIN TO SOURCE RESISTANCE ( )..9..7...... V GS =. V T = C T = C T = C 7 9 R DS(on), DRAIN TO SOURCE RESISTANCE ( ).. T J = C... V GS =. V..9..7 V GS =. V...... 7 9 Figure. On Resistance vs. Drain Current and Figure. On Resistance vs. Drain Current and. I D =. A V GS = V R DS(on), DRAIN TO SOURCE RESISTANCE (NORMALIZED).... I DSS, LEAKAGE (na) T J = C T J = C. 7 T J, JUNCTION TEMPERATURE ( C) Figure. On Resistance Variation with. V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) Figure. Drain to Source Leakage Current vs. Voltage

NTRP, NTRVP TYPICAL PERFORMANCE CURVES (T J = C unless otherwise noted) C, CAPACITANCE (pf) V GS = V C iss T J = C V GS, GATE TO SOURCE VOLTAGE (VOLTS). C oss. I D =. A C T rss J = C V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) Q g, TOTAL GATE CHARGE (nc) Figure 7. Capacitance Variation...... Q gs V DS Q gd QT V GS Figure. Gate to Source and Drain to Source Voltage vs. Total Gate Charge V DS, DRAIN TO SOURCE VOLTAGE (VOLTS) t, TIME (ns) V DD = V I D =. A V GS =. V t d(off) t f t r t d(on) R G, GATE RESISTANCE (OHMS) I S, SOURCE CURRENT (AMPS)..... V GS = V T J = C.... V SD, SOURCE TO DRAIN VOLTAGE (VOLTS). Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure. Diode Forward Voltage vs. Current

NTRP, NTRVP PACKAGE DIMENSIONS SOT (TO ) CASE ISSUE AP A E A D e b HE SEE VIEW C L L VIEW C c. NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: INCH.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A.9..... A...... b.7..... c.9.....7 D..9.... E....7.. e.7.9..7.7. L...... L...9...9 HE.....9. STYLE : PIN. CATHODE. CATHODE. ANODE.9.7 SOLDERING FOOTPRINT*.9.7..79.9... SCALE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box, Denver, Colorado 7 USA Phone: 7 7 or Toll Free USA/Canada Fax: 7 7 or 7 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 9 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTRP/D