NEW BACK-TO-BACK CURRENT SOURCE CONVERTER WITH SOFT START-UP AND SHUTDOWN CAPABILITIES

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NEW BACK-TO-BACK CURRENT SOURCE CONVERTER WITH SOFT START-UP AND SHUTDOWN CAPABILITIES I. Abdelalam, G.P. Adam, D. Holliday and B.W. William Univerity of Strathclyde, Glagow, UK Ibrahim.abdallah@trath.ac.uk Keyword: current ource converter, medium voltage, wind energy converion ytem, buck-boot converter, zero current witching. Abtract Back-to-back voltage ource and current ource converter are key component of many power converion ytem. Variou topologie have evolved around thee conventional voltage and current ource converter in an attempt to meet different deign and reliability contraint. Thi paper propoe a new back-to-back current ource converter that avoid the problem of exceive voltage tree on the witching device aociated with the traditional current ource converter. It main feature are reduced power circuit and control complexity, and inuoidal ac current with high power factor achieved at both ac ide at reduced witching frequency. Baic relationhip that govern teady-tate converter operation are etablihed, and filter deign i included. PSCAD/EMTDC imulation and experimentation are ued to demontrate the practicality of the propoed power converion ytem, and reult how that the converter ha good dynamic performance, with near unity input power factor over an extended operating range. Introduction Back-to-back (BTB) converter are ued in many power converion application, uch a machine drive, wind energy ytem, uninterruptible power upplie and HVDC tranmiion ytem. Variou topologie have evolved around voltage ource converter (VSC) and current ource converter (CSC) in an attempt to meet variou deign and reliability contraint []. The conventional BTB converter conit of a rectifier and an inverter connected via an energy torage element uch a a capacitor for a VSC or an inductor for a CSC []. The VSC baed BTB ha a fater dynamic repone and higher efficiency than the BTB CSC [3, 4], whilt the CSC in a BTB arrangement ha higher reliability and inherent current limiting capability during dc fault [5-7]. A new CSC baed BTB power converion ytem that i uitable for a wide range of medium-voltage application i preented. It addree the main limitation of conventional CSC baed power converter, uch a the over-voltage frequently experienced by witche during commutation. Additionally, it offer improved ac ide waveform, reduced emiconductor power lo, and oft tart-up and hutdown by exploiting it buck and boot capability. Propoed back-to-back converter. Operating principle Figure how the propoed BTB converter. It conit of a three-phae bridge rectifier and aociated ac filter (L and C ) at the ource ide, and a three-phae current ource inverter (CSI) with it ac filter capacitor C i at the load ide. Serie witch S r i placed between the rectifier bridge and the dc-link inductor L dc to adjut the output current by controlling the average current flow in the link inductor and, hence, the power flow between the ource and three-phae load. The witching period, T=t +t, of witch S r i divided into two operating mode. The firt mode i the dc-link inductor (L dc ) charging mode where witch S r i turned on during the interval t t. In thi mode, dc-link inductor current rie to equal witch current I, whilt the input current, I i, to the CSI i equal to zero. The econd mode i where witch S r i turned off during the period t t t. In thi mode, the the dclink inductor current gradually decreae a the energy tored in L dc during the firt mode i tranferred to the load, o that =I i and I =. The relationhip between the average dclink inductor current, average witch current I and average CSI input current I i can be ummaried a hown in Equation () and (): Ii ( ) IL () I I () L where δ=t /T i the witch on-tate duty cycle uch that δ. The propoed BTB converter i operated uch that it control the load power by modulating average input dc-link current I i. Although I i i dicontinuou, it average value over the fundamental period i contant. For minimum witching loe, the CSI i controlled uing elective harmonic elimination (SHE) PWM, with three notche per quarter cycle to adjut fundamental current and eliminate the 5 th harmonic current. The witching frequency f r of witch S r i.4khz and the required output frequency f op i 5Hz. To enure zero witching loe in the CSI, the witching intant of the CSI device mut coincide with zero input dc link current I i, which i determined by the modulation of witch S r.

i r_ p 3 (7) The rm value of the rectifier input fundamental current component i r i: ir (8). Circuit analyi Figure : Propoed BTB converter Figure how a implified repreentation of the propoed BTB converter. By applying the current divider method to the load ide, the relationhip between fundamental per-phae rm CSI output current i i and fundamental per-phae rm load current i L i: il ii (3) j CZ op i L where ω op i the output frequency in rad/ and Z L i load impedance. SHE PWM i ued to eliminate the 5 th harmonic from the CSI output current. At modulation index equal to, the peak fundamental CSI output current equal the average CSI input current, i.e. I= i i i. From Equation (), Equation (3) can be rewritten in term of the dc-link inductor current a: i L IL j CZ op i L To facilitate analyi of the rectifier input current, the dc ide inductance L dc i aumed ufficiently large o that the dc ide inductor current i contant (ripple free) and equal. Figure 3 how rectifier input current during one fundamental cycle. The pectrum of the rectifier input current i r can be obtained uing the double Fourier erie in complex form [8]: 5 j( mxny) j( mxny) ir_ mn I Le dxdy ILe dxdy 7 (4) (5) where y=ω t and x=ω c t, ω and ω c repectively repreent the fundamental and carrier frequencie in rad/, and where m and n repectively are the order of the carrier and baeband component harmonic. The baeband harmonic of the rectifier input current i r are computed by etting m= in Equation (5), yielding: j 3 IL ir _ n An jbn () n Equation () i valid for all n that repreent odd and nontriplen harmonic, otherwie i r_n = o that A n = and B n =. The peak value of the rectifier input fundamental component i r_p i obtained with n=, o that: _ Figure : Simplified repreentation of the propoed converter i r one carrier cycle 5π π Figure 3: Rectifier input current during one carrier cycle Auming lole converion, power balance dictate that input power to the converter equal the output power: 7 r c L L π 3i v 3i R (9) where v c i the rm fundamental phae voltage acro the rectifier ide capacitor, and R L i the per-phae load reitance. By ubtituting Equation (8) into Equation (9): vc il RL () The correponding rm fundamental upply current i can be expreed a: vc vn i () fl where f i the upply frequency..3 Supply ide filter deign The phae current conduction period of the ource ide converter i ⅔π radian per half-cycle, making it filter deign more challenging. Equation () ha hown that the converter input current i r contain all odd and non-triplen harmonic: dominantly the 5 th and the 7 th. To attenuate thee dominant harmonic, the ac ide filter cut-off frequency i initially elected to be.5 time the upply frequency f. Input filter capacitance C S =.33pu i adopted, which i within the normal range for a high-power, low witching frequency PWM CSC [9]. Simulation reult for different operating condition how, however, that for acceptable upply current THD, the ac filter cut-off frequency mut be.4f. The ac ide filter inductor L S i therefore deigned uing Equation () and (3): π ωt

.4 B () LC L (3) 5.7 C B where ω B i the bae frequency in rad/, bae capacitance C B =, bae inductance L ω B Z B = Z B and Z B i the bae B ω B impedance []. Therefore: L = 5.7ω B.33 = Z B =.53L.9ω B B ω B Z B (4) Equation (5) and () expre the ac ide filter parameter in term of the rated line-to-line voltage V LL and rated input power P for tar configuration, while Equation (7) pecifie the filter capacitance C for the delta configuration. VLL L.53 fp (5) P C.33 fvll () P C. fv (7) Baed on imulation and experimentation, it ha been hown that with the filter value calculated baed on Equation (5) and (), the input power factor profile of the propoed BTB converter varie with the input power a hown in Figure 4. The figure how that the input power factor exceed.8 between.4pu and pu rated load. Power Factor.9.8.7..5.4.3.....3.4.5..7.8.9.. Input Power (pu) Figure 4: Supply current power factor profile.5 Controller deign Since the propoed BTB power converion ytem upplie an iolated three-phae load, the trategy hown in Figure 5 i adopted for witch control. The outer loop regulate the voltage magnitude acro the load and et the reference average dc link inductor current. _ref A current limiter tage i ued to protect the power electronic component from overcurrent. The inner current control loop regulate I L and etimate modulation index δ for the active witch S r. LL 3 Simulation Figure 5: Control loop The propoed BTB converter having the parameter lited in Table i imulated. To demontrate ytem oft tart-up, the reference voltage at the load terminal i increaed gradually from zero to rated voltage. To tet the dynamic performance of the propoed BTB ytem, a load tep change i applied at time t= by connecting an additional parallel reitive load of 8Ω. The reult of thee tet are hown in Figure to Figure. Figure how that the voltage acro the load i maintained contant at 3V pk (V rm ) a the load i varied. Figure 7 how that a the load increae the average dc-link current and it reference (I ) L_ref increae to maintain power balance between the ac and dc ide. Figure 8 how that the tep change in load caue the converter input power to increae from 5kW (.75pu) to 3kW (.5pu). Figure 9 how upply current and phae a voltage a load varie, and highlight that the input power factor i in agreement with the theoretical value hown in Figure 4. Figure how the load current during the tep change in load and highlight the propoed BTB converter ability to continue upply of inuoidal current to the load. Voltage (V) Current (A) Rated input power kw Supply voltage 8V L_L Supply frequency Hz Rectifier ide filter inductance 3mH Rectifier ide filter capacitance 3μF ( connection) DC link inductance 5mH Output frequency 5Hz Inverter ide filter capacitance 3μF ( connection) Load reitance Ω Load inductance 4mH Table : Simulation parameter Figure : Peak output load voltage Figure 7: Average dc-link inductor current during load tep 3

Power (W) Voltage (V); Current (A) Current (A) Figure 8: Converter input power Figure 9: Supply current during tep load increae Figure : Load current during tep load increae 4 Experimental validation Reult obtained from a caled-down experimental tet rig of the propoed BTB, with parameter lited in Table, are preented. Unlike with the imulation decribed in Section 3, the output voltage reference i changed to initiate a tep change in the load. To enable oft tart-up and oft change, the reference voltage i paed through a low-pa filter with cut-off frequency of Hz. Initially the output voltage reference i et to 75V pk and then increaed to 9V pk, correponding to meaured input power of 38W and 84W repectively. Figure and Figure how the three-phae upply current and phae a voltage with output voltage reference of 75V pk and 9V pk repectively. Thee figure how that the upply current are inuoidal and that power factor change from.8 leading to unity a the reference i increaed. Figure 3 and Figure 4 how load voltage buildup during black-tart and during a change in load voltage reference, demontrating the ability of the propoed BTB power converion ytem to operate in ilanding mode. Figure 5 how that the current ource converter preent inuoidal output voltage to the load. 5 Concluion V (a) i L(a) i L(b) i L(c) i (a) i (b) i (c) A new current ource baed back-to-back power converion topology for medium voltage application i preented. Theoretical analyi, imulation, and experimental reult have hown that the propoed power converion ytem offer everal advantage uch a oft tart-up and hutdown, high efficiency, and fat dynamic performance. The preented ac ide filter deign enure high power factor at rated power, and low input current THD at the rectifier ide. Voltage (4V/div); Current (A/div) Rated input power 84W Supply voltage 5V L_L Supply frequency 5Hz Rectifier ide filter inductance 5mH Rectifier ide filter capacitance μf ( connection) DC-link inductance 5mH Output frequency 5Hz Inverter ide filter capacitance 9μF ( connection) Load reitance 5Ω Load inductance 3.3mH Table : Experimental parameter Figure : Detailed view of three-phae upply current and phae a voltage when output voltage reference i 75V pk Voltage (4V/div); Current (A/div) Time (5m/div) Figure : Detailed view of three-phae upply current and phae a voltage when output voltage reference i 9V pk Voltage (4V/div) V (a) i (a) i (b) i (c) V (a) i (a) i (b) i (c) Time (5m/div) Time (5m/div) Figure 3: Output voltage during tart up 4

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