Features l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175 C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Lead-Free Description This HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. Absolute Maximum Ratings HEXFET is a registered trademark of International Rectifier. IRFZ46ZPbF IRFZ46ZSPbF IRFZ46ZLPbF HEXFET Power MOSFET www.irf.com 1 09/21/ G TO-220AB IRFZ46ZPbF D S D 2 Pak IRFZ46ZSPbF V DSS = 55V R DS(on) = 13.6mΩ I D = 51A TO-262 IRFZ46ZLPbF Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 51 A I D @ T C = 0 C Continuous Drain Current, V GS @ V (See Fig. 9) 36 I DM Pulsed Drain Current c 200 P D @T C = 25 C Maximum Power Dissipation 82 W Linear Derating Factor 0.54 W/ C V GS Gate-to-Source Voltage ± 20 V E AS Single Pulse Avalanche Energy (Thermally Limited) d 63 mj E AS (tested) Single Pulse Avalanche Energy Tested Value i 97 I AR Avalanche Current c See Fig.12a,12b,15,16 A E AR Repetitive Avalanche Energy h mj T J Operating Junction and -55 to + 175 C T STG Storage Temperature Range Soldering Temperature, for seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw Thermal Resistance lbf in (1.1N m) PD - 95562A Parameter Typ. Max. Units R θjc Junction-to-Case 1.84 C/W R θcs Case-to-Sink, Flat, Greased Surface 0.50 R θja Junction-to-Ambient 62 R θja Junction-to-Ambient (PCB Mount, steady state)j 40
IRFZ46Z/S/LPbF Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 55 V V GS = 0V, I D = 250µA ΒV DSS / T J Breakdown Voltage Temp. Coefficient 0.053 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance.9 13.6 mω V GS = V, I D = 31A f V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 250µA gfs Forward Transconductance 45 S V DS = 25V, I D = 31A I DSS Drain-to-Source Leakage Current 20 µa V DS = 55V, V GS = 0V 250 V DS = 55V, V GS = 0V, T J = 125 C I GSS Gate-to-Source Forward Leakage 200 na V GS = 20V Gate-to-Source Reverse Leakage -200 V GS = -20V Q g Total Gate Charge 31 46 nc I D = 31A Q gs Gate-to-Source Charge 7.6 11 V DS = 44V Q gd Gate-to-Drain ("Miller") Charge 12 18 V GS = V f t d(on) Turn-On Delay Time 13 ns V DD = 28V t r Rise Time 63 I D = 31A t d(off) Turn-Off Delay Time 37 R G = 15Ω t f Fall Time 39 V GS = V f L D Internal Drain Inductance 4.5 nh Between lead, D 6mm (0.25in.) L S Internal Source Inductance 7.5 from package G and center of die contact S C iss Input Capacitance 1460 pf V GS = 0V C oss Output Capacitance 250 V DS = 25V C rss Reverse Transfer Capacitance 130 ƒ = 1.0MHz, See Fig. 5 C oss Output Capacitance 860 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 190 V GS = 0V, V DS = 44V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 3 V GS = 0V, V DS = 0V to 44V Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current 51 Conditions MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 200 integral reverse G (Body Diode)Ãc p-n junction diode. V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 31A, V GS = 0V f t rr Reverse Recovery Time 21 31 ns T J = 25 C, I F = 31A, V DD = 28V Q rr Reverse Recovery Charge 16 24 nc di/dt = 0A/µs f t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by T Jmax, starting T J = 25 C, L =0.13mH, R G = 25Ω, I AS = 31A, V GS =V. Part not recommended for use above this value. ƒ I SD 31A, di/dt 70A/µs, V DD V (BR)DSS, T J 175 C. Pulse width 1.0ms; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Limited by T Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 0% tested to this value in production. ˆ This is applied to D 2 Pak, when mounted on 1" square PCB ( FR-4 or G- Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com D S
I D, Drain-to-Source Current (Α) G fs, Forward Transconductance (S) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFZ46Z/S/LPbF 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 4.5V 20µs PULSE WIDTH Tj = 25 C 1 0.1 1 0 V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH Tj = 175 C 1 0.1 1 0 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 00 60 0 T J = 175 C 50 40 T J = 25 C 30 T J = 175 C T J = 25 C 20 1.0 V DS = 15V 20µs PULSE WIDTH 4 5 6 7 8 9 0 V DS = V 0 20 30 40 50 60 V GS, Gate-to-Source Voltage (V) I D,Drain-to-Source Current (A) Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance vs. Drain Current www.irf.com 3
I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance(pF) V GS, Gate-to-Source Voltage (V) IRFZ46Z/S/LPbF 000 V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss 12.0.0 8.0 I D = 31A V DS = 44V V DS = 28V V DS = 11V 00 6.0 C oss 4.0 C rss 2.0 0 1 0 0.0 0 5 15 20 25 30 35 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 00.00 00 OPERATION IN THIS AREA LIMITED BY R DS (on) 0.00 0.00 T J = 175 C 0µsec T J = 25 C 1.00 V GS = 0V 0. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 V SD, Source-to-Drain Voltage (V) 1 0.1 Tc = 25 C Tj = 175 C Single Pulse 1msec msec 1 0 00 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
I D, Drain Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) IRFZ46Z/S/LPbF 55 50 45 40 35 30 25 20 15 5 0 25 50 75 0 125 150 175 T C, Case Temperature ( C) 2.5 I D = 31A V GS = V 2.0 1.5 1.0 0.5-60 -40-20 0 20 40 60 80 0 120 140 160 180 T J, Junction Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Normalized On-Resistance vs. Temperature 1 D = 0.50 Thermal Response ( Z thjc ) 0.1 0.01 0.001 0.20 0. 0.05 0.02 0.01 R 1 R 1 R 2 R 2 R 3 R 3 τ J τ J τ 1 τ 1 τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i/ri SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case τ C τ Ri ( C/W) τi (sec) 0.9322 0.000357 0.5533 0.001133 0.3545 0.004091 www.irf.com 5
V GS(th) Gate threshold Voltage (V) E AS, Single Pulse Avalanche Energy (mj) IRFZ46Z/S/LPbF V DS L 15V DRIVER 300 250 200 I D TOP 3.5A 5.0A BOTTOM 31A R G 20V V GS tp D.U.T IAS 0.01Ω + - V DD A 150 Fig 12a. Unclamped Inductive Test Circuit tp V (BR)DSS 0 50 0 25 50 75 0 125 150 175 Starting T J, Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Q G Fig 12c. Maximum Avalanche Energy vs. Drain Current V Q GS Q GD 4.0 V G Charge Fig 13a. Basic Gate Charge Waveform 3.0 I D = 250µA 2.0 0 1K DUT L VCC 1.0-75 -50-25 0 25 50 75 0 125 150 175 200 T J, Temperature ( C ) Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage vs. Temperature 6 www.irf.com
E AR, Avalanche Energy (mj) Avalanche Current (A) IRFZ46Z/S/LPbF 00 0 Duty Cycle = Single Pulse 0.01 0.05 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25 C due to avalanche losses 0. 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs.pulsewidth 70 60 50 40 30 20 0 TOP Single Pulse BOTTOM 1% Duty Cycle I D = 31A 25 50 75 0 125 150 175 Starting T J, Junction Temperature ( C) Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-05 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see figure 11) Fig 16. Maximum Avalanche Energy vs. Temperature P D (ave) = 1/2 ( 1.3 BV I av ) = DT/ Z thjc I av = 2DT/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av www.irf.com 7
IRFZ46Z/S/LPbF + - D.U.T + ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - + Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V DS R D R G V GS D.U.T. + - V DD V Pulse Width 1 µs Duty Factor 0.1 % Fig 18a. Switching Time Test Circuit V DS 90% % V GS t d(on) t r t d(off) t f Fig 18b. Switching Time Waveforms 8 www.irf.com
IRFZ46Z/S/LPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information EXAMPLE: THIS IS AN IRF LOT CODE 1789 ASSEMBLED ON WW 19, 2000 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead - Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 19 LINE C Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9
IRFZ46Z/S/LPbF D 2 Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D 2 Pak (TO-263AB) Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE P = DESIGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com
IRFZ46Z/S/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL33L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN THE AS SEMBLY LINE "C" INTERNAT IONAL RECTIFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C OR INTERNATIONAL RECTIFIER LOGO AS S E MBL Y LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 11
IRFZ46Z/S/LPbF D 2 Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065).90 (.429).70 (.421) 11.60 (.457) 11.40 (.449) 16. (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) 252-75 TAC Fax: (3) 252-7903 Visit us at www.irf.com for sales contact information. 09/20 12 www.irf.com