ELEN 624 Signal Integrity

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ELEN 624 Sigal Itegrity Lecture 8 Istructor: Ji hao 408-580-7043, jzhao@ieee.org ELEN 624, Fall 2006 W8, 11/06/2006-1

Ageda Homework review S parameter calculatio From time domai ad frequecy domai Some additioal issues ivolved i sigal itegrity ELEN 624, Fall 2006 W8, 11/06/2006-2

Homework 1. Please try to derive the S expressio o slide 49. [ ] ([ ] ( ))[ ] S diag ( + diag( )) 1 = 0 0 2. For the discussio o slide 82, please provide the solutio of the iput impedace if we use either T or Pi model to termiate. 3. Please try to geerate the 2 port S parameter of the followig circuit from 1 khz to 1 GHz. Port 1 <i1,0> ad Port 2 <out1,0> with 50 Ohms as the referece impedace. C1a i1 0 1p R1 i1 mid1 1m L1 mid1 out1 1 C1b out1 0 2p [ ] [ ]( ( ) [ ] 1 diag + ) [ ] 11 = 11 12 L 22 21 ELEN 624, Fall 2006 W8, 11/06/2006-3

ELEN 624, Fall 2006 W8, 11/06/2006-4 Questio 1 [ ] [ ] [ ] [ ] [ ] [ ] = + = I V b I V a 0 0 0 0 1 2 1 1 2 1 V b V a 0 0 + = = ( ) ( ) I V V I V V 0 0 2 1 2 1 = + = + I V V b I V V a 0 0 0 0 0 0 2 2 = = + = = + [ ] [ ] [ ] [ ] [ ] + = I V S I V 0 0 0 0 1 1 [ ] [ ] [ ] [ ] [ ] + = U S U 0 0 0 0 1 1 [ ] [ ] [ ][ ] [ ] ( ) U S U 0 0 + = With equal 0 [ ] [ ] ( ) ( )[ ] ( ) ( ) 1 0 0 + = diag diag S

Questio 2 For the discussio o slide 82, please provide the solutio of the iput impedace if we use either T or Pi model to termiate. The key poit is to fid out L. [ ] [ ][ ( ] [ ] 1 + ) [ ] 11 = 11 12 L 22 21 ELEN 624, Fall 2006 W8, 11/06/2006-5

Iput Impedace for Coupled Trasmissio Lies I 1 V 1 I 2 V 2 Coupled Trasmissio Lies I 3 V 3 I 4 V 4 [ ] [ ]( ( ) [ ] 1 diag + ) [ ] 11 = 11 12 L 22 21 v v This ed termiated i sigle eded mode: 3 4 z = L3 z L4 i i 3 4 With sigle eded termiatio, L is a diagoal matrix. For a Pi model termiatio, L becomes R1 // R2+ R3 R3 R1 // R2+ R R2+ R3 1 ( ) R3 //( R2+ R1) R R + 2 2 R1 R 1 R 3 ( ) R //( R + R ) ELEN 624, Fall 2006 W8, 11/06/2006-6 3 R 3 2 1

Homework 1. Please try to geerate the 2 port S parameter of the followig circuit from 1 khz to 1 GHz. Port 1 <i1,0> ad Port 2 <out1,0> with 50 Ohms as the referece impedace. C1a i1 0 1p R1 i1 mid1 1m L1 mid1 out1 1 C1b out1 0 2p 1 0.9 0.8 1 = 1/(jwC) 2 = R + jwl 3 = 1/(jwC) 2 1 3 + 1 2 3 // 3 1 ( + ) //( + ) 1 2 // ( + ) //( + ) 2 3 3 + [ S] ([ ] diag( ))[ ( ] + diag( )) 1 = 0 0 2 3 1 3 2 2 1 1 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 4 5 6 7 8 9 10 x 10 9 ELEN 624, Fall 2006 W8, 11/06/2006-7

S Parameter Calculatio S parameter calculatio i both time domai ad frequecy domai 4 port S parameter ELEN 624, Fall 2006 W8, 11/06/2006-8

S Parameter Calculatio Frequecy Domai P2 P1 Defie 4 ports P3 P4 ELEN 624, Fall 2006 W8, 11/06/2006-9

S Parameter Calculatio ELEN 624, Fall 2006 W8, 11/06/2006-10

S Parameter Calculatio Time Domai P2 P1 Coect a Gaussia source + 50 Ohm at P1 Coect 50 Ohms at P2, P3, ad P4 Observe the time domai waveforms at P1~4 P3 P4 ELEN 624, Fall 2006 W8, 11/06/2006-11

S Parameter Calculatio Time domai waveforms ELEN 624, Fall 2006 W8, 11/06/2006-12

S Parameter Calculatio Time domai waveforms ELEN 624, Fall 2006 W8, 11/06/2006-13

S Parameter Calculatio ELEN 624, Fall 2006 W8, 11/06/2006-14

S Parameter Calculatio P2 P1 The system P3 P4 Observed time domai waveforms: V1, V2, V3, V4, ad Vs Icidet wave Vs/2 at P1 Total field at P1 is V1, so the reflected wave is V1-Vs/2 Trasferred waves are: V2, V3, V4. Based o S parameter defiitio: S11 = (V1-Vs/2)/(Vs/2) S21 = V2 / (Vs/2) S31 = V3 / (Vs/2) S41 = V4 / (Vs/2) Notice oly oe colum i S matrix is calculated ELEN 624, Fall 2006 W8, 11/06/2006-15

S Parameter Calculatio S?1 ELEN 624, Fall 2006 W8, 11/06/2006-16

S Parameter Calculatio S?2 ELEN 624, Fall 2006 W8, 11/06/2006-17

S Parameter Calculatio To calculate S parameter i time domai, it is ot very efficiet if the umber of ports is large. Need to ru log time domai simulatio till the waveform to decay to zero, so that the Fourier Trasformatio ca be applied. ELEN 624, Fall 2006 W8, 11/06/2006-18

Some additioal Issues i Sigal Itegrity Lossy trasmissio lies Impedace discotiuity (igored vias) Serpetie effects Iter Symbol Iterferece (ISI) Other structures ivolved i sigal trasmissio Vias Coectors Chip packages ELEN 624, Fall 2006 W8, 11/06/2006-19

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-20

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-21

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-22

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-23

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-24

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-25

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-26

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-27

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-28

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-29

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-30

Trasmissio Lie Losses ELEN 624, Fall 2006 W8, 11/06/2006-31

Electrical Properties of PCB or Package Materials ELEN 624, Fall 2006 W8, 11/06/2006-32

Serpetie Traces ELEN 624, Fall 2006 W8, 11/06/2006-33

Serpetie Traces ELEN 624, Fall 2006 W8, 11/06/2006-34

IterSymbol Iterferece (ISI) ELEN 624, Fall 2006 W8, 11/06/2006-35

IterSymbol Iterferece (ISI) ELEN 624, Fall 2006 W8, 11/06/2006-36

Effects of 90 o Beds ELEN 624, Fall 2006 W8, 11/06/2006-37

Effects of Topology ELEN 624, Fall 2006 W8, 11/06/2006-38

Other Structures Other structures ivolved i sigal trasmissio Vias Coectors Chip packages ELEN 624, Fall 2006 W8, 11/06/2006-39

The System ELEN 624, Fall 2006 W8, 11/06/2006-40

The Via ELEN 624, Fall 2006 W8, 11/06/2006-41

Via Effects ELEN 624, Fall 2006 W8, 11/06/2006-42

Via Couplig Effects ELEN 624, Fall 2006 W8, 11/06/2006-43

Electromagetic Iteractios Iside a System capacitor chip capacitor chip sigal traces vias Prited Circuit Board ELEN 624, Fall 2006 W8, 11/06/2006-44

Via Shield Effects ELEN 624, Fall 2006 W8, 11/06/2006-45

Coectors ELEN 624, Fall 2006 W8, 11/06/2006-46

Coector Effects ELEN 624, Fall 2006 W8, 11/06/2006-47

Coector Effects ELEN 624, Fall 2006 W8, 11/06/2006-48

Coector Effects ELEN 624, Fall 2006 W8, 11/06/2006-49

Coector Desig Guide ELEN 624, Fall 2006 W8, 11/06/2006-50

Chip Packages ELEN 624, Fall 2006 W8, 11/06/2006-51

Chip Packages ELEN 624, Fall 2006 W8, 11/06/2006-52

Chip Packages ELEN 624, Fall 2006 W8, 11/06/2006-53

Chip Packages ELEN 624, Fall 2006 W8, 11/06/2006-54

Effects of A Package ELEN 624, Fall 2006 W8, 11/06/2006-55

Effects of A Package ELEN 624, Fall 2006 W8, 11/06/2006-56

Effects of A Package ELEN 624, Fall 2006 W8, 11/06/2006-57

Effects of A Package ELEN 624, Fall 2006 W8, 11/06/2006-58

Effects of A Package ELEN 624, Fall 2006 W8, 11/06/2006-59

Homework ELEN 624, Fall 2006 W8, 11/06/2006-60

Homework Try the simulatio with ad without cosiderig the serpetie effects 20 s simulatio ELEN 624, Fall 2006 W8, 11/06/2006-61

Homework ELEN 624, Fall 2006 W8, 11/06/2006-62