Features Advanced Process Technology Ultra Low On-Resistance 75 C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUTOMOTIVE GRADE AUIRFR8E V DSS 6V R DS(on) typ. 7.m max. 8.4m I D (Silicon Limited) 79A 56A I D (Package Limited) HEXFET Power MOSFET D Description Specifically designed for Automotive applications, this HEXFET Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 75 C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D-Pak AUIRFR8E G D S Gate Drain Source G S Base part number AUIRFR8E Package Type D-Pak Standard Pack Form Quantity Orderable Part Number Tube 75 AUIRFR8E Tape and Reel Left 3 AUIRFR8ETRL Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25 C, unless otherwise specified. Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 79 I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 56 I D @ T C = 25 C Continuous Drain Current, V GS @ V (Package Limited) 56 A I DM Pulsed Drain Current 35 P D @T C = 25 C Maximum Power Dissipation W Linear Derating Factor.76 W/ C V GS Gate-to-Source Voltage ± 2 V E AS Single Pulse Avalanche Energy (Thermally Limited) 88 mj I AR Avalanche Current 47 A E AR Repetitive Avalanche Energy mj dv/dt Pead Diode Recovery dv/dt 2 V/ns T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds (.6mm from case) 3 Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case.32 R JA Junction-to-Ambient ( PCB Mount) 5 C/W R JA Junction-to-Ambient HEXFET is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 25--9
Static @ (unless otherwise specified) AUIRFR8E Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 6 V V GS = V, I D = 25µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient.73 V/ C Reference to 25 C, I D = 5mA R DS(on) Static Drain-to-Source On-Resistance 7. 8.4 m V GS = V, I D = 47A V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D = µa gfs Forward Trans conductance S V DS = 5V, I D = 47A R G(Int) Internal Gate Resistance.73 I DSS Drain-to-Source Leakage Current 2 V µa DS = 6V, V GS = V 25 V DS = 48V,V GS = V,T J =25 C Gate-to-Source Forward Leakage V I GSS na GS = 2V Gate-to-Source Reverse Leakage - V GS = -2V Dynamic Electrical Characteristics @ (unless otherwise specified) Q g Total Gate Charge 46 69 I D = 47A Q gs Gate-to-Source Charge V DS = 3V nc Q gd Gate-to-Drain Charge 2 V GS = V Q sync Total Gate Charge Sync. (Q g - Q gd ) 34 t d(on) Turn-On Delay Time 3 V DD = 39V t r Rise Time 35 I D = 47A ns t d(off) Turn-Off Delay Time 55 R G = t f Fall Time 46 V GS = V C iss Input Capacitance 229 V GS = V C oss Output Capacitance 27 V DS = 5V C rss Reverse Transfer Capacitance 3 pf ƒ =.MHz C oss eff. (ER) Effective Output Capacitance (Energy Related) 39 V GS = V, V DS = V to 48V C oss eff. (TR) Effective Output Capacitance (Time Related) 63 V GS = V, V DS = V to 48V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 79 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 35 (Body Diode) p-n junction diode. V SD Diode Forward Voltage.3 V,I S = 47A,V GS = V t rr Reverse Recovery Time 26 39 ns 3 47 V R = 5V, Q rr Reverse Recovery Charge 24 36 I nc F = 47A 35 53 di/dt = A/µs.8 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 56A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting, L =.8mH, R G = 25, I AS = 47A, V GS =V. Part not recommended for use above this value. I SD 47A, di/dt 668A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 4µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from to 8% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from to 8% V DSS. When mounted on " square PCB (FR-4 or G- Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at T J approximately 9 C. 2 25--9
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) AUIRFR8E VGS TOP 5V V 8.V 6.V 5.5V 5.V 4.8V BOTTOM 4.5V VGS TOP 5V V 8.V 6.V 5.5V 5.V 4.8V BOTTOM 4.5V 4.5V 4.5V 6µs PULSE WIDTH Tj = 25 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 6µs PULSE WIDTH Tj = 75 C. V DS, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics 2.5 I D = 47A V GS = V T J = 75 C 2..5. V DS = 25V. 6µs PULSE WIDTH 2 3 4 5 6 7 8 9 V GS, Gate-to-Source Voltage (V).5-6 -4-2 2 4 6 8 2468 T J, Junction Temperature ( C) Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance vs. Temperature 4 3 V GS = V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 6 2 I D = 47A V DS = 48V V DS = 3V V DS = 2V C iss 2 8 C oss 4 C rss V DS, Drain-to-Source Voltage (V) 2 3 4 5 6 Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 25--9
Energy (µj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) AUIRFR8E T J = 75 C V GS = V...5..5 2. V SD, Source-to-Drain Voltage (V) OPERATION IN THIS AREA LIMITED BY R DS (on) msec LIMITED BY PACKAGE µsec msec Tc = 25 C Tj = 75 C Single Pulse DC.. V DS, Drain-toSource Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 8 LIMITED BY PACKAGE 8 Fig 8. Maximum Safe Operating Area Id = 5mA 6 75 4 7 2 65 25 5 75 25 5 75 T C, Case Temperature ( C) 6-6 -4-2 2 4 6 8 2468 T J, Temperature ( C ) Fig. 9 Maximum Drain Current vs. Case Temperature.8 Fig. Drain-to-Source Breakdown Voltage 4.6 35 3 I D TOP 5.3A A BOTTOM 47A 25.4 2 5.2 5. 2 3 4 5 6 V DS, Drain-to-Source Voltage (V) 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Fig. Typical COSS Stored Energy Fig 2. Maximum Avalanche Energy vs. Drain Current 4 25--9
E AR, Avalanche Energy (mj) Thermal Response ( Z thjc ) AUIRFR8E.. D =.5.2..5.2. SINGLE PULSE ( THERMAL RESPONSE ) R R R 2 R 2 R 3 R 3 J J 2 2 3 3 Ci= i Ri Ci= i Ri. E-6 E-5.... t, Rectangular Pulse Duration (sec) R 4 R 4.2674.7 Ri ( C/W) i (sec) 4 4 C C.2878.9.66685.843.4628.5884 Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case Avalanche Current (A) Duty Cycle = Single Pulse..5. Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 5 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 5 C...E-6.E-5.E-4.E-3.E-2.E- tav (sec) Fig 4. Typical Avalanche Current Vs. Pulse width 8 6 4 2 TOP Single Pulse BOTTOM % Duty Cycle I D = 47A 25 5 75 25 5 75 Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy Vs. Temperature Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-5 at www.infineon.com). Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 C in Figure 3, 4). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) P D (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 5 25--9
Q RR (nc) I RR (A) Q RR (nc) V GS (th) Gate threshold Voltage (V) I RR (A) AUIRFR8E 4.5 4. 3.5 I D =.A I D =.ma I D = 25µA I D = µa 4 2 I F = 32A V R = 5V 3. 8 2.5 6 2. 4.5 2. -75-5 -25 25 5 75 25 5 75 T J, Temperature ( C ) Fig 6. Threshold Voltage vs. Temperature 2 4 6 8 di F /dt (A/µs) Fig. 7 - Typical Recovery Current vs. dif/dt 4 32 2 8 I F = 47A V R = 5V 28 24 2 6 I F = 32A V R = 5V 6 2 4 8 2 4 2 4 6 8 2 4 6 8 di F /dt (A/µs) di F /dt (A/µs) Fig. 8 - Typical Recovery Current vs. dif/dt Fig. 9 - Typical Stored Charge vs. dif/dt 32 28 24 2 I F = 47A V R = 5V 6 2 8 4 2 4 6 8 di F /dt (A/µs) Fig. 2 - Typical Stored Charge vs. dif/dt 6 25--9
AUIRFR8E Fig 2. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 2V tp D.U.T I AS. + - V DD A I AS Fig 2a. Unclamped Inductive Test Circuit Fig 2b. Unclamped Inductive Waveforms Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms Vds Id Vgs Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform 7 25--9
AUIRFR8E D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number IR Logo AUFR8E YWWA XX XX Date Code Y= Year WW= Work Week Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 25--9
AUIRFR8E D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA-48. 6 mm Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 25--9
AUIRFR8E Qualification Information Automotive (per AEC-Q) Qualification Level Comments: This part number(s) passed Automotive qualification. Infineon s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Moisture Sensitivity Level D-Pak MSL Machine Model Class M4 (+/- 6V) AEC-Q-2 ESD Human Body Model Class HC (+/- 5V) AEC-Q- Charged Device Model Class C4 (+/- V) AEC-Q-5 RoHS Compliant Yes Highest passing voltage. Revision History Date Comments Updated datasheet with corporate template Corrected ordering table on page. /9/25 Corrected typo on test condition Coss eff. V DS from 6V to 48V on page 2. Updated typo on the fig.9 and fig.2, unit of y-axis from "A" to "nc" on page 6. Published by Infineon Technologies AG 8726 München, Germany Infineon Technologies AG 25 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 25--9