Features. Symbol JEDEC TO-204AA GATE (PIN 1)

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Transcription:

Semiconductor BUZB Data Sheet October 998 File Number 9. [ /Title (BUZ B) /Subject A, V,. hm, N- hannel ower OS- ET) /Author ) /Keyords Harris emionducor, N- hannel ower OS- ET, O- AA) /Creator ) /DOCIN O pdfark /Pageode /UseOutines /DOC- IEW A, V,. Ohm, N-Channel Power MOSFET This is an N-Channel enhancement mode silicon gate power field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. Formerly developmental type TA7. Ordering Information PART NUMBER PACKAGE BRAND BUZB TO-AA BUZB NOTE: When ordering, use the entire part number. Packaging DRAIN (FLANGE) JEDEC TO-AA GATE (PIN ) Features A, V r DS(ON) =.Ω SOA is Power Dissipation Limited Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance Majority Carrier Device Symbol SOURCE (PIN ) G D S CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. -8--HARRIS Copyright Harris Corporation 998

Absolute Maximum Ratings T C = o C, Unless Otherwise Specified BUZB UNITS Drain to Source Breakdown Voltage (Note ).................................... V Drain to Gate Voltage (R GS = kω) (Note ).................................. V DGR V Continuous Drain Current (T C = o C).......................................... I D A Pulsed Drain Current (Note )................................................ I DM A Gate to Source Voltage..................................................... ± V Maximum Power Dissipation.................................................. P D W Linear Derating Factor.......................................................... W/ o C Operating and Storage Temperature....................................... T J, T STG - to o C DIN Humidity Category - DIN.............................................. E IEC Climatic Category - DIN IEC 68-............................................. //6 Maximum Temperature for Soldering Leads at.6in (.6mm) from Case for s.................................... T L 6 o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation ofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. T J = o C to o C. BUZB Electrical Specifications T C = o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BS I D = µa, = V - - V Gate to Threshold Voltage (TH) =, I D = ma (Figure 9). V Zero Gate Voltage Drain Current I DSS T J = o C, = V, = V - µa T J = o C, = V, = V - µa Gate to Source Leakage Current I GSS = V, = V - na Drain to Source On Resistance (Note ) r DS(ON) I D = A, = V (Figure 8) -.9. Ω Forward Transconductance (Note ) g fs = V, I D = A (Figure ).7 - S Turn-On Delay Time t d(on) V CC = V, I D.9A, = V, - 7 ns Rise Time t r R GS = Ω, R L = Ω. (Figures, ) - 8 ns Turn-Off Delay Time t d(off) - ns Fall Time t f - ns Input Capacitance C ISS = V, = V, f = MHz - 8 9 pf Output Capacitance C OSS (Figure ) - pf Reverse Transfer Capacitance C RSS - 7 pf Thermal Resistance Junction to Case R θjc o C/W Thermal Resistance Junction to Ambient R θja o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Continuous Source to Drain Current I SD T C = o C - - A Pulsed Source to Drain Current I SDM - - A Source to Drain Diode Voltage V SD T J = o C, I SD = A, = V -..7 V Reverse Recovery Time t rr T J = o C, I SD = A, di SD /dt = A/µs, - - ns Reverse Recovery Charge Q RR V R = V - - µc NOTES:. Pulse Test: Pulse width µs, duty cycle %.. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure ).

BUZB Typical Performance Curves Unless Otherwise Specified. V POWER DISSIPATION MULTIPLIER..8.6.. 8 6 7 T C, CASE TEMPERATURE ( o C) T C, CASE TEMPERATURE ( o C) FIGURE. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE Z θjc, NORMALIZED TRANSIENT THERMAL IMPEDANCE.. D =...... - - - - - t, RECTANGULAR PULSE DURATION (s) P DM NOTES: t DUTY FACTOR: D = t /t PEAK T J = P DM x Z θjc x R θjc + T C t FIGURE. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE.8µs µs µs OPERATION IN THIS AREA MAY BE LIMITED ms BY r DS(ON) ms ms T J = MAX RATED DC - T C = o C, DRAIN TO SOURCE VOLTAGE (V) P D = W V V 8.V 7.V PULSE DURATION = 8µs T J = o C = 7.V = 6.V = 6.V =.V =.V =.V =.V, DRAIN TO SOURCE VOLTAGE (V) FIGURE. FORWARD BIAS SAFE OPERATING AREA FIGURE. OUTPUT CHARACTERISTICS

BUZB Typical Performance Curves Unless Otherwise Specified (Continued) I DS(ON), DRAIN TO SOURCE CURRENT (A) PULSE DURATION = 8µs = V T J = o C, GATE TO SOURCE VOLTAGE (V) r DS(ON), ON-STATE RESISTANCE (Ω).... PULSE DURATION = 8µs = V.V 6V 6.V 7V 7.V 8V 9V V V FIGURE 6. TRANSFER CHARACTERISTICS FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT r DS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω).6..8. I D = A = V PULSE DURATION = 8µs - T J, JUNCTION TEMPERATURE ( o C) (TH), GATE THRESHOLD VOLTAGE (V) =, I D = ma - T J, JUNCTION TEMPERATURE ( o C) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE C, CAPACITANCE (nf) C ISS C OSS - C RSS =, f = MHz C ISS = C GS + C GD C RSS = C GD C OSS = C DS + C GS -, DRAIN TO SOURCE VOLTAGE (V) g fs, TRANSCONDUCTANCE (S) 7 6 PULSE DURATION = 8µs = V T J = o C FIGURE. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE. TRANSCONDUCTANCE vs DRAIN CURRENT

BUZB Typical Performance Curves Unless Otherwise Specified (Continued) I SD, SOURCE TO DRAIN CURRENT (A) - PULSE DURATION = 8µs T J = o C T J = o C.... V SD, SOURCE TO DRAIN VOLTAGE (V), GATE TO SOURCE VOLTAGE (V) I D =.A = V = V 6 8 Q g(tot), TOTAL GATE CHARGE (nc) FIGURE. SOURCE TO DRAIN DIODE VOLTAGE FIGURE. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms t ON t d(on) t OFF t d(off) R L t r t f 9% 9% + R G V DD - % % DUT 9% % % PULSE WIDTH % FIGURE. SWITCHING TIME TEST CIRCUIT FIGURE. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR (ISOLATED SUPPLY) V DD V BATTERY.µF kω.µf SAME TYPE AS DUT Q gs Q gd Q g(tot) D G DUT I g(ref) I G CURRENT SAMPLING RESISTOR S I D CURRENT SAMPLING RESISTOR I g(ref) FIGURE 6. GATE CHARGE TEST CIRCUIT FIGURE 7. GATE CHARGE WAVEFORMS