I D, Drain Current (A) StrongIRFET Application Brushed Motor drive applications BLDC Motor drive applications Battery powered circuits Half-bridge and full-bridge topologies Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters DC/AC Inverters G D S HEXFET Power MOSFET V DSS R DS(on) typ. max I D (Silicon Limited) I D (Package Limited) 60V.65m 2.00m 28A 95A Benefits Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability Lead-Free, RoHS Compliant G D S TO-247 G D S Gate Drain Source Base part number Package Type Standard Pack Orderable Part Number Form Quantity TO-247 Tube 25 R DS(on), Drain-to -Source On Resistance (m ) 7 I D = A 300 6 250 Limited by package 5 200 4 50 3 2 50 2 4 6 8 2 4 6 8 20 0 25 50 75 25 50 75 V GS, Gate -to -Source Voltage (V) T C, Case Temperature ( C) Fig. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
Absolute Maximum Rating Symbol Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V (Silicon Limited) 28 I D @ T C = C Continuous Drain Current, V GS @ V (Silicon Limited) 99 I D @ T C = 25 C Continuous Drain Current, V GS @ V (Wire Bond Limited) 95 I DM Pulsed Drain Current 760 P D @T C = 25 C Maximum Power Dissipation 34 W Linear Derating Factor 2.3 W/ C V GS Gate-to-Source Voltage ± 20 V T J Operating Junction and -55 to + 75 T STG Storage Temperature Range C Soldering Temperature, for seconds (.6mm from case) 300 Mounting Torque, 6-32 or M3 Screw lbf in (. N m) Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy 557 E AS (Thermally limited) Single Pulse Avalanche Energy 2 mj I AR Avalanche Current A See Fig 5, 6, 23a, 23b E AR Repetitive Avalanche Energy mj Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 0.44 R CS Case-to-Sink, Flat Greased Surface 0.24 C/W R JA Junction-to-Ambient 40 Static @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 60 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 47 mv/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance.65 2.00 V GS = V, I D = A m 2. V GS = 6.0V, I D = 50A V GS(th) Gate Threshold Voltage 2. 3.7 V V DS = V GS, I D = 250µA.0 V DS =60 V, V GS = 0V I DSS Drain-to-Source Leakage Current µa 50 V DS =60V,V GS = 0V,T J =25 C Gate-to-Source Forward Leakage V I GSS na GS = 20V Gate-to-Source Reverse Leakage - V GS = -20V R G Gate Resistance 2. A Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 95A by source bonding technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-40) Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting, L = µh, R G = 50, I AS = A, V GS =V. I SD A, di/dt 338A/µs, V DD V (BR)DSS, T J 75 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. R is measured at T J approximately 90 C. Limited by T Jmax, starting, L = mh, R G = 50, I AS = 47A, V GS =V. 2 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
Dynamic Electrical Characteristics @ (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 242 S V DS = V, I D =A Q g Total Gate Charge 274 4 I D = A Q gs Gate-to-Source Charge 64 V DS = 30V nc Q gd Gate-to-Drain Charge 83 V GS = V Q sync Total Gate Charge Sync. (Qg Qgd) 9 t d(on) Turn-On Delay Time 52 V DD = 30V t r Rise Time 4 I D = A ns t d(off) Turn-Off Delay Time 72 R G = 2.7 t f Fall Time 4 V GS = V C iss Input Capacitance 3703 V GS = 0V C oss Output Capacitance 266 V DS = 25V C rss Reverse Transfer Capacitance 806 ƒ =.0MHz, See Fig.7 pf Effective Output Capacitance C oss eff.(er) 267 V (Energy Related) GS = 0V, VDS = 0V to 48V C oss eff.(tr) Output Capacitance (Time Related) 630 V GS = 0V, VDS = 0V to 48V Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol D I S 28 (Body Diode) showing the A G Pulsed Source Current integral reverse I SM 760 S (Body Diode) p-n junction diode. V SD Diode Forward Voltage.2 V,I S = A,V GS = 0V dv/dt Peak Diode Recovery dv/dt 8. V/ns T J = 75 C,I S =A,V DS = 60V t rr Reverse Recovery Time 5 V DD = 5V ns 54 I F = A, Q rr Reverse Recovery Charge 86 di/dt = A/µs nc 2 I RRM Reverse Recovery Current 2.9 A 3 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 60µs PULSE WIDTH Tj = 25 C 0. V DS, Drain-to-Source Voltage (V) Fig 3. Typical Output Characteristics 60µs PULSE WIDTH Tj = 75 C 0. V DS, Drain-to-Source Voltage (V) Fig 4. Typical Output Characteristics 0 2.4 R DS(on), Drain-to-Source On Resistance 2.0 I D = A V GS = V T J = 75 C.6.2 0. V DS = 25V 60µs PULSE WIDTH 2 3 4 5 6 7 V GS, Gate-to-Source Voltage (V) 0.8 0.4-60 -20 20 60 40 80 T J, Junction Temperature ( C) Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature 0000 000 V GS = 0V, f = MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 4.0 2.0.0 I D = A V DS = 48V V DS = 30V VDS= 2V 00 C iss 8.0 6.0 0 C oss C rss 4.0 2.0 0. V DS, Drain-to-Source Voltage (V) Fig 7. Typical Capacitance vs. Drain-to-Source Voltage 0 50 50 200 250 300 350 4 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204 0.0 Q G, Total Gate Charge (nc) Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
V (BR)DSS, Energy (µj) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) 0 0 T J = 75 C µsec Limited by Package OPERATION IN THIS AREA LIMITED BY R DS (on) msec V GS = 0V 0. 0. 0.4 0.7.0.3.6.9 V SD, Source-to-Drain Voltage (V) Fig 9. Typical Source-Drain Diode Forward Voltage msec Tc = 25 C DC Tj = 75 C Single Pulse 0. 0. V DS, Drain-toSource Voltage (V) Fig. Maximum Safe Operating Area 80 77 Id =.0mA 2.0.8.6.4 74 7.2.0 0.8 0.6 Drain-to-Source Breakdown Voltage (V) 68 0.4 0.2 65-60 -20 20 60 40 80 T J, Temperature ( C ) 0.0 0 20 30 40 50 60 V DS, Drain-to-Source Voltage (V) Fig. Drain-to-Source Breakdown Voltage Fig 2. Typical C oss Stored Energy R DS (on), Drain-to -Source On Resistance (m ) 9 8 7 6 5 4 3 2 VGS = 5.5V VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = V 0 200 300 400 500 I D, Drain Current (A) Fig 3. Typical On-Resistance vs. Drain Current 5 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
E AR, Avalanche Energy (mj) Avalanche Current (A) Thermal Response ( Z thjc ) C/W 0. 0.0 D = 0.50 0.20 0. 0.05 0.02 0.0 0.00 SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc + Tc 0.000 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) Fig 4. Maximum Effective Transient Thermal Impedance, Junction-to-Case 0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 50 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25 C and Tstart = 50 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 5. Avalanche Current vs. Pulse Width 600 500 400 300 200 TOP Single Pulse BOTTOM.0% Duty Cycle I D = A 0 25 50 75 25 50 75 Starting T J, Junction Temperature ( C) Fig 6. Maximum Avalanche Energy vs. Temperature Notes on Repetitive Avalanche Curves, Figures 5, 6: (For further info, see AN-5 at www.irf.com).avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 5, 6). t av = Average time in avalanche. D = Duty cycle in avalanche = tav f Z thjc (D, t av ) = Transient thermal resistance, see Figures 4) PD (ave) = /2 (.3 BV I av ) = T/ Z thjc I av = 2 T/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 6 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
Q RR (nc) I RRM (A) Q RR (nc) V GS(th), Gate threshold Voltage (V) I RRM (A) 4.5 4.0 3.5 20 5 I F = 60A V R = 5V 3.0 2.5 2.0.5 ID = 250µA ID =.0mA ID =.0A 5.0-75 -50-25 0 25 50 75 25 50 75 T J, Temperature ( C ) 0 0 200 400 600 800 0 di F /dt (A/µs) Fig 7. Threshold Voltage vs. Temperature Fig 8. Typical Recovery Current vs. dif/dt 20 5 I F = A V R = 5V 450 400 350 300 I F = 60A V R = 5V 250 200 5 50 0 0 200 400 600 800 0 di F /dt (A/µs) 50 0 200 400 600 800 0 di F /dt (A/µs) Fig 9. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt 400 350 300 I F = A V R = 5V 250 200 50 50 0 200 400 600 800 0 di F /dt (A/µs) Fig 2. Typical Stored Charge vs. dif/dt 7 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs V (BR)DSS 5V tp V DS L DRIVER R G 20V tp D.U.T I AS 0.0 + - V DD A I AS Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms Vds Id Vgs VDD Vgs(th) Qgs Qgs2 Qgd Qgodr Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform 8 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
TO-247AC Package Outline (Dimensions are shown in millimeters (inches)) TO-247AC Part Marking Information Notes: This part marking information applies to devices produced after 02/26/200 EXAMPLE: THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 200 IN THE ASSEMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFPE30 35H 56 57 PART NUMBER DATE CODE YEAR = 200 WEEK 35 LINE H TO-247AC package is not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204
Qualification Information Qualification Level Industrial (per JEDEC JESD47F) Moisture Sensitivity Level TO-247 N/A RoHS Compliant Yes Qualification standards can be found at International Rectifier s web site: http://www.irf.com/product-info/reliability/ Applicable version of JEDEC standard at the time of product release. Revision History Date /7/204 Comments Updated E AS (L =mh) = 2mJ on page 2 Updated note 9 Limited by T Jmax, starting, L = mh, R G = 50, I AS = 47A, V GS =V. on page 2 IR WORLD HEADQUARTERS: N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ www.irf.com 204 International Rectifier Submit Datasheet Feedback November 7, 204