Research Journal of Applied Sciences, Engineering and Technology 8(19): 057-063, 014 DOI:10.1906/rjaset.8.1198 ISSN: 040-7459; e-issn: 040-7467 014 Maxwell Scientific Publication Corp. Subitted: April 9, 014 Accepted: July 19, 014 Published: Noveber 0, 014 Research Article Novel Design for Reduction of Transforer Size in Dynaic Voltage Restorer R. Priyadarsini and B. Dora Arul Selvi Departent of Electrical and Electronics Engineering, Anna University, Chennai, India Abstract: The ai of the study is to design a Dynaic Voltage Restorer (DVR) with size iniized transforer. Transforer is the back bone and of vital iportance in the power quality conditioners. However its cost is uch higher than the other coponents of power syste due to size of its core and windings. Overall cost can be reduced if we reduce these paraeters. Transforer size is inversely proportional to the frequency of operation and flux density. Hence the reduction in the volue and the weight can be obtained by high frequency operation of the agnetic core. This study proposed a novel design of a power electronic circuit, which converts the low level frequency to high level at the priary of the transforer to iniize its size. At secondary side, a frequency is restored to 50 Hz and achieve the copensation. By using MATLAB SIMULINK based siulation results shows the proposed syste decreases the transforer size with sae power of transforer and capable to control the voltage sag and swell in efficient anner. Keywords: Dynaic voltage restorer, flux density, high frequency transforer INTRODUCTION With the developent of technology, the world is oving towards the concept of Sart Grid in which the size of the equipents gets reduced. The reduction of size give rises to the power quality issues. Sarter equipents have better perforance and higher efficiency but they are also very sensitive to power quality as they require high quality of supply. Electrical power quality states that the wavefors of power distribution bus voltages and currents at rated agnitude and frequency should aintain a sinusoidal wavefor (Acharya and Xu, 007). The Transforer placed at the substation is not the end-point of the power transission but the beginning of power supply in distribution syste. Therefore, it is very necessary to aintain the power quality of substation transforer. The rapid increase of non-linear loads such as electric and electronic equipents greatly hapers the power syste quality at the transforer end by distorting the voltage wave-shape. The ain issues associated with power quality are voltage sag and swell, phase shift, flickering, frequency deviation, transients, haronics in current and voltage and zero sequence current (Zhang et al., 013; JunKai et al., 013; Kaczarek and Nowicz, 010; Lao et al., 013). The distortion in wavefor shape is due to the haronics produced due to extra losses in the transforers which increases the operational cost and heat produced in the power syste resulting in the reduction of their expected lifetie (Kusuwan and Sillapawicharn, 013). The level of haronics in voltage and current wavefor is quantified by the easureent of Total Haronic Distortion (THD) in which the haronic content of a wavefor is copared to its fundaental coponent (Sunil and Loganathan, 01). This present study is intended to design a power electronic circuit to decrease the size of the transforer with sae power of transforer and to show the voltage restoration perforance of the DVR with size iniized transforer with a test syste. The siulation studies have been carried out using MATLAB/SIMULINK. Dynaic voltage restorer: The Dynaic Voltage Restorer (DVR) is a welcoe developent as the device to copensate the voltage quality probles. DVR is a power electronic converter based device, designed to protect critical loads fro the supply-side voltage disturbances (Madhusudan and Raaohan Rao, 01). And it is capable of generating or absorbing real and reactive power at its AC terinals (Fig. 1). The basic principle of a DVR is siple: by inserting a voltage of desired agnitude and frequency, in order to restore the load-side voltage balanced and sinusoidal (Rao et al., 013). When DVR is ipleented in a low voltage level distribution network, transforer-less structure is usually better than the conventional transforer one by eliinating Corresponding Author: R. Priyadarsini, Departent of Electrical and Electronics Engineering, Anna University, Chennai, India This work is licensed under a Creative Coons Attribution 4.0 International License (URL: http://creativecoons.org/licenses/by/4.0/). 057
Fig. 1: General structure of DVR the transforer phase shift, voltage drop, haronics loss, bulky size, expensive cost and the probles of saturation and inrush currents associated with the transforer agnetization phenoenon (Sedaghati et al., 013), but the inverter used in the DVR can have any different topologies, without proper filtering network load get affect severely by ultiple haronics. In this study, iniization of transforer size in DVR, based on the power electronic converter is proposed. Firstly frequency vs. transforer size is analyzed and then the control strategy is described. Finally, siulation results using MATLAB/SIMULINK software will be presented to verify the ability of the proposed DVR in voltage restoration. METHODOLOGY Role of transforer in power quality conditioners: A transforer is an electrical device that transfers energy between two circuits through electroagnetic induction. A transforer ay be used as a safe and efficient voltage converter to change the AC voltage at its input to a higher or lower voltage at its output. Other uses include current conversion, isolation with or without changing voltage and ipedance conversion. Transforers are used to step up, step down or inject the volt to load or for isolation purpose. In power quality conditioners transforers are used for isolation and voltage injection purpose: EMF per turn E t = 4.44 fφ (1) B A i = The flux density = The net area of cross section of core: A φ i = (4) B KVA (Power) rating of transforer: 3 Q =. fb Aik w Awδ X 10 (5) Equation (5) shows if the frequency increases the power rating of transforer also increases. Window area of transforer: A w =. fb Q A k δx 10 i w 3 (6) Based on the above Eq. (6) the supply frequency contribute the ain core and window diensions. Current rating of priary side: The injection transforer is connected in series with the sensitive load which is to be protected by the DVR. Thus the current rating of the injection transforer is priarily deterined by the rated capacity of the sensitive load. However, when sizing the current-carrying capability of the injection transforer, the effects of the high-order haronics on the transforer should be included. E t φ = 4.44 f B where, φ A () = (3) i 058 Turns-ratio selection and short circuit ipedance consideration: The selection of the transforer secondary voltage and current ratings and its turns-ratio are interrelated. Starting with a given turns-ratio and as the transforer priary ratings are known, the secondary Voltage and Current ratings can be deterined. The Current-carrying capability and the
Fig. : Proposed DVR blocking voltage of the switching devices can then be readily deterined. The short-circuit ipedance will affect the fault current through the transforer. This ipedance will also affect the design of the filtering syste. However, as the power syste is usually operating under noral conditions, the priary concern when considering the specification of the short-circuit ipedance of the transforer is the voltage drop across it during the noral operations of the power syste. When the inverter-side filtering schee as shown in Fig. is used, the effect of the filtering syste on the voltage drop ust be considered. Proposed dynaic voltage restorer: The Figure shows the Proposed Voltage Restorer. The iportant odification of conventional DVR to proposed DVR is the introduction of bi directional inversion and rectifications stage which allows the current bidirectional. Instead of 50 Hz injection transforer 100 Hz transforer is introduced in the proposed DVR so the size is reduced without affecting the power rating of transforer. Traditional control syste is used to detect the voltage sag and swell s and fixed dc voltage is given to the DVR inverter which is used to inject the additional copensation voltage. During the noral voltage tie the inversion/ rectification ode block act as a rectification ode and the thyristors conduct at 0 firing angle. Due to this the output voltage of inversion/rectification odule produces 100 Hz voltage. This voltage is fed to the proposed transforer and its noral operating frequency is 100 Hz. Without any fluctuation in the source side the control syste produces the signal which akes no conduction of inverter so there is no injection voltage fed to 100 Hz transforer. So the output voltage is sae as the input voltage. During the voltage swell and voltage sag the inversion/rectification odule act as inversion ode and control syste produces 100 Hz injection voltage that is fed to input side of transforer. During the voltage swell this injection voltage opposes the input voltage and copensated voltage is fed to the load and during the voltage sag this injection voltage associate/adds to the input voltage and copensated voltage fed to the load. A passive filter is placed in front of inverter which is used to reove the switching haronics. The ipedance of the appliance is usually not low enough when copared to the filter inductor ipedance for switching frequencies in practice. Therefore, an additional-c filter has to be placed across the DVR s terinals. An increase in switching frequency causes losses that are peranently presented during the operation of the DVR. A very high filter inductance liits the dynaic characteristic of the DVR and increases the inial stored energy in the capacitor (the creation of reactive power eliinates the inductor influence). The resistor causes additional losses, but during the noral Fig. 3: Control syste of proposed DVR 059
Fig. 4: Single line diagra of proposed DVR ipleentation voltage in the grid alost zero voltage appears across the DVR s terinals. Therefore, the losses in the filter increase only during charging of the super capacitor and during voltage dips. The optial choice aong these contradictions is very difficult in practice. Theoretical background for filter design can be found (Wang et al., 006) (Fig. 3). CONTROL SYSTEM DESIGN The three-phase supply voltage is connected to a transforation block that converts to rotating frae (d q) with using Phase-Lock Loop (PLL). Three-phase voltage is transfored by using Park transfor, fro a- b-c to o-d-q frae: Table 1: Case study paraeters Short circuit power.500 KVA Equivalent inductance 157 µh Equivalent resistance 0.007 pu Syste frequency 50 Hz Filter unit Filter inductance 369.500 µfh Filter capacitance 55.980 µf Sensitive load Supply voltage 00 V Capacity kva Let K = fb (11) K Kh KB= KhK (1) f vd va = vq p vb v v 0 c (7) cos( θ) p= sin( θ ) 1 t π cos( θ ) 3 π sin( θ ) 3 1 cos( θ sin( θ 1 4π ) 3 4π ) 3 (8) θ = θ 0 ωtdt (9) 0 The detection block detects the voltage sag/swell. If voltage sag/swell occurs, this block generates the reference load voltage. The sag detection strategy is based on Root Means Square (RMS) of the error vector. Closed loop load voltage feedback is added and is ipleented in the frae in order to iniize any steady state error in the fundaental coponent. The injection voltage is also generated according to the difference between the reference load voltage and the supply voltage and is applied to the VSC to produce the preferred voltage. Effects of various losses with respect to frequency: Hysteresis losses = K n fb (10) 060 K = K h K (13) f Hence the hysteresis loss will decrease with increase in frequency. The total iron loss decreases when the frequency is increased. Eddy current losses reain constant even though the frequency is changed (Fig. 4). Test syste: Based on the above table values it concludes that in the 100 Hz transforer the size gets reduced ore when copared to 50 Hz transforer. RESULTS AND DISCUSSION Siulation results for voltage sags: In this section representative siulation results are included to illustrate the perforance of the test syste described in this study. The siulation studies have been carried out using MATLAB/SIMULINK. Figure 5 illustrates the voltage restoration perforance of the DVR with size iniized transforer. The configuration of the studied syste is as shown in Table 1 and. Voltage sag occurs at 0.1 to 0.5 sec shown in Fig. 5a. Observe that the proposed DVR quickly injects the necessary voltage coponents to aintain the load voltage. The DVR injected voltage and the load voltage are shown in Fig. 5b to d, respectively.
Table : 50 and 100 Hz transforer injection transforer 50 Hz transforer 100 Hz transforer ϕ = 6.576 wb ϕ = 4.65 wb Net core area A i = 5.978 10-3 Net core area A i = 4.3 10-3 Gross-core area A gi = 6.64 10-3 Gross-core area A gi = 4.697 10-3 Width of core = 0.0576 Width of core = 0.0485 Depth of core = 0.149 Depth of core = 0.16 AT = 1370 Ap/turn AT = 969 Ap/turn Window area = 4151.59 Window area = 933.59 Width of window = 40.75 Width of window = 34.6 Height of window = 101.875 Height of window = 86.65 Priary turns 7536 Priary turns 5330 Secondary turns 137 Secondary turns 137 Fig. 5: (a) to (d) perforance of DVR with size reduced transforer under voltage sag condition Fig. 6: (a) to (d) perforance of DVR with size reduced transforer under copensating condition with RMS voltage Figure 6 presents the results of siulation with RMS voltage indications. It is observed that the Fig. 6a voltage sag occur 0.1 to 0.5 sec and it shows Fig. 6b clearly shows the RMS value decreases. It can observed that during the fault the voltage at the PCC drops down to 0% of its noinal value. Figure 6c shows the copensated voltage and its corresponding RMS voltage is shown in Fig. 6d. In Fig. 7a shows the voltage sag occurrence. The voltage sag starts at 1 sec and it is kept until 5 sec. Figure 7b shows the corresponding Total Haronic Distortion (THD), it can be observed during the transition of copensating tie the switching haronics present and its level is 8% and at 5 sec also soe haronics present. Figure 7c and d show the su of supply voltage and DVR injected voltage 061
Fig. 7: (a) to (d) perforance of DVR with size reduced transforer under copensating condition with THD Fig. 8: (a) to (d) perforance of DVR with size reduced transforer under voltage swell condition with RMS voltage (copensated load voltage), respectively. As a result of DVR, the load voltage is kept alost constant at 1 pu throughout siulation. Siulation results with voltage swell copensation: The perforance of DVR for a voltage swell condition was investigated. It can be seen fro the results, the load voltage was kept at the noinal. Figure 8 present the results of siulation for the test syste when voltage swells occur, suddenly at 1 sec and close at 5 sec as shown in Fig. 8a. Figure 8b shows the corresponding RMS voltage (Fig. 8c). The Proposed DVR with size Reduced transforer regulate the voltage effectively as shown in Fig. 8d. CONCLUSION In this study, a novel DVR with reduced size transforer was proposed. As a result the Proposed DVR is a feasible device to copensate voltage sags and swells in power systes. Operating principles and the power circuit of the Proposed DVR was explained. Based on the siulations carried out, it is clear that a 06 DVR can tackle voltage sags and swells when protecting sensitive loads. The novel DVR uses power electronic controlled transforers. So the size is reduced due to high frequency (100 Hz) operation and to inject high frequency voltage in to priary side and restore 50 Hz to the secondary side of transforer. Due to iniization of size of transforer this novel DVR is the cheapest solutions. Finally, siulation results and test data s proved that the novel DVR abilities in copensating voltage sags and swells with iniized transforer size. REFERENCES Acharya, J. and W. Xu, 007. Characteristics of voltage swell in ultigrounded systes. IEEE T. Power Deliv., (): 159-160. JunKai, H., W. JiYang, W. Gang and L. Haifeng, 013. Study on zero-sequence current distribution characteristics in low resistance grounding ode. Proceeding of International Conference on Advanced Power Syste Autoation and Protection (APAP), : 1039-1043.
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