NXP PN544 NFC Controller Full Analog Circuit Analysis 3685 Richmond Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: 613-829-0414 www.chipworks.com
Some of the information in this report may be covered by patents, mask and/or copyright protection. This report should not be taken as an inducement to infringe on these rights. 2011 Chipworks Inc. This report is provided exclusively for the use of the purchasing organization. It can be freely copied and distributed within the purchasing organization, conditional upon the accompanying Chipworks accreditation remaining attached. Distribution of the entire report outside of the purchasing organization is strictly forbidden. The use of portions of the document for the support of the purchasing organization's corporate interest (e.g., licensing or marketing activities) is permitted, as defined by the fair use provisions of the copyright act. Accreditation to Chipworks must be attached to any portion of the reproduced information. CAR-1101-902 20082DYJC Revision 1.0 February 4, 2011
Overview Introduction Brief Design Overview Component Descriptions Device Summary List of Figures To view, please click on the appropriate bookmark in the panel on the left. 0.1.1 Package Photographs 0.1.2 Package X-Ray 0.1.3 Die Markings 0.2.1 Die Photograph 0.2.2 Die Photograph Metal 1 Layer 0.2.3 Annotated Die Photograph Metal 1 Layer 0.2.4 Die Architecture List of Schematics 1.0.0 Top Level Diagram 2.0.0 RX Input 2.1.0 VMID Generator 2.1.1 Programmable Voltage 3.0.0 RX PMU 3.1.0 RF Receiver 3.1.1 HP Filter 3.1.2 RF Amplifier 3.1.2.1 Degeneration R 3.1.3 Programmable R 3.1.4 Bias Voltages 3.1.5 Unused Caps 3.1.6 RF Amp 1 3.1.6.1 Amplifier 1 3.1.6.2 Degeneration R 3.1.7 Active Loading 3.1.7.1 Bias Circuit 3.1.7.1.1 Bias Voltages 3.1.8 TRIGATE
3.1.9 RF Amp 2 3.1.91A Active Loading 3.1.92A Amplifier 2 3.1.9.1 Active Loading 2 3.2.0 Decoder 1 3.3.0 Decoder 3 3.4.0 Reference Generator 3.4.1 Amplifier 3.4.2 Reference Currents 3.4.3 Bias Voltages 3.5.0 Test Switches 3.6.0 Decoder 2 3.6.1 Decoder 2A 3.6.1.1 Clock Buffers 3.6.1.1.1 Inverter 3.6.2 Clock Buffer 3.6.2.1 Delay Buffer 3.6.3 Decoder 2B 3.10A RF Receiver 3.19A RF Amp 2 3.14.0 Latching Element 4.0.0 Data RX 4.1.0 Signal Chopping 1 4.1.1 Switch 1 4.2.0 Reference Generator 4.3.0 Signal Chopping 2 4.3.1 Switch 2 4.3.1.1 Inverter 4.3.1.2 JC_INV2 4.3.1.3 JC_INV3 4.3.1.4 JC_INV4 4.3.1.5 JC_INV5 4.3.1.6 JC_INV6 4.3.1.7 JC_INV7 4.3.2 Switch 3 4.4.0 Signal Chopping 3 4.5.0 Comparator 1 4.6.0 Comparator 2 4.7.0 Signal Processing 1
4.8.0 Signal Processing 2 4.9.0 Input Data Detector 4.9.1 Comparator 4.9.2 Reference Generator 4.10.0 Voltage Clamp 5.0.0 Clock Recovery 5.1.0 Comparator 5.2.0 DLL 5.2.1 VI Converter 5.2.2 CHRG LFP 5.2.3 Delay Circuit 5.2.4 Clock Processing 5.2.5 Frequency Comparator 5.2.5.1 BJ1BUF1 5.2.5.2 3F2F Comparator 6.0.0 A/D Converter 6.1.0 ADC 1 6.1.1 Comparator 1 6.1.2 Sub-ADC 1 6.1.2.1 ADC Circuit 6.1.2.1.1 Comparator 6.1.3 Sub-ADC 2 6.1.4 Reference Voltages 6.1.4.1 Resistor String 6.1.4.2 Voltage Buffer 6.1.4.3 Switches 1 6.1.4.4 Switches 1A 6.1.4.5 Decoder 1 6.1.4.6 Decoder 1A 6.2.0 ADC 2 6.2.1 Sub-ADC 2 6.2.2 Reference Voltages 6.2.2.1 Resistor String 6.2.2.2 Switches 1 6.2.2.3 Switches 1A 6.2.2.4 Decoder 1 6.2.2.5 Decoder 1A 6.3.0 Data Processing
6.3.1 Clock Circuit 1 6.3.1 Level Shifter 1 6.3.1.1 Delay 1 6.3.2 Encoder 1 6.3.3 Encoder 2 6.3.4 Data Output 6.3.4.1 Output Buffers 1 6.3.4.2 Output Buffers 2 7.0.0 Signal Detector 7.1.0 Input Buffer 7.2.0 Comparator 7.3.0 Bias Voltage 7.4.0 Reference Voltage 8.0.0 Signal Buffers 8.1.0 Buffer Circuits 1 8.1.1 Signal Monitor 8.1.2 Delay Gates 8.1.3 Data Buffers 1 8.1.4 Clock Select 8.1.5 Analog Switches 8.1.5.1 Switches 4 8.1.5.2 Switches 1 8.1.5.3 Switches 3 8.1.5.4 Switches 2 8.1.6 Test Switches 8.1.6.1 DAC Test Switches 8.1.6.2 Decoder 8.1.7 Data Buffers 8.1.8 Data Buffers 3 8.2.0 Buffer Circuits 2 8.2.1 Switches 1 8.2.2 Data Buffers 4 8.2.3 Data Buffers 1 8.2.4 Data Buffers 2 8.2.5 Data Buffers 3 8.2.6 Switches 2 8.3.0 Buffer Circuit 3
9.0.0 Reference and Calibration 9.1.0 Reference Currents 9.2.0 Programmable Voltage Comparator 9.2.1 Comparator 9.3.0 Bandgap Reference Generator 1 9.3.1 Bias Generator 9.3.2 Current Reference Generator 9.3.3 Programmable Bias Generator 9.3.4 Cascode Amplifier 9.3.5 Analog Delay Circuitry 9.3.6 Bandgap Reference Generator 2 9.3.6.1 Comparator 1 9.3.6.2 Comparator 2 9.3.6.3 Bandgap Reference Generator 3 9.3.6.3.1 OPAMP1 9.3.6.3.2 COMPARATOR 9.3.6.3.3 Voltage Reference Generator 9.4.0 Calibration Circuit 9.4.1 Clock Control 1 9.4.2 Switch Circuit 1 9.4.3 Comparator 1 9.4.4 Multiple Comparator 2 9.4.5 Voltage Reference 1 9.4.6 Reference Circuit 9.4.7 Control Circuit 1 9.4.8 Switch Circuit 2 9.4.9 Control Circuit 2 9.4.10 Bias Generator 10.0.0 Aux Drives x4 10.1.0 Aux Drive 10.1.1 Driving Circuit 10.1.1.1 Digital Output 10.1.1.1.1 Inverting Gate 10.1.1.1.2 Driving B 10.1.1.1.2.1 Trigate 10.1.1.1.3 Driving T 10.1.1.1.3.1 Trigate 10.1.1.1.3.2 NAND Gate 10.1.1.1.4 Output Control
10.1.1.2 Pin Bias 10.1.1.2.1 Enable Circuit 10.1.1.3 Level Shifter 10.1.1.4 VS Generator 10.1.1.5 ENN Circuit 10.1.1.5.1 V1G_INV_25_10_L35 10.1.1.6 Control Logic 10.1.1.6.1 Inverter 10.1.1.6.2 Input Logic 1 10.1.1.6.3 Input Logic 2 10.1.1.6.4 Delay Gate 10.1.1.6.4.1 V1G_INVD1 10.1.2 Output Select 10.1.2.1 V2G_TRINOT_50M3_32M2 10.1.2.2 Decoder 10.1.3 Analog Path 10.1.3.1 Amplifier 1 10.1.3.2 Amplifier 2 10.1.3.3 Bias Voltages 11.0.0 DA Converter 11.10A DAC Circuit 11.13A Data Buffers 1 11.14A Data Buffers 2A 11.1.0 DAC Circuit 11.1.1 Data Buffers 1 11.1.2 Data Buffers 2 11.1.3 Reference Generator 11.1.3.1 NMOS X15 11.1.4 Steering Array 11.1.4.1 Steering 2X 11.1.4.2 Steering 1X 12.0.0 LDO Regulators 12.1.0 Buffer Amplifier 12.2.0 Voltage Buffer 12.3.0 TX LDO Regulator 12.4.0 UICC LDO Regulator 12.4.1 Comparator 12.5.0 RX and DPLL LDO Regulator
12.5.1 RX LDO Controller 1 12.5.1.1 Level Shifter 1 12.5.1.2 Level Shifter 2 12.5.1.3 Level Shifter 3 12.5.1.4 Level Shifter 4 12.5.1.5 Reference Generator 12.5.1.6 Reference Generator 12.5.1.7 Current Voltage Detector 12.5.2 RX LDO Controller 2 12.5.2.1 Current Control (Pull-Up) 12.5.2.2 Level Shifter 4 12.5.2.3 Amplifier 1 12.5.2.4 Level Shifter 2 12.5.2.5 Level Shifter 3 12.5.2.6 Buffer Amplifier 12.5.2.7 Level Shifter 5 12.5.2.8 Level Shifter 6 12.5.2.9 Level Shifter 1 12.5.2.10 Level Shifter 7 12.6.0 Level Shifter 12.7.0 Level Detector 12.7.1 Level Shifter 1 12.7.2 Comparator 12.8.0 Programmable Reference Generator 12.8.1 Level Shifter 1 12.8.2 Level Shifter 2 12.8.3 Voltage Bias Generator 12.8.4 Reference Generator and Enable Controller 12.9.0 ESD 2 12.10.0 Switch Circuit 1 12.11.0 Switch Circuit 2 12.13.0 ESD 1 12.14.0 ESD 4 13.0.0 Ring Oscillator 13.1.0 Delay Circuit 1 13.2.0 Delay Circuit 2 14.0.0 Single Wire Protocol I/O Interface 14.1.0 Level Shifter 1
14.2.0 Schmitt Trigger 1 14.3.0 Schmitt Trigger 2 14.4.0 Level Shifter 4 14.5.0 Level Shifter 5 14.6.0 Clocked Inverter 1 14.7.0 Clocked Inverter 2 14.8.0 AND2 14.9.0 Clocked OR2 14.10.0 SWP Comparator 14.11.0 SWP Reference Generator 14.11.1 OR2 14.12.0 Level Shifter 11 15.0.0 Transmitter Block and Power by Field Block 15.1.0 Power by Field Block 15.1.1 PF Buffer Amplifier 15.2.0 Transmitter Block 15.2.1 Current Control Cell 13 15.2.2 Current Control Cell 11 15.2.3 Current Control Cell 12 15.2.4 Current Controllers 15.2.4.1 Current Control Cell 1 15.2.4.2 Current Control Cell 2 15.2.4.3 Current Control Cell 3 15.2.4.4 Current Control Cell 4 15.2.4.5 Current Control Cell 5 15.2.4.6 Current Control Cell 6 15.2.4.7 Current Control Cell 7 15.2.4.8 Current Control Cell 8 15.2.4.9 Current Control Cell 9 15.2.4.10 Current Control Cell 10 15.2.5 TX Driver 15.2.5.1 TX Driver 15.2.5.2 JC_JG_OUTDRV2 15.2.5.3 JC_JG_OUTDRV3 15.2.5.4 JC_JG_OUTDRV4 15.2.5.5 JC_JG_OUTDRV5 15.2.5.6 JC_JG_OUTDRV6 15.2.5.7 JC_JG_OUTDRVP1 15.2.5.8 JC_JG_OUTDRVP2
15.2.5.9 JC_JG_OUTDRVP3 15.2.5.10 JC_JG_OUTDRVP4 15.2.6 TX Buffer 15.2.7 TX Reference 15.3.0 TXGND ESD 16.0.0 Power by Field Controller 17.0.0 PF Clock Controller 18.0.0 NFC-WI AFE and Other Analog Circuitry 18.1.0 NFC Wired Interface AFE 18.1.1 NFC-WI Signal Input Driver 18.1.1.1 Schmitt Trigger 3 18.1.1.2 ESD Protection 1 18.1.1.3 Level Shifter 2 18.1.1.4 NFC-WI Input Buffer 18.1.2 NFC-WI Transmitter 18.2.0 Comparator 18.3.0 Programmable Reference 18.4.0 Level Detector Comparator 18.5.0 Voltage Reference Generator 18.5.1 Level Shifter 2 18.5.2 Differential Amplifier 1 18.5.3 Differential Amplifier 2 18.6.0 Programmable Reference Generator 18.6.1 JC_JG3_AMP1 18.6.2 JC_JG3_AMP2 18.7.0 Level Shifters 18.8.0 Driver 18.8.1 Output Transistor Driver 18.8.2 Output Transistor Driver 2 18.8.3 Level Shifter 3 18.9.0 Current Reference 18.10.0 Clock Generator 18.10.1 B4OS1 18.10.1.1 B4OS1R1 18.10.2 B4OS2 18.10.2.1 B4OS1R2 18.11.0 ESD Protection
19.0.0 XTAL Driver 19.1.0 XTAL Driver 19.1.1 XTAL Voltage Regulator 20.0.0 Clock Circuit and DPLL 20.1.0 Phase Frequency Detector 20.2.0 Data Clock Selector 20.3.0 Logic Circuit 20.4.0 Clock Driver 20.5.0 JC_PLL_CHRGPUMP 20.5.1 Charge/Discharge 20.5.1.1 Current Cell 20.5.1.2 Current Cell 20.5.1.3 Current Cell 20.5.1.4 Current Cell 20.5.1.5 Current Cell 20.5.1.6 Current Cell 20.5.2 Charge Pump Bias Generator 20.5.3 JC_PLL_OPAMP1 20.5.4 Charge Pump Controller 20.6.0 Voltage Generator 20.6.1 Current Voltage Generator 20.7.0 VCO 20.7.1 Oscillator 20.7.1.1 JC_CELL1 20.8.0 Clock Divider 20.8.1 Clock Buffer 20.8.2 Clock Buffer 20.8.3 Clock Divider 20.8.4 Clock Divider 20.8.5 Clock Divider 20.8.6 Clock Divider 20.8.7 Clock Divider 20.8.8 JC_PLL_DIVCEL6 20.8.9 Clock Divider 20.9.0 Clock Selector 20.10.0 Clock Path 20.11.0 Switch Circuits
21.0.0 Battery Monitor Enable Block 21.1.0 Comparator 21.2.0 Buffer 21.3.0 Battery Monitor Enable 21.3.1 Battery Monitoring Enable Circuit 21.3.1.1 JC_AMP5 21.3.1.2 Comparator 21.3.1.3 Battery Monitoring Enable Circuit 21.3.1.4 ESD 3 21.4.0 DAC 21.5.0 DAC Controller 22.0.0 Other Analog Controllers 22.1.0 Enable Controller 22.1.1 Signal Detector 22.1.2 Level Shifter 22.2.0 Controller 22.2.1 JC_COMPARATOR8 23.0.0 Main Bias Generator 23.1.0 Bias Generator 2 23.2.0 Bias Generator 1 23.3.0 Bias Generator 3 24.0.0 Level Shifters 25.0.0 Other ESD Pads 25.1.0 VDD2 ESD 25.1.0 ESD 1 25.2.0 GND PAD 26.0.0 RX Buffer 1 27.0.0 RX Buffer 2 Cell Library Signal Cross-Reference List About Chipworks
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