S865-64/-8/-56 S866-64-0/-8-0 Photodiode arrays combined with signal processing IC These are Si photodiode arrays combined with a signal processing IC chip. The signal processing IC chip is formed by CMOS process and incorporates a timing generator, shift register, charge amplifier array, clamp circuit and hold circuit, making the external circuit configuration simple. A long, narrow image sensor can also be configured by arranging multiple arrays in a row. For X-ray detection applications, types with phosphor sheet affixed on the photosensitive area are also available. As the dedicated driver circuit, the C98 series (sold separately) is provided (this circuit does not support the S865-56). Features Data rate: MHz max. Element pitch: 5 types available S865-64: 0.8 mm pitch 64 ch S865-8: 0.4 mm pitch 8 ch S865-56: 0. mm pitch 56 ch S866-64-0:.6 mm pitch 64 ch S866-8-0: 0.8 mm pitch 8 ch 5 V power supply operation Simultaneous integration by using a charge amplifier array Sequential readout with a shift register Low dark current due to zero-bias photodiode operation Integrated clamp circuit allows low noise and wide dynamic range Integrated timing generator allows operation at two different pulse timings Types with phosphor sheet affixed on the photosensitive area are available for X-ray detection (S865-64G/-8G/-56G, S866-64G-0/-8G-0) Applications Long and narrow line sensors Line sensors for X-ray detection Structure Parameter Symbol* S865-64 S865-8 S865-56 S866-64-0 S866-8-0 Unit Element pitch P 0.8 0.4 0..6 0.8 mm Element width W 0.7 0.3 0..5 0.7 mm Element height H 0.8 0.6 0.3.6 0.8 mm Number of elements - 64 8 56 64 8 - Effective photosensitive area length - 5. 5. 5. 0.4 0.4 mm Board material - Glass epoxy - *: Refer to following figure. Enlarged drawing of photosensitive area H W P Photodiode KMPDC007EA www.hamamatsu.com
Absolute maximum ratings (Ta=5 C, unless otherwise noted) Parameter Symbol Value Unit Supply voltage -0.3 to +6 V Reference voltage -0.3 to +6 V Photodiode voltage -0.3 to +6 V Gain selection terminal voltage -0.3 to +6 V Master/slave selection voltage Vms -0.3 to +6 V Clock pulse voltage V() -0.3 to +6 V Reset pulse voltage V() -0.3 to +6 V External start pulse voltage V(EXTSP) -0.3 to +6 V Operating temperature* Topr -5 to +60 C Storage temperature* Tstg -0 to +70 C *: No condensation Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings. Recommended terminal voltage (Ta=5 C) Parameter Symbol Min. Typ. Max. Unit Supply voltage 4.75 5 5.5 V Reference voltage 4 4.5 4.6 V Photodiode voltage - - V High gain - 0.5 + 0.5 V Gain selection terminal voltage Low gain 0-0.4 V Master/slave selection voltage High level*3-0.5 + 0.5 V Vms Low level* 4 0-0.4 V Clock pulse voltage High level 3.3 + 0.5 V V() Low level 0-0.4 V Reset pulse voltage High level 3.3 + 0.5 V V() Low level 0-0.4 V External start pulse voltage High level - 0.5 + 0.5 V V(EXTSP) Low level 0-0.4 V *3: Parallel *4: Serial at nd or later stages Electrical characteristics [Ta=5 C, =5 V, V()=V()=5 V] Parameter Symbol Min. Typ. Max. Unit Clock pulse frequency* 5 f() 40-4000 khz S865-64, S866-64-0 - - 4678 Line rate* 6 S865-8, S866-8-0 LR - - 7568 lines/s S865-56 - - 3844 Output impedance Zo - 3 - kω S865-64, S866-64-0-6 - Current consumption S865-8, S866-8-0 I - 30 - ma S865-56 - 60 - High gain - 0.5 - Charge amp feedback capacitance Cf Low gain - - pf *5: Video data rate is /4 of clock pulse frequency f(). *6: The values depend on the clock pulse frequency.
Electrical and optical characteristics [Ta=5 C, =5 V, V()=V()=5 V, =5 V (High gain), 0 V (Low gain)] S865-64/-8/-56 Parameter Symbol S865-64 S865-8 S865-56 Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Spectral response range λ 00 to 000 00 to 000 00 to 000 nm Peak sensitivity wavelength λp - 70 - - 70 - - 70 - nm Dark output voltage* 7 High gain - 0.0 0. - 0.0 0. - 0.0 0. Vd Low gain - 0.005 0. - 0.005 0. - 0.005 0. mv Saturation output voltage Vsat 3.0 3.5-3.0 3.5-3.0 3.5 - V Saturation exposure* 8 High gain - 0.8.0 -.4 3.0-5 9 Esat Low gain -.6.0-4.8 6.0-30 37.5 mlx s Photosensitivity High gain 350 4400-00 500-00 50 - S Low gain 760 00-600 750-00 5 - V/lx s Photoresponse nonuniformity* 9 PRNU - - ±0 - - ±0 - - ±0 % Noise* 0 High gain -.3.0 -.0.5-0.8. N Low gain - 0.7. - 0.6 0.9-0.5 0.75 mv rms Output offset voltage* Vo - - - - - - V S866-64-0/-8-0 Parameter Symbol S866-64-0 S866-8-0 Min. Typ. Max. Min. Typ. Max. Unit Spectral response range λ 00 to 000 00 to 000 nm Peak sensitivity wavelength λp - 70 - - 70 - nm Dark output voltage* 7 High gain - 0.0 0. - 0.0 0. Vd Low gain - 0.005 0. - 0.005 0. mv Saturation output voltage Vsat 3 3.5-3 3.5 - V Saturation exposure* 8 High gain - 0. 0.5-0.8.0 Esat Low gain - 0.4 0.5 -.6.0 mlx s Photosensitivity High gain 4400 8000-350 4400 - S Low gain 700 9000-760 00 - V/lx s Photoresponse nonuniformity* 9 PRNU - - ±0 - - ±0 % Noise* 0 High gain -.0 3.0 -.3.0 N Low gain -..7-0.7. mv rms Output offset voltage* Vo - - - - V *7: Integration time Ts= ms *8: Measured with a 856 K tungsten lamp. *9: Photoresponse nonuniformity (PRNU) is the output nonuniformity that occurs when the photosensitive area is uniformly illuminated by light which is approx. 50% of the saturation level. PRNU is defined as follows: PRNU = X/X 00 [%] X: average output of all elements, X: difference between X and the maximum or minimum output, whichever is larger. *0: Measured with a video data rate of 50 khz and Ts= ms in dark state. *: Video output is negative-going output with respect to the output offset voltage. 3
Output waveform of one element Dark state Saturation output voltage Vsat=3.5 V typ. Output offset voltage =4.5 V typ. Trigger V/div. 0 V/div. V typ. Saturation state 00 ns/div. Spectral response (typical example) 0.5 (Ta=5 C) 0.4 Photosensitivity (A/W) 0.3 0. 0. 0 00 400 600 800 000 00 Wavelength (nm) KMPDB00EA 4
Block diagram S865-64/-8, S866-64-0/-8-0 EXTSP Vms 4 5 6 7 Timing generator 3 Trig Shift register 8 EOS 0 Hold circuit 9 Video Charge amp array 3 4 5 N- N Photodiode array KMPDC053EA S865-56 EXTSP Vms 5, 8 6, 9 7, 0 8,, 5 Timing generator 4, 7 Trig 3, 6 Shift register 9, EOS, 4 Hold circuit 0, 3 Video, 5 Charge amp array, 3 4, 6 3 4 5 55 56 Photodiode array KMPDC0506EA 5
Timing chart 3 6 7 8 9 0 3 4 5 6 7 8 9 30 3 tpw() 8 clocks tpw() 8 clocks Integration time Video output period Video 3 n- n Trig EOS tf() tr() tpw() t t tpw() tpw() KMPD tf() tr() KMPDC089EC Parameter Symbol Min. Typ. Max. Unit Clock pulse width tpw() 50-5000 ns Clock pulse rise/fall times tr(), tf() 0 0 30 ns Reset pulse width tpw() - - Reset pulse width tpw() 0 - - Reset pulse rise/fall times tr(), tf() 0 0 30 ns Clock pulse-reset pulse timing t -0 0 0 ns Clock pulse-reset pulse timing t -0 0 0 ns. The internal timing circuit starts operation at the falling edge of immediately after a pulse goes Low.. When the falling edge of each is counted as clock, the video signal of the st channel appears between 8.5 clocks and 0.5 clocks. Subsequent video signals appear every 4 clocks. 3. The trigger pulse for the st channel rises at a timing of 9.5 clocks and then rises every 4 clocks. The rising edge of each trigger pulse is the recommended timing for data acquisition. 4. Signal charge integration time equals the High period of a pulse. However, the charge integration does not start at the rise of a pulse but starts at the 8th clock after the rise of the pulse and ends at the 8th clock after the fall of the pulse. After the pulse next changes from High to Low, signals integrated within this period are sequentially read out as time-series signals by the shift register operation. The rise and fall of a pulse must be synchronized with the rise of a pulse, but the rise of a pulse must be set outside the video output period. One cycle of pulses cannot be set shorter than the time equal to 6.5 + 4 N (number of elements) clocks. 5. The video signal after an EOS signal output becomes a high impedance state, and the video output will be indefinite. 6
Dimensional outlines (unit: mm, tolerance unless otherwise noted: ±0.) S865-64/-8 5. +0. -0 P.54 = 7.94 ( ) ɸ0.76.7.6 5.0 ± 0. Signal processing IC chip Photosensitive area.0 8.0*.95 5.0.54 5.0 5.6 40.0 Photodiode ch 3.0 ( 4) ɸ..6 Direction of scan * Distance from board bottom to photosensitive area center Board: G0 glass epoxy Connector: PRECI-DIP DURTAL 800-0-0-0-000 KMPDA064EF S865-56 5.-0 +0. 34.0 P.54 = 30.48 ( 6) 0.64 0.64.54.8 40.0 ± 0.5 0.0.54 CMOS CMOS 5 6 7.0 ( 4) ϕ. Photosensitive area 6.9 6.0 6.6 8.0* 40.0 3.0.6 Photodiode ch Signal processing IC chip Direction of scan * Length from board bottom to photosensitive area center Board: G0 glass epoxy Connector: JAE (Japan Aviation Electronics lndustry, Limited) PS-6PE-D4LT-PN KMPDA09ED 7
S866-64-0/-8-0 +0.3 0.4-0.7 P.54 = 7.94 ( ) ɸ0.76.6 5.0 ± 0. Signal processing IC chip.0.95 A* 5.0.54 5.0. 80.0 3.0.6 Photodiode ch Photosensitive area (4 ) ɸ. Direction of scan Type no. A S866-64-0 8. S866-8-0 8.0 * Distance from board bottom to photosensitive area center Board: G0 glass epoxy Connector: PRECI-DIP DURTAL 800-0-0-0-000 KMPDA09EA Pin connections S865-64/-8, S866-64-0/-8-0 Pin no. Symbol Name Note Reset pulse Pulse input Clock pulse Pulse input 3 Trig Trigger pulse Positive-going pulse output 4 EXTSP External start pulse Pulse input 5 Vms Master/slave selection supply voltage Voltage input 6 Supply voltage Voltage input 7 Ground 8 EOS End of scan Negative-going pulse output 9 Video Video output Negative-going output with respect to 0 Reference voltage Voltage input Gain selection terminal voltage Voltage input Photodiode voltage Voltage input S865-56 Pin no. CMOS Pin no. CMOS Name Note 4 Photodiode voltage Voltage input 5 Reset pulse Pulse input 3 6 Clock pulse Pulse input 4 Trig 7 Trig Trigger pulse Positive-going pulse output 5 EXTSP 8 EXTSP External start pulse Pulse input 6 Vms 9 Vms Master/slave selection voltage Voltage input 7 0 Supply voltage Voltage input 8 Ground 9 EOS EOS End of scan Negative-going pulse output 0 Video 3 Video Video output Negative-going output from 4 Reference voltage Voltage input 5 Gain selection voltage Voltage input 3 6 Photodiode voltage Voltage input 8
Gain selection terminal voltage setting : High gain (Cf=0.5 pf) : Low gain (Cf= pf) Setting for each readout method S865-64/-8, S866-64-0/-8-0 Set to A in the table below in most cases. To serially read out signals from two or more sensors linearly connected, set the st sensor to A and the nd or later sensors to B. The and pulses should be shared with each sensor and the video output terminal of each sensor connected together. Connection example (parallel readout) +4.5 V 0 9 Video EOS 8 EOS +5 V 0 µf 0. µf 7 6 5 Vms 4 EXTSP Trig 3 Trig - + Video High impedance amplifier KMPDC088EB Setting Readout method Vms EXTSP A All stages of parallel readout, serial readout at st sensor B Serial readout at nd and later sensors Preceding sensor EOS should be input 9
S865-56 Signals of channels through 6 are output from CMOS, while signals of channels 9 through 56 are output from CMOS. The following two readout methods are available. () Serial readout method CMOS and CMOS are connected in serial and the signals of channels through 56 are sequentially read out from one output line. Set CMOS as in A in the table below, and set CMOS as in B. CMOS and CMOS should be connected to the same and lines, and their video output terminals to one line. () Parallel readout method 8 channel signals are output in parallel respectively from the output lines of CMOS and CMOS. Set both CMOS and CMOS as in A in the table below. Connection examples Serial readout method Parallel readout method CMOS CMOS () () 3 () 3 () 4 Trig () Trig () 4 Trig () 5 EXTSP () 5 EXTSP () 6 Vms () 6 Vms () 7 7 8 8 9 EOS () EOS () 9 EOS () 0 Video () Video () 0 Video () 3 3 CMOS 4 CMOS Trig 5 () 4 6 () 5 () OR Logic IC 74HC3 7 8 Trig () EXTSP () Trig () 6 7 () Trig () 9 Vms () 8 EXTSP () 0 9 Vms () 0 EOS EOS () Video 3 Video () EOS () EOS () 4 Video () 3 Video () 5 4 6 5 KMPDC0EA 6 KMPDC03EB Setting Vms EXTSP A B Preceding sensor EOS should be input 0
Readout circuit Check that pulse signals meet the required pulse conditions before supplying them to the input terminals. Video output should be amplified by an operational amplifier that is connected close to the sensor. Precantions () The signal processing IC chip is protected against static electricity. However, in order to prevent possible damage to the IC chip, take electrostatic countermeasures such as grounding yourself, as well as workbench and tools. Also protect the IC chip from surge voltages from peripheral equipment. () Gold wires for wire bonding are very thin, so they easily break if subjected to mechanical stress. The signal processing IC chip and wire bonding section are covered with resin for protection. However, never touch these portions. Excessive force, if applied, may break the wires or cause malfunction. Blow air to remove dust or debris if it gets on the protective resin. Never wash them with solvent. Signals may not be obtained if dust or debris is left or a scratch is made on the protective resin, or the signal processing IC chip or photodiode array chip is nicked. (3) The photodiode array characteristics may deteriorate when operated at high humidity, so put it in a hermetically sealed enclosure or case. When installing the photodiode array on a board, be careful not to cause the board to warp. Related information www.hamamatsu.com/sp/ssd/doc_en.html Precautions Notice Image sensors/precautions
Driver circuit C98 series (sold separately) The CMOS driver circuit is designed for S865/S866 series photodiode arrays with amplifier. The C98 series operates a photodiode by just inputting two signals (M- and M-) and a signal +5 V supply. The C98 is intended for single use or parallel connections, while the C98-0 is suitable for cascade connections. Features Single power supply (+5 V) operation Operation with two input signals (M- and M-) Compact: 46 56 5. t mm Block diagram S865/ S866 series Trig EOS EXTSP Vms Vg Video Vp CN +Vcc +Vp +Vcc SW - + Controller +Vp VR SW - + +Vcc : TOP : END - + +Vcc - + +Vcc REF +Vcc CN CN3 M- M- TRIGGER L-EOS IN-START GAIN +5 V VIDEO M- M- TRIGGER L-EOS EXTSP GAIN +5 V VIDEO C98-0 only KACCC0643EA
Connection examples Single or parallel readout example (C98) Simultaneous integration/output (effective for high-speed processing) Cascade readout example (C98-0) Simultaneous integration/serial output (Simplifies external processing circuit) S865/ S866 series C98 S865/ S866 series C98-0 CN External controller CN External controller Scan direction CN3 S865/ S866 series C98 CN External controller S865/ S866 series C98-0 CN Accessory cable Scan direction CN3 Scan direction S865/ S866 series C98 CN External controller KACCC0644EA Scan direction S865/ S866 series C98-0 CN CN3 KACCC0645EA Information described in this material is current as of June, 04. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix "(Z)" which means developmental specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 6- Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (8) 53-434-33, Fax: (8) 53-434-584 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, Bridgewater, N.J. 08807, U.S.A., Telephone: () 908-3-0960, Fax: () 908-3-8 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 0, D-8 Herrsching am Ammersee, Germany, Telephone: (49) 85-375-0, Fax: (49) 85-65-8 France: Hamamatsu Photonics France S.A.R.L.: 9, Rue du Saule Trapu, Parc du Moulin de Massy, 988 Massy Cedex, France, Telephone: 33-() 69 53 7 00, Fax: 33-() 69 53 7 0 United Kingdom: Hamamatsu Photonics UK Limited: Howard Court, 0 Tewin Road, Welwyn Garden City, Hertfordshire AL7 BW, United Kingdom, Telephone: (44) 707-94888, Fax: (44) 707-35777 North Europe: Hamamatsu Photonics Norden AB: Torshamnsgatan 35 6440 Kista, Sweden, Telephone: (46) 8-509-03-00, Fax: (46) 8-509-03-0 Italy: Hamamatsu Photonics Italia S.r.l.: Strada della Moia, int. 6, 000 Arese (Milano), Italy, Telephone: (39) 0-9358733, Fax: (39) 0-935874 China: Hamamatsu Photonics (China) Co., Ltd.: B0, Jiaming Center, No.7 Dongsanhuan Beilu, Chaoyang District, Beijing 0000, China, Telephone: (86) 0-6586-6006, Fax: (86) 0-6586-866 Cat. No. KMPD34E03 Jun. 04 DN 3