NLAS5157. Ultra-Low 0.4 SPDT Analog Switch

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Ultra-Low.4 SPDT Analog Switch The NLAS5157 is Single Pole Double Throw (SPDT) switch designed for audio systems in portable applications. The NLAS5157 features Ultra Low R ON of.4 typical at = V and.15 R ON Flatness for + V supply across temperature. This device also has a broad operating range of 1.65 V to 4.5 V, ideal for battery powered devices. The NLAS5157 is protected on all pins with 8 kv Human Body Model ESD protection. This allows the device to be placed in a variety of locations, including near the interface, without risk of damage. Features R ON =.4 Typical @ = V Range: 1.65 V to 4.5 V 8 kv Human Body Model ESD on All Pins These are Pb Free Devices 1 UDFN6 CASE 517AQ A M PIN ASSIGNMENTS MARKING DIAGRAM A = Specific Device Code* (Rotated 9 ) = Date Code M Typical Applications Mobile Phones Portable Devices IN 1 6 NO 2 5 GND 3 4 NC (Top View) Device Package Shipping NLAS5157MUTCG ORDERING INFORMATION UDFN6 (Pb Free) 3 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. Semiconductor Components Industries, LLC, 214 February, 214 Rev. 2 1 Publication Order Number: NLAS5157/D

PIN DESCRIPTION PIN # Name Direction Description 1 IN Control Select Line 2 Power Voltage Supply 3 I/O Common Signal Line 4 NC I/O Normally Closed Signal Line 5 GND Power Ground 6 NO I/O Normally Open Signal Line TRUTH TABLE Control L H Function NC Connected to NO Connected to MAXIMUM RATINGS Symbol Pins Rating Value Condition Positive DC Supply Voltage.5 to +5.5 V V IS NO, NC, or Analog Signal Voltage.5 to +.5 V V IN IN Control Voltage.5 to +5.5 V I IS_CON I IS_PK NO, NC, or NO, NC, or Analog Signal Continuous Current 3 Closed Switch ma Analog Signal Peak Current 5 1% Duty Cycle ma I IN IN Control Current 2 ma T STG Storage Temperature Range 65 to 15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. REMENDED OPERATING CONDITIONS Symbol Pins Parameter Value Condition Positive DC Supply Voltage 1.65 to 4.5 V V IS NO, NC, or Analog Signal Voltage GND to V V IN IN Control Voltage (OVT) Overvoltage Tolerance GND to 4.5 V T A Operating Temperature Range 4 to +85 C t r, t f Rise or Fall Time 2 = 1.6 V 2.7 V ns/v 1 = V 4.5 V Minimum and maximum values are guaranteed through test or design across the Recommended Operating Conditions, where applicable. Typical values are listed for guidance only and are based on the particular conditions listed for each section, where applicable. These conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions. ESD PROTECTION Pins Description Minimum Voltage All Pins Human Body Model 7 kv 2

DC ELECTRICAL CHARACTERISTICS CONTROL INPUT (Typical: T = 25 C; = V) V IH IN Control High 1.8 2.7 4.5 V IL IN Control Low 1.8 2.7 4.5 1. 1.3 1.6.4.5.6 V V I IN IN Control Leakage V IN 4.5 ±.1 ±.5 A SUPPLY CURRENT AND LEAKAGE (Typical: T = 25 C; = V) I NO/NC (OFF) I (ON) NC, NO OFF State Leakage V IN = V IL or V IH V NC/NO =.3 V V = 4. V ON State Leakage V IN = V IL or V IH V NO =.3 V or 4. V with V NC Floating or V NC =.3 V or 4. V with V NO Floating V =.3 V or 4. V I CC Quiescent Supply V IN and V IS = or GND I D = A 4.5 ±1 ±1 na 4.5 ±2 ±1 na 1.65 4.5 ±.1 ±1. A I OFF IN Power Off Leakage V IN = 4.5 V or GND ±.5 ±1. A ON RESISTANCE (Typical: T = 25 C; = V) R ON NO, NC ON Resistance I ON = 1 ma V IS = to 4.5.4.35.6.5 R FLAT NO, NC R ON Flatness I ON = 1 ma V IS = to 4.5.12.15.16.17 R ON NO, NC R ON Matching I ON = 1 ma V IS = to 4.5.8.8.1.1 3

AC ELECTRICAL CHARACTERISTICS TIMING/FREQUENCY (Typical: T = 25 C; = V, R L = 5, C L = 35 pf, f = 1 MHz) t ON IN to NC or NO Turn On Time 2.3 4.3 3 4 ns t OFF IN to NC or NO Turn Off Time 2.3 4.53 18 25 ns t BBM IN to NC or NO Break Before Make 2 15 ns BW 3dB Bandwidth C L = 5 pf 1.65 4.5 36 MHz ISOLATION AND THD (Typical: T = 25 C; = V, RL = 5, CL = 5 pf, f = 1 MHz) Q Charge Injection V IN = to GND R IS =, C L = 1. nf Q = C L ΔV OUT THD Total Harmonic Distortion F IS = 2 Hz to 2 khz R L = R gen = 6, C L = 1. pf V IS = 1. V PP O IRR NO Off Isolation V IN = V NO or V NC (pk pk) = 1. V 1.65 4.3 38 pc.2 % 1.65 4.5 54 db Xtalk to y Non Adjacent Channel V NO or V NC (pk pk) = 1. V 1.65 4.5 54 db CAPACITANCE (Typical: T = 25 C; = V, R L = 5, C L = 5 pf, f = 1 MHz) C IN IN Control V 3.5 pf C ON NC to Through Switch V IN = V V 95 pf C OFF NC, NC Unselected Port V IS = V, V IN = V V 47 pf 4

TYPICAL CHARACTERISTICS.65.65.55.55.45.45 RON ( ).35.25.15.5 85 C 25 C 4 C RON ( ).35.25.15.5 85 C 25 C 4 C.5.5 1. 1.5 Vis (mv) 2. 2.5 Figure 1. RON vs. Vin @ Vcc = V, All Temps.5.5 1. 1.5 2. Vis 2.5 3.5 4. Figure 2. RON vs. Vin @ Vcc = 4.3 V, All Temps MAGNITUDE (db).5 1. 1.5 2. 2.5 3.5 4. 4.5 1,, 1,, FREQUENCY (Hz) Figure 3. Bandwidth vs. Frequency 1,, MAGNITUDE (db) 1 2 3 4 5 6 7 8 9 1 K 1 K 1 M 1 M FREQUENCY (Hz) 1 M Figure 4. Cross Talk vs. Frequency @ 25 C 1 B PERCENT (%).22.2.18.16.14.12.1.8.6.4.2 1 1 1 1, 1, FREQUENCY (Hz) Figure 5. THD vs. Frequency @ Vin = 1 Vpp 5

.1 F V OUT 5 35 pf GND 9% t BMM 9% of V OH Switch Select Pin GND Figure 6. t BBM (Time Break Before Make) V 5% 5%.1 F Open V OUT 5 35 pf V OH 9% 9% V OL t ON t OFF Figure 7. t ON /t OFF 5 V 5% 5% Open V OUT 35 pf VOH V OL 1% 1% t OFF t ON Figure 8. t ON /t OFF 6

Reference 5 5 Generator Transmitted 5 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. V ISO, Bandwidth and V ONL are independent of the input signal direction. V ISO = Off Channel Isolation = 2 Log V OUT for V IN at 1 khz VIN V ONL = On Channel Loss = 2 Log V OUT for V IN at 1 khz to 5 MHz VIN Bandwidth (BW) = the frequency 3 db below V ONL V CT = Use V ISO setup and test to all other switch analog input/outputs terminated with 5 Figure 9. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/V ONL Open V IN GND C L V IN Off On Off V OUT Figure 1. Charge Injection: (Q) 7

PACKAGE DIMENSIONS UDFN6, 1.45x1.,.5P CASE 517AQ ISSUE O 6X PIN ONE REFERENCE.1 C.5 C.5 C.1 C D ÉÉÉ TOP VIEW DETAIL B A1 SIDE VIEW A B E A2 A L1 C SEATING PLANE EXPOSED Cu L DETAIL A OPTIONAL CONSTRUCTIONS ÉÉÉ MOLD CMPD DETAIL B OPTIONAL CONSTRUCTIONS L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN.15 AND.3 mm FROM THE TERMINAL TIP. MILLIMETERS DIM MIN MAX A.45.55 A1..5 A2.7 REF b.2.3 D 1.45 BSC E 1. BSC e.5 BSC L.3.4 L1.15 MOUNTING FOOTPRINT PACKAGE OUTLINE 6X.3 e 1 3 6X L 1.24 DETAIL A 6 4 BOTTOM VIEW 6X b.1 C A B.5 C NOTE 3 6X.53 1.5 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: 33 675 2175 or 8 344 386 Toll Free USA/Canada Fax: 33 675 2176 or 8 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 282 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 79 291 Japan Customer Focus Center Phone: 81 3 5817 15 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NLAS5157/D