ADC and DAC Standards Update

Similar documents
The Fundamentals of Mixed Signal Testing

New Features of IEEE Std Digitizing Waveform Recorders

Testing A/D Converters A Practical Approach

Data Converters. Specifications for Data Converters. Overview. Testing and characterization. Conditions of operation

DATASHEET HI5805. Features. Applications. Ordering Information. Pinout. 12-Bit, 5MSPS A/D Converter. FN3984 Rev 7.00 Page 1 of 12.

DAC & ADC Testing Fundamental

Enhancing Analog Signal Generation by Digital Channel Using Pulse-Width Modulation

AD9772A - Functional Block Diagram

Digital Waveform Recorders

DATASHEET HI5767. Features. Applications. Pinout. 10-Bit, 20/40/60MSPS A/D Converter with Internal Voltage Reference. FN4319 Rev 6.

Data Converters. Springer FRANCO MALOBERTI. Pavia University, Italy

IEEE TC-10: Update 2008

Acquisition Time: Refer to Figure 1 when comparing SAR, Pipeline, and Delta-Sigma converter acquisition time. Signal Noise. Data Out Pipeline ADC

An Introduction to Mixed-Signal IC Test and Measurement

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing

Analog and Telecommunication Electronics

Maximizing GSPS ADC SFDR Performance: Sources of Spurs and Methods of Mitigation

400ksps/300ksps, Single-Supply, Low-Power, Serial 12-Bit ADCs with Internal Reference

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection

Lecture #6: Analog-to-Digital Converter

DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS

4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP AD7904/AD7914/AD7924

TUTORIAL 283 INL/DNL Measurements for High-Speed Analog-to- Digital Converters (ADCs)

A 12 bit 125 MHz ADC USING DIRECT INTERPOLATION

Analog-to-Digital i Converters

ADC Based Measurements: a Common Basis for the Uncertainty Estimation. Ciro Spataro

ADVANCED WAVEFORM GENERATION TECHNIQUES FOR ATE

+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs

8-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 20-Lead TSSOP AD7908/AD7918/AD7928

Low-Power Pipelined ADC Design for Wireless LANs

8-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 20-Lead TSSOP AD7908/AD7918/AD7928

The need for Data Converters

4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP AD7904/AD7914/AD7924

MSP430 Teaching Materials

ZTEC Instruments. Oscilloscope Measurement Fundamentals: Avoiding Common Pitfalls Creston Kuenzi, Applications Engineer

ANALOG CIRCUITS AND SIGNAL PROCESSING

Sponsored by the Waveform Generation Measurement and Analysis Technical Committee

Computation of Error in Estimation of Nonlinearity in ADC Using Histogram Technique

12-bit 50/100/125 MSPS 1-channel ADC

Tiny, 2.1mm x 1.6mm, 3Msps, Low-Power, Serial 12-Bit ADC

SPT BIT, 30 MSPS, TTL, A/D CONVERTER

SECTION 4 HIGH SPEED SAMPLING AND HIGH SPEED ADCs, Walt Kester

Pipeline vs. Sigma Delta ADC for Communications Applications

AD Bit, 20/40/65 MSPS 3 V Low Power A/D Converter. Preliminary Technical Data

Analog-to-Digital Converter Survey & Analysis. Bob Walden. (310) Update: July 16,1999

Analog to Digital Conversion

DATASHEET HI5667. Features. Applications. Part Number Information. Pinout. 8-Bit, 60MSPS A/D Converter with Internal Voltage Reference

Cell-based Application Specific Products. Application Note. Data Converter Terminology. Introduction

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP AD7490-EP

IP Specification. 12-Bit 125 MSPS Duel ADC in SMIC40L IPS_S40L_ADC12X2_125M FEATURES APPLICATIONS GENERAL DESCRIPTION. Single Supply 1.

CMOS Sigma-Delta Modulator AD7720

ADC12C Bit, 95/105 MSPS A/D Converter

14-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs

RTH GHz Bandwidth High Linearity Track-and-Hold REV-DATE PA FILE DS_0162PA2-3215

ADC Linearity Test Signal Generation Algorithm

DATASHEET HI5660. Features. Ordering Information. Applications. Pinout. 8-Bit, 125/60MSPS, High Speed D/A Converter. FN4521 Rev 7.

Characterizing Distortion in Successive-Approximation Analog-to-Digital Converters due to Off-Chip Capacitors within the Voltage Reference Circuit

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP AD7490

System Two Cascade Plus Audio Test and Measurement System

ADC11DL066 Dual 11-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D Converter w/internal Reference

The Battle for Data Fidelity:Understanding the SFDR Spec

ADCS7476/ADCS7477/ADCS7478 1MSPS, 12-/10-/8-Bit A/D Converters in 6-Lead SOT-23

PRODUCT OVERVIEW REF FLASH ADC S/H BUFFER 24 +5V SUPPLY +12V/+15V SUPPLY. Figure 1. ADS-917 Functional Block Diagram

LTC2216/LTC Bit, 80Msps/65Msps Low Noise ADC APPLICATIONS TYPICAL APPLICATION

Low Power, Pseudo Differential, 100 ksps 12-Bit ADC in an 8-Lead SOT-23 AD7457

Radiation Test Workshop 2016

Dual, 16-Bit nanodac+ with 4 ppm/ C Reference, SPI Interface AD5689R-EP

ADC12DL040. ADC12DL040 Dual 12-Bit, 40 MSPS, 3V, 210mW A/D Converter. Literature Number: SNAS250C

REVISION HISTORY. 8/15 Revision 0: Initial Version. Rev. 0 Page 2 of 17

Data Converter Topics. Suggested Reference Texts

Lecture 9, ANIK. Data converters 1

Data Conversion and Lab (17.368) Fall Lecture Outline

DATASHEET HI1175. Features. Ordering Information. Applications. Pinout. 8-Bit, 20MSPS, Flash A/D Converter. FN3577 Rev 8.

8-Channel, 10-Bit, 65MSPS Analog-to-Digital Converter

Data Converter Fundamentals

Dual CMOS - Modulators AD7724

5 V Integrated High Speed ADC/Quad DAC System AD7339

A 4 GSample/s 8-bit ADC in. Ken Poulton, Robert Neff, Art Muto, Wei Liu, Andrew Burstein*, Mehrdad Heshami* Agilent Laboratories Palo Alto, California

LTC2207/LTC Bit, 105Msps/80Msps ADCs DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION

ADC Bit 65 MSPS 3V A/D Converter

8 GHz Bandwidth Low Noise 1 GS/s Dual Track-and-Hold

User-friendly Matlab tool for easy ADC testing

PART* MAX5354EUA MAX5354EPA TOP VIEW OUT. SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.

Analyzing A/D and D/A converters

8-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer AD7938/AD7939

MAX11626 MAX11629/ MAX11632/MAX Bit, 300ksps ADCs with FIFO and Internal Reference

1.8V, 10-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications

ENGINEERING FOR RURAL DEVELOPMENT Jelgava, EDUCATION METHODS OF ANALOGUE TO DIGITAL CONVERTERS TESTING AT FE CULS

4-Channel, 1.5 MSPS, 12-Bit and 10 Bit Parallel ADCs with a Sequencer AD7933/AD7934

Ultra-Low-Power, 10Msps, 8-Bit ADC

FUNCTIONAL BLOCK DIAGRAM DIGITAL VIDEO ENGINE

NPTEL. VLSI Data Conversion Circuits - Video course. Electronics & Communication Engineering.

15-Bit, 65Msps ADC with -78.2dBFS Noise Floor for IF Applications

Reconfigurable 6 GHz Vector Signal Transceiver with I/Q Interface

Appendix G - Specifications. G Specifications. Appendix G - Specifications ANALOG SIGNAL OUTPUTS. Low Distortion Sine Wave. Frequency Accuracy

ADC07D1520. Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter. General Description. Features. Key Specifications.

1.75 MSPS, 4 mw 10-Bit/12-Bit Parallel ADCs AD7470/AD7472

16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range

Integrated Circuit Design for High-Speed Frequency Synthesis

Lab.3. Tutorial : (draft) Introduction to CODECs

Transcription:

ADC and DAC Standards Update

Revised ADC Standard 2010 New terminology to conform to Std-1057 SNHR became SNR SNR became SINAD Added more detailed test-setup descriptions Added more appendices Reorganized some of the presentation based on lessons learned while rewriting 1057. Final balloting just completed

1241 Table of Contents Excerpt 1 Overview 8 1.1 Scope 8 1.2 Analog-to-digital converter background 8 1.3 Guidance to the user 13 1.3.1 Interfacing 13 1.3.2 Test conditions 13 1.3.3 Electrical environment 14 1.3.4 Test equipment 14 1.3.5 Test selection 14 1.4 Manufacturer-supplied information 15 4 General test methods 32 4.1 Test setup 32 4.1.1 Sinewave test setup 33 4.1.2 Arbitrary signal test setup 33 4.1.3 Step signal setup 34 4.2 Taking a record of data 34 4.2.1 Use of output decimation in taking a record of data 35 4.3 Equivalent time sampling and undersampling 35 4.3.1 Extraction method 36 4.3.2 Comments on the extraction method for equivalent time sampling37 4.3.3 Alternate extraction method 38 4.3.4 Comments on alternate extraction method 39

1241 Table of Contents Excerpt 5 Sinewave testing and fitting 5.1 Curve fitting test method 5.4 Selecting signal amplitudes 5.5 Presenting sinewave data 5.6 Impurities of sinewave sources 5.7 Estimating impurity problems from sine-fitting results 5.8 Measuring and controlling sinewave impurities 6 Locating code transitions 6.1 Locating code transitions using a feedback loop 6.2 Alternate code transition location method based on ramp histogram 6.3 Alternate code transition location method, based on sine-wave histogram 6.4 Determining the static transfer curve 7 Analog input 7.1.1 Static input resistance 7.2 Static input impedance versus input signal level 7.3 Static input current 7.4 Static gain and offset 8 Linearity 8.1 Integral nonlinearity 8.2 Absolute accuracy error 8.3 Differential nonlinearity and missing codes 8.4 Example INL and DNL data 8.5 Monotonicity

1241 Table of Contents Excerpt 8.6 Hysteresis 8.7 Harmonic and spurious distortion 8.7.1 Total harmonic distortion 8.7.2 Spurious free dynamic range 8.8 Intermodulation distortion 8.8.1 Intermodulation distortion test method using two tones 8.8.2 Intermodulation distortion test methods using more than two tones 8.9 Noise power ratio (NPR) 9 Noise (total) 9.1 Signal-to-noise and distortion ratio (SINAD) 9.2 Signal-to-noise ratio (SNR) 9.3 Effective number of bits (ENOB) 9.3.5 Effects of harmonic distortion on sinewave tests 9.4 Random noise 10 Step response parameters 10.2 Slew rate limit 10.3 Settling time parameters 10.4 Transition duration of step response 10.5 Overshoot and precursors

1241 Table of Contents Excerpt 11 Frequency response parameters 11.1 Bandwidth (BW) 11.2 Gain error (gain flatness) 11.3 Frequency response and gain from step response 12 Differential gain and phase 13 Aperture effects 13.1 Aperture duration 13.2 Aperture delay 13.3 Aperture jitter 14 Additional tests and specification 14.1 Digital logic signals 14.2 Pipeline delay 14.3 Out-of-range recovery 14.4 Differential input specifications 14.6 Power supply parameters Annex A (Informative) ADC Architectures Annex B (Informative) Sinewave fitting algorithms Annex C (Normative) Discrete Fourier transforms and windowing Annex D (Informative) Presentation of Sinewave data

Some ADC Critical Parameters DNL ENOB NPR INL DG SINAD THD IMD SFDR = differential nonlinearity = effective number of bits = noise power ratio = integral nonlinearity = differential gain error = signal-to-noise and distortion ratio = total harmonic distortion = intermodulation distortion = differential phase error

Setup for Sinewave Ttesting

Setup for Arbitrary Signal Testing

DAC Standard Completely New Structure similar to ADC Standard. Attempt to finish this year. Waveform recorder is the primary test instrument Does not have to be as accurate as the DAC. Test signals are sinewaves and steps as in ADC standard but generated is bit stream.

DAC Standard Table of Contents Excerpt 1. Overview 7 1.1 Scope and purpose 7 1.1.1 Digital to analog converter and analog to digital converter differences and similarities 7 1.2 Digital to analog converter background 9 1.3 Guidance to the user 16 1.3.1 Interfacing 16 1.3.2 Coding 16 1.3.3 Test conditions 19 1.3.4 Test equipment 19 1.3.5 Test selection 20 1.4 Manufacturer supplied information 20 4. Test methods 34 5. Fitting sinewaves 39

DAC Standard Table of Contents Excerpt 6. Digital input 42 6.1 Coding 42 6.2 Clock and data feedthrough 42 6.3 Static input parameters 42 6.4 Timing parameters 42 7. Analog inputs 43 8. Analog output (single-ended and differential) 43 8.1.1 Output impedance test method 44 8.2.1 Short circuit current test method 45 8.3.1 Compliance voltage test method 46 8.4.1 Load current test method for voltage-source DACs 46 8.5.2 Test method for dynamic range 47 9.1.1 Static gain and offset test method 47 9.3.1 Dynamic gain error 49 10.1.1 Integral nonlinearity test method 49

DAC Standard Table of Contents Excerpt 10.2 Differential nonlinearity 50 10.3 Monotonicity 50 10.4 Spurious free dynamic range 50 11. Noise 52 11.1 Signal to noise and distortion ratio 52 11.1.1 Test method for SINAD in the frequency domain 52 11.1.2 Test method for SINAD in the time domain 56 11.2 Signal to noise ratio 57 11.3 Effective number of bits 58 11.4 Noise power ratio 59 12. Harmonic and spurious distortion 60 12.1 Total harmonic distortion 60 12.2 Intermodulation distortion 61 12.3 Glitches 62 12.4 1/f Noise 62

DAC Standard Table of Contents Excerpt 13. Step response parameters 62 13.4 Settling time parameters 63 13.5 Transition duration 66 13.6 Overshoot and precursors 67 14. Interference-related DAC parameters 67 14.1 Multitone power ratio 68 14.3 Crosstalk (channel separation, channel isolation) 69 14.4 Channel matching 71 14.5 Channel skew 73 15. Frequency response parameters 73 15.2 Reference input bandwidth 73 15.3 Digital-to-analog-conversion frequency response 74 16. Differential gain and phase 77 17. Power supply parameters 78 Annex A (Informative) DAC Architectures 83 Annex B (Informative) Sinewave fitting algorithms 88 Annex C (Informative): Discrete Fourier transforms and windowing 88 Annex D (Informative) Software considerations 100

General DAC Model Used in Standard Figure 5 - Block diagram interpolating DAC. If K = 1, the DAC is a noninterpolating DAC

Critical DAC parameters ACLR = adjacent channel leakage power ratio CM = channel matching DG = differential gain DNL = differential nonlinearity DP = differential phase ENOB = effective number of bits GE = gain error IMD = Intermodulation distortion INL = integral nonlinearity OV = Output voltage compliance range MTPR = Missing Tone Power Ratio SINAD = signal-to-noise and distortion ratio SFDR = spurious free dynamic range SNR = signal to noise ratio T S = settling time THD = total harmonic distortion THD+N = THD plus noise TR = transient response

DAC Test Setup Filter here to remove fundamental frequency and reduce dynamic range requirement of waveform recorder.

2024 © hobbydocbox.com Privacy Policy | Terms of Service | Feedback