DC to MHz IF Gain Block ADL3 FEATURES Fixed gain of 6. db Operation up to MHz 37 dbm Output Third-Order Intercept (OIP3) 3 db noise figure Input/output internally matched to Ω Stable temperature and power supply 3 V or V power supply ma power supply current FUTIONAL BLOCK DIAGRAM GND IN 7 OUT 3 6 ADL3 = NO CONNECT Figure. 3- APPLICATIONS VCO buffers General purpose Tx/Rx amplification GENERAL DESCRIPTION The ADL3 is a broadband, fixed-gain, linear amplifier that operates at frequencies up to MHz. The device can be used in a wide variety of wired and wireless devices, including cellular, broadband, CATV, and LMDS/MMDS applications. The ADL3 provides a gain of 6. db, which is stable over frequency, temperature, power supply, and from device to device. It achieves an OIP3 of 37 dbm with an output compression point of. db and a noise figure of 3 db. The ADL3 operates with supply voltages of 3 V or V with a supply current of ma. The ADL3 is fabricated on a GaAs phempt process. The device is packaged in a 3 mm mm LFCSP that uses an exposed paddle for excellent thermal impedance. It operates from C to + C. A fully populated evaluation board is also available. This amplifier is single-ended and internally matched to Ω with an input return loss of db. Only input/output ac-coupling capacitors, a power supply decoupling capacitor, and an external inductor are required for operation. Rev. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 6-96, U.S.A. Tel: 7.39.7 www.analog.com Fax: 7.6.33 6 Analog Devices, Inc. All rights reserved.
ADL3 TABLE OF CONTENTS Features... Applications... Functional Block Diagram... General Description... Revision History... Specifications... 3 Typical Scattering Parameters... Typical Performance Characteristics...7 Theory of Operation... Soldering Information and Recommended PCB Land Pattern... Evaluation Board... Outline Dimensions... Ordering Guide... Absolute Maximum Ratings... ESD Caution... Pin Configuration and Function Descriptions... 6 REVISION HISTORY 7/6 Revision : Initial Version Rev. Page of
SPECIFICATIONS VPOS = V and TA = C, unless otherwise noted. ADL3 Table. Parameter Conditions Min Typ Max Unit OVERALL FUTION (See Table ) Frequency Range MHz Gain (S) 6. db Input Return Loss (S) db Output Return Loss (S) db Reverse Isolation (S). db FREQUEY = 7 MHz Gain 6.7 db vs. Temperature C TA + C ±. db vs. Supply.7 V to. V ±. db Output db Compression Point.7 dbm Output Third-Order Intercept f = MHz, Output Power (POUT) = dbm per tone 37 dbm Noise Figure db VPOS = 3 V 3. db FREQUEY = 9 MHz Gain 6.. db vs. Frequency ± MHz ±. db vs. Temperature C TA + C ±. db vs. Supply.7 V to. V ±. db Output db Compression Point. dbm Output Third-Order Intercept f = MHz, POUT = dbm per tone 37 dbm Noise Figure 3. db VPOS = 3 V.3 db FREQUEY = 3 MHz Gain. 6 7.3 db vs. Frequency ± MHz ±. db vs. Temperature C TA + C ±.3 ±. db vs. Supply.7 V to. V ±. db Output db Compression Point 9..6 dbm Output Third-Order Intercept f = MHz, POUT = dbm per tone 36 dbm Noise Figure. 3. db VPOS = 3 V db FREQUEY = 9 MHz Gain 3. 6 db vs. Frequency ± MHz ±. db vs. Temperature C TA + C ±. ± db vs. Supply.7 V to. V ±. db Output db Compression Point. dbm Output Third-Order Intercept f = MHz, POUT = dbm per tone 37 dbm Noise Figure.7 3. db VPOS = 3 V.3 db POWER INTERFACE Pin VPOS Supply Voltage (VPOS) 3. V Supply Current 3 ma vs. Temperature C TA + C ± ma Power Dissipation VPOS = V. W VPOS = 3 V.33 W For operation at lower frequencies, see the Theory of Operation section. Rev. Page 3 of
ADL3 TYPICAL SCATTERING PARAMETERS VPOS = V and TA = C. Table. Freq. S S S S K (MHz) db Magnitude Angle db Magnitude Angle db Magnitude Angle db Magnitude Angle Factor 7.. 3 7. 7.3 7.. 7.7.3 69.9 9.7.33 6 6.7 6. 7.9...6 73.7.. 6 6.6 6.73 7.7. 3..3...7 3 6. 6.7 7.6. 3..3 3...7 6. 6.67 67.6. 9.3.3...7 6 6. 6.9 6.6. 3 7.7....7 9 6.3 6. 7.6. 6.6.. 3..7 3 6. 6. 3.6...6 7. 3.3.7 6 6. 6.36 9.6. 6 3.7.7 9...7 9 6. 6.9.6. 7.. 3... 3.9 6..6..7.9 33... 36.7 6. 36.6. 9 9.6. 3... 39.6 6. 3.7... 37.3 6.9.9..9.7. 7.3. 3.3 6..9.3..6. 6... 7.7.9 9..73 9.6. 3..7.3 7.6.9..6.6. 3.6.9.3.6.3...6. 3.....3.6.39 7.6. 3.. 7. 9.3.3 6...6. 6.. 9. 9..3 6.3.7.6. 7.7.6...3 66..6 96.6.... Rev. Page of
ADL3 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage, VPOS Input Power (re: Ω) Internal Power Dissipation (Paddle Soldered) θjc (Junction to Paddle) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range 6 V dbm 6 mw C/W C C to + C 6 C to + C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulates on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. Page of
ADL3 PIN CONFIGURATION AND FUTION DESCRIPTIONS IN 3 ADL3 TOP VIEW (Not to Scale) GND 7 OUT 6 = NO CONNECT Figure. Pin Configuration Table. Pin Function Descriptions Pin No. Mnemonic Description, 3,,, 6 No Connect. IN RF Input. Requires a DC blocking capacitor. 7 OUT/ VPOS RF Output and VPOS (Supply Voltage). DC bias is provided to this pin through an inductor. RF path requires a DC blocking capacitor. Exposed GND Ground. Connect this pin to a low impedance ground plane. Internally connected to GND. Solder to a low impedance ground plane. Paddle 3- Rev. Page 6 of
ADL3 TYPICAL PERFORMAE CHARACTERISTICS GAIN, PdB, OIP3, NF (db, dbm) 3 OIP3 (dbm) 3 PdB GAIN NF 3 6 7 9 Figure 3. Gain, PdB, OIP3, and Noise Figure vs. Frequency, VPOS = V 3-3 GAIN, PdB, OIP3, NF (db, dbm) 3 OIP3 (dbm) 3 PdB GAIN NF 3 6 7 9 Figure 6. Gain, PdB, OIP3, and Noise Figure vs. Frequency, VPOS = 3 V 3-6 7. 7. 7. 6. 6. C 6. 6. V. GAIN (db)... + C + C GAIN (db).. 3V 3.. 3... 3 6 7 9 Figure. Gain vs. Frequency and Temperature, VPOS = V 3-. 3. 3 6 7 9 Figure 7. Gain vs. Frequency and Supply, VPOS = V and 3 V 3-7 GAIN 7 6 S P OUT (dbm) P OUT 3 GAIN (db) S, S, S (db) S S 3 INPUT POWER (dbm) Figure. Output Power and Gain vs. Input Power, f = 9 MHz, VPOS = V 3-3 3 3 6 7 9 Figure. Input Return Loss, Output Return Loss, and Reverse Isolation vs. Frequency, VPOS = V 3- Rev. Page 7 of
ADL3 OIP3 AND PdB (dbm) OIP3 ( C) 3 36 3 OIP3 (+ C) 3 OIP3 (+ C) 3 6 PdB (+ C) PdB ( C) PdB (+ C) 6 3 6 7 9 Figure 9. OIP3 and PdB vs. Frequency and Temperature, VPOS = V 3-9 OIP3 (dbm) 39 3 37 V (dbm) 36 3 3 33 3 3V (dbm) 3 3 9 7 3 6 7 9 Figure. OIP3 vs. Frequency and Supply, VPOS = V and 3 V 3- OIP3 (dbm) 3 3 9MHz 7MHz 3MHz 9MHz NOISE FIGURE (db) 9 7 6 6 6 P OUT (dbm) Figure. OIP3 vs. Output Power and Frequency, VPOS = V 3- V 3 3V 3 6 7 9 Figure 3. Noise Figure vs. Frequency and Supply, VPOS = V and 3 V 3-3 NOISE FIGURE (db) 9 7 6 C + C 3 + C 3 6 7 9 Figure. Noise Figure vs. Frequency and Temperature, VPOS = V 3- SUPPLY CURRENT (ma) 3 3 V 3V 9 9 3 3 6 7 9 TEMPERATURE ( C) Figure. Supply Current vs. Temperature and Supply, VPOS = V and 3 V 3- Rev. Page of
ADL3 6 6 PERCENTAGE (%) 6 PERCENTAGE (%) 6 3 3 3 33 3 3 36 37 3 39 3 OIP3 (dbm) Figure. OIP3 Distribution at 9 MHz, V 3-..9 6.3 6.7 7. 7. 7.9.3.7 6. 6. 6.9 7.3 7.7.. GAIN (db) Figure. Gain Distribution at 9 MHz, VPOS = V 3-6 3 3 PERCENTAGE (%) 6 PERCENTAGE (%).....6.....6.....6 3. PdB (dbm) Figure 6. PdB Distribution at 9 MHz, VPOS = V 3-6....6. 3. 3. 3. 3.6 3.... NOISE FIGURE (db) Figure 9. Noise Figure Distribution at 9 MHz, VPOS = V 3-9 6...... NOISE FIGURE (db).. 3. BLACK = + C BLUE = C RED = + C NOISE FIGURE (db) 3. 3.. BLACK = + C BLUE = C RED = + C 3.... 3 6 7 9 Figure 7. Noise Figure Temperature Distribution, VPOS = V 3-7.. 3 6 7 9 Figure. Noise Figure Temperature Distribution, VPOS = 3 V 3- Rev. Page 9 of
ADL3 THEORY OF OPERATION The basic connections for operating the ADL3 are shown in Figure. Recommended components are listed in Table. The inputs and outputs should be ac coupled with appropriately sized capacitors (device characterization was performed with nf capacitors). DC bias is provided to the amplifier via an inductor connected to the RF output pin. The bias voltage should be decoupled using a nf capacitor. A bias voltage of V is recommended. However, the device is specified to operate down to 3 V with a slightly reduced compression point and a reduced noise figure. SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN Figure 3 shows the recommended land pattern for ADL3. To minimize thermal impedance, the exposed paddle on the package underside should be soldered down to a ground plane along with Pin. If multiple ground layers exist, they should be stitched together using vias. Pin, Pin 3, Pin, Pin and Pin 6 can be left unconnected, or can be connected to ground. Connecting these pins to ground slightly enhances thermal impedance. 3V TO V PIN C nf RFIN C nf 3 GND IN OUT ADL3 7 6 L 7nH C nf RF OUT.33mm.3mm.6mm.mm 3- = NO CONNECT Figure. Basic Connections.33mm For operation down to MHz, a larger biasing choke is recommended (see Table ) along with larger ac-coupling capacitors. Figure shows a plot of input return loss and gain with the recommended components..3mm Figure 3. Recommended Land Pattern 3-3 Table. Recommended Components for Basic Connections Frequency C C L C MHz to MHz. μf. μf 3.3 μh. μf MHz to MHz nf nf 7 nh nf S (3.3µH) S (7nH) GAIN AND S (db) S (7nH) S (3.3µH) 3 3 Figure. Performance at MHz 3- Rev. Page of
ADL3 EVALUATION BOARD Figure shows the schematic for the ADL3 evaluation board. The board is powered by a single supply (between 3 V and V). The components used on the board are listed in Table 6. Power can be applied to the board through clip-on leads (J, J6), through an edge connector (P), or through Jumper W. Note that IN, OUT, T, T, C6, C7 and C have no function. Because Pin, Pin 3 and Pin 6 of ADL3 are No Connects, these pins are grounded on this PCB (this has no effect on electrical performance). J VPOS C nf C6 OPEN C7 C OPEN OPEN J6 GND J IN C nf 3 GND IN ADL3 OUT 7 6 L 7nH C nf J OUT 3- Figure. Evaluation Board Layout 3- = NO CONNECT Figure. Evaluation Board Schematic Table 6. Evaluation Board Configuration Options Component Function Default Value C, C AC-coupling capacitors. nf C Power supply decoupling capacitor. nf 63 L DC bias inductor. 7 nh J, J6 Clip-on terminals for power supply. J = VPOS J6 = GND W -pin jumper for connection of ground and supply via cable. P Edge connector. P: A to A = GND P: B to B = GND P: A to A9 = VPOS P: B to B9 = VPOS Rev. Page of
ADL3 OUTLINE DIMENSIONS PIN INDICATOR....9.7. SEATING PLANE MAX.3.3. 3. 3..7 TOP VIEW.9.7.. MAX.6 TYP...7. REF.6..3. BSC. MAX. NOM.9.7.9 BOTTOM VIEW EXPOSEDPAD Figure 6. -Lead Lead Frame Chip Scale Package [LFCSP_VD] mm 3 mm Body, Very Thin, Dual Lead CP-- Dimensions shown in millimeters...3...... ORDERING GUIDE Model Temperature Range Package Description Package Option Branding Ordering Quantity ADL3ACPZ-R7 C to + C -Lead LFCSP_VD, 7 Tape and Reel CP-- OT ADL3ACPZ-WP C to + C -Lead LFCSP_VD, Waffle Pack CP-- OT ADL3-EVAL Evaluation Board Z = Pb-free part. 6 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D3--7/6() Rev. Page of