Power MOSFET, N-Channel, SUPERFET III, Easy Drive, 650 V, 9 A, 65 m Description SUPERFET III MOSFET is ON Semiconductor s brand new high voltage super junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provides superior switching performance, and withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET Easy drive series helps manage EMI issues and allows for easier design implementation. S R DS(ON) MAX I D MAX 650 V 65 m @ 0 V 9 A D Features 700 V @ T J = 50 C Typ. R DS(on) = 40 m Ultra Low Gate Charge (Typ. Q g = 35 nc) Low Effective Output Capacitance (Typ. C oss(eff.) = 345 pf) 00% Avalanche Tested These Devices are Pb Free and are RoHS Compliant G S POWER MOSFET Applications Computing / Display Power Supplies Telecom / Server Power Supplies Industrial Power Supplies Lighting / Charger / Adapter G D S TO 220F CASE 340BF MARKING DIAGRAM $Y&Z&3&K FCPF 65N65S3 $Y = ON Semiconductor Logo &Z = Assembly Plant Code &3 = Data Code (Year & Week) &K = Lot FCPF65N65S3 = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. Semiconductor Components Industries, LLC, 207 June, 208 Rev.2 Publication Order Number: FCPF65N65S3L/D
ABSOLUTE MAXIMUM RATINGS (T C = 25 C, Unless otherwise noted) Symbol Parameter FCPF65N65S3L Unit S Drain to Source Voltage 650 V S Gate to Source Voltage DC ±30 V AC (f > Hz) ±30 I D Drain Current Continuous (T C = 25 C) 9* A Continuous (T C = 00 C) 2.3* I DM Drain Current Pulsed (Note ) 47.5* A E AS Single Pulsed Avalanche Energy (Note 2) 87 mj I AS Avalanche Current (Note 2) 2.7 A E AR Repetitive Avalanche Energy (Note ) 0.35 mj dv/dt MOSFET dv/dt 00 V/ns Peak Diode Recovery dv/dt (Note 3) 20 P D Power Dissipation (T C = 25 C) 35 W Derate Above 25 C 0.28 W/ C T J, T STG Operating and Storage Temperature Range 55 to +50 C T L Maximum Lead Temperature for Soldering, /8 from Case for 5 seconds 300 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. *Drain current limited by maximum junction temperature.. Repetitive rating: pulse width limited by maximum junction temperature. 2. I AS = 2.7 A, R G = 25, starting T J = 25 C. 3. I SD 9.5 A, di/dt 200 A/ s, V DD 400 V, starting T J = 25 C. THERMAL CHARACTERISTICS Symbol Parameter FCPF65N65S3L Unit R JC Thermal Resistance, Junction to Case, Max. 3.56 C/W R JA Thermal Resistance, Junction to Ambient, Max. 62.5 PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity FCPF65N65S3L FCPF65N65S3 TO 220F Tube N/A N/A 50 Units 2
ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Symbol Parameter Test Conditions Min. Typ. Max. Unit OFF CHARACTERISTICS BS Drain to Source Breakdown Voltage =0V, I D = ma, T J =25 C 650 V BS / T J Breakdown Voltage Temperature Coefficient =0V, I D = ma, T J = 50 C 700 V I D = ma, Referenced to 25 C 0.64 V/ C I DSS Zero Gate Voltage Drain Current = 650 V, =0V A = 520 V, T C = 25 C.39 I GSS Gate to Body Leakage Current = ±30 V, =0V ±00 na ON CHARACTERISTICS (th) Gate Threshold Voltage =, I D =.9 ma 2.5 4.5 V R DS(on) Static Drain to Source On Resistance =0V, I D = 9.5 A 40 65 m g FS Forward Transconductance =20V, I D = 9.5 A 2 S DYNAMIC CHARACTERISTICS C iss Input Capacitance = 400 V, = 0 V, f = MHz 45 pf C oss Output Capacitance 35 pf C oss(eff.) Effective Output Capacitance = 0 V to 400 V, =0V 345 pf C oss(er.) Energy Related Output Capacitance = 0 V to 400 V, =0V 48 pf Q g(tot) Total Gate Charge at 0 V = 400 V, I D = 9.5 A, =0V 35 nc Q gs Gate to Source Gate Charge (Note 4) 8.3 nc Q gd Gate to Drain Miller Charge 5 nc ESR Equivalent Series Resistance f = MHz 4.6 SWITCHING CHARACTERISTICS t d(on) Turn-On Delay Time V DD = 400 V, I D = 9.5 A, =0V, 8 ns t r Turn-On Rise Time R g = 4.7 (Note 4) 2 ns t d(off) Turn-Off Delay Time 55 ns t f Turn-Off Fall Time 6 ns SOURCE-DRAIN DIODE CHARACTERISTICS I S Maximum Continuous Source to Drain Diode Forward Current 9 A I SM Maximum Pulsed Source to Drain Diode Forward Current 47.5 A V SD Source to Drain Diode Forward Voltage = 0V, I SD = 9.5 A.2 V t rr Reverse Recovery Time = 0V, I SD = 9.5 A, 323 ns Q rr Reverse Recovery Charge di F /dt = 00 A/ s 5.2 C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature typical characteristics. 3
TYPICAL PERFORMANCE CHARACTERISTICS I D, Drain Current (A) 50 0 = 0.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V I D, Drain Current (A) 50 0 = 20 V 250 s Pulse Test 50 C 55 C 25 C 250 s Pulse Test T C = 25 C 0.2 0 20, Drain Source Voltage (V) Figure. On Region Characteristics 3 4 5 6 7 8 9, Gate Source Voltage (V) Figure 2. Transfer Characteristics R DS(ON), Drain Source On Resistance ( ) 0.6 0.4 0.2 T C = 25 C = 0 V = 20 V I S, Reverse Drain Current (A) 00 VGS = 0 V 250 s Pulse Test 0 0. 0.0 50 C 25 C 55 C 0.0 E 3 0 0 20 30 40 50 0.0 0.5.0.5 I D, Drain Current (A) V SD, Body Diode Forward Voltage (V) Figure 3. On Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Capacitances (pf) 00000 0000 000 C iss 00 C oss 4 0 = 0 V f = MHz C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss 2 C 0. rss = C gd 0 0. 0 00 000 0 5 0 5 20 25 30 35 40, Drain Source Voltage (V) Q g, Total Gate Charge (nc), Gate Source Voltage (V) 0 8 6 I D = 9.5 A = 30 V = 400 V Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 4
TYPICAL PERFORMANCE CHARACTERISTICS (continued) BS, Drain Source Breakdown Voltage (Normalized).2..0 0.9 = 0 V I D = ma R DS(on), Drain Source On Resistance (Normalized) 3.0 2.5 2.0.5.0 0.5 = 0 V I D = 9.5 A 0.8 50 0 50 00 50 T J, Junction Temperature ( C) 0.0 50 0 50 00 50 T J, Junction Temperature ( C) Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On Resistance Variation vs. Temperature I D, Drain Current (A) 00 0 0. 0.0 T C = 25 C T J = 50 C Single Pulse DC 0 ms Operation in this Area is Limited by R DS(on) ms 0 s 00 s 0 00 000, Drain Source Voltage (V) I D, Drain Current (A) 20 5 0 5 0 25 50 75 00 25 50 T C, Case Temperature ( C) Figure 9. Maximum Safe Operating Area Figure 0. Maximum Drain Current vs. Case Temperature 8 6 E OSS, ( J) 4 2 0 0 30 260 390 520 650, Drain to Source Voltage (V) Figure. E OSS vs. Drain to Source Voltage 5
TYPICAL PERFORMANCE CHARACTERISTICS (continued) r(t), Normalized Effective Transient Thermal Resistance 2 0. 0.0 DUTY CYCLE DESCENDING ORDER D = 0.5 0.2 0. 0.05 0.02 0.0 Z JC (t) = r(t) x R JC R JC = 3.56 C/W Peak T J = P DM x Z JC (t) + T C SINGLE PULSE Duty Cycle, D = t / t 2 0.00 0 5 0 4 0 3 0 2 0 0 0 0 0 2 t, Rectangular Pulse Duration (sec) Figure 2. Transient Thermal Response Curve P DM t t 2 6
R L Q g VGS Q gs Q gd I G = Const. DUT Charge Figure 3. Gate Charge Test Circuit & Waveform R L 90% 90% 90% V DD R G DUT 0% t d(on) t r 0% t d(off) t f t on t off Figure 4. Resistive Switching Test Circuit & Waveforms L E AS 2 LI 2 AS I D BS I AS R G V DD I D (t) DUT V DD (t) t p t p Time Figure 5. Unclamped Inductive Switching Test Circuit & Waveforms 7
DUT + I SD L R G Driver Same Type as DUT V DD dv/dt controlled by R G I SD controlled by pulse period (Driver) Gate Pulse Width D Gate Pulse Period 0 V I FM, Body Diode Forward Current I SD (DUT) di/dt I RM Body Diode Reverse Current Body Diode Recovery dv/dt (DUT) V SD V DD Body Diode Forward Voltage Drop Figure 6. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 8
MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO 220 FULLPAK 3LD CASE 340BF ISSUE O DATE 3 AUG 206 A 0.30 9.80 3.40 3.00 2.90 2.50 B 9.00 7.70 3.00 2.60 X 45 6.60 6.20 B 5.70 5.00 3.30 2.70 B 3 0.70 0.30 2.4.20 0.90 (2X) 2.70 2.30.20.00 2.74 2.34 (2X) 0.90 0.50 (3X) 0.50 M A 4.60 4.30 B 0.60 0.40 NOTES: A. EXCEPT WHERE NOTED CONFORMS TO EIAJ SC9A. B DOES NOT COMPLY EIAJ STD. VALUE. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS. E. DIMENSION AND TOLERANCE AS PER ASME Y4.5 2009. DOCUMENT NUMBER: 98AON3839G STATUS: ON SEMICONDUCTOR STANDARD NEW STANDARD: Semiconductor Components Industries, LLC, 2002 October, 2002 Rev. 0 DESCRIPTION: http://onsemi.com TO 220 FULLPAK 3LD Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped CONTROLLED COPY in red. Case Outline Number: PAGE OF XXX 2
DOCUMENT7NUMBER: 98AON3839G PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM FAIRCHILD TO220V03 TO ON SEMICON- 3 AUG 206 DUCTOR. REQ. BY B. NG. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Semiconductor Components Industries, LLC, 206 August, 206 Rev. O Case Outline Number: 340BF
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