5 Typical Applications The HMC35LP4 / HMC35LP4E is ideal for: Cellular/3G Infrastructure Fixed Wireless, WiMax & WiBro Test Instrumentation Functional Diagram.5 LSB GaAs MMIC 5-BIT SERIAL Features.5 LSB Steps to 15.5 CMOS Compatible Serial Data Interface SPI Compatible Serial Output ±.3 Typical Bit Error 24 Lead 4x4mm QFN Package: 16mm 2 Included in the HMC-DK4 Designer s Kit General Description The HMC35LP4 & HMC35LP4E are broadband 5-bit positive control GaAs IC digital attenuators with CMOS compatible serial-to-parallel drivers packaged in leadless QFN 4x4 mm SMT packages. Covering.7 to 3.8 GHz, the insertion loss is typically less than 1.5 to 2. The attenuator bit values are.5 (LSB), 1, 2, 4, and 8 for a total attenuation of 15.5. Attenuation accuracy is excellent at ±.25 typical with an IIP3 of up to +52 m. Five bit serial control words are used to select each attenuation state. A single Vcc bias of +3V to +5V applied through an external 5k Ohm resistor is required. Electrical Specifications, T A = +25 C, Vcc = +3V to +5V Insertion Loss Parameter Frequency Min. Typical Max. Units.7-1.4 GHz 1.4-2.3 GHz 2.3-2.7 GHz 2.7-3.8 GHz Attenuation Range.7-3.8 GHz 15.5 Return Loss (RF1 & RF2, All Atten. States).7-1.4 GHz 1.4-2.3 GHz 2.3-2.7 GHz 2.7-3.8 GHz 1.2 1.5 1.8 2. 17 18 19 15 1.5 2. 2.3 2.5 Attenuation Accuracy: (Referenced to Insertion Loss) All Attenuation States.7 -.9 GHz.9-2.2 GHz 2.2-3.8 GHz ± (.5 +5% of Atten. Setting) Max ± (.3 +4% of Atten. Setting) Max ± (.5 +5% of Atten. Setting) Max Input Power for.1 Compression Vcc = 5V Vcc = 3V.7-3.8 GHz 25 23 m m Input Third Order Intercept Point (Two-tone Input Power = m Each Tone) Vcc = 5V Vcc = 3V.7-3.8 GHz 52 48 m m Switching Characteristics trise, tfall (1/9% RF) ton, toff (Latch Enable to 1/9% RF).7-3.8 GHz 75 83 ns ns 5-6 978-25-3373 szss2@163.com
Insertion Loss INSERTION LOSS () -.5-1 -1.5-2 -2.5-3 -3.5 +25C +85C -4C -4.5 1 1.5 2 2.5 3 3.5 4 Normalized Attenuation (Only Major States are Shown) NORMALIZED ATTENUATION () -2-4 -6-8 -1-12 -14-16.5 1 1.5 2 2.5 3 3.5 4 Return Loss RF1, RF2 (Only Major States are Shown) RETURN LOSS () -5-1 -15-2 -25.5 1 4-3.5 1 1.5 2 2.5 3 3.5 4 Bit Error vs. Attenuation State BIT ERROR () 1.75.5.25 -.25.5 LSB GaAs MMIC 5-BIT SERIAL 2 8 I.L. 15.5 3.5 GHz 1.9 GHz 2.4 GHz.9 GHz -.5 2 4 6 8 1 12 14 1 5 Bit Error vs. Frequency (Only Major States are Shown) 3 Relative Phase vs. Frequency (Only Major States are Shown) 6 BIT ERROR () 2 1 8 15.5.5, 1, 2, 4 RELATIVE PHASE (deg.) 4 2-2 -4 15.5.5, 1, 2, 4, 8-1.5 1 1.5 2 2.5 3 3.5 4-6.5 1 1.5 2 2.5 3 3.5 4 Note: All Data Typical Over Voltage (+3V to +5V) & Temperature (-4 to +85 deg. C.). 978-25-3373 szss2@163.com 5-61
5 Worst Case Step Error Between Successive Attenuation States STEP ERROR () 1.2.8.4 -.4 -.8-1.2.5 1 1.5 2 2.5 3 3.5 4 Timing Parameter Serial Input Setup Time Hold time from Serial Input to Shift Clock Setup time from Shift Clock to Latch Enable Propagation delay, Latch Enable to C.5 through C8 Setup time from Reset to Shift Clock Clock Frequency (1/tclk) Symbol Vcc = +5V Vcc = +3V Units Min. Max. Min. Max. ts 2-1 - ns th - 5 - ns tlsup 4-1 - ns tpd - 3-7 ns - 2-5 - ns fclk - 3-1 MHz Digital Control Voltages State Vcc = +5V Vcc = +3V Low to 1.3V to.7v High 3.5 to 5V 2.3 to 3V Serial Input Truth Table Latch Enable.5 LSB GaAs MMIC 5-BIT SERIAL Shift Clock Truth Table Reset Serial Control Input C.5 C 1 C 2 C 4 C 8 High High High High High Function X X L Shift register cleared X H Shift register clocked X H Contents of shift register transferred to Digital Attenuator Attenuation Setting RF1 - RF2 Reference I.L. Low High High High High.5 High Low High High High 1 High High Low High High 2 High High High Low High 4 High High High High Low 8 Low Low Low Low Low 15.5 Max. Atten. Any combination of the above states will provide an attenuation approximately equal to the sum of the bits selected. Timing Diagram 5-62 978-25-3373 szss2@163.com
Logic / Functional Diagram.5 LSB GaAs MMIC 5-BIT SERIAL 5 Programming Example to Select.5 Attenuation State 978-25-3373 szss2@163.com 5-63
5 Pin Descriptions.5 LSB GaAs MMIC 5-BIT SERIAL Pin Number Function Description Interface Schematic 1, 3, 4, 6, 1, 12, 13, 15, 16, 18 N/C 2, 17 RF1, RF2 5 Serial Output 7 Reset 8 Shift Clock 9 Latch Enable These pins should be connected to PCB RF ground to maximize performance. This pin is DC coupled and matched to 5 Ohms Blocking capacitors are required. Select value based on lowest frequency of operation. Serial data output. Serial input data delayed by 8 clock cycles See truth table, control voltage table and timing diagram. 11 Serial Input 14 Vcc Supply Voltage. 19-24 GND Package bottom has an exposed metal paddle that must also be connected to RF/DC Ground. 5-64 978-25-3373 szss2@163.com
Application Circuit.5 LSB GaAs MMIC 5-BIT SERIAL 5 DC blocking capacitors C1 & C2 are required on RF1 & RF2. Choose C1 = C2 = 1 ~ 3 pf to allow lowest customer specifi c frequency to pass with minimal loss. R1 = 5k Ohm is required to supply voltage to the circuit through either PIN 2 or PIN 17. 978-25-3373 szss2@163.com 5-65
5 Absolute Maximum Ratings.5 LSB GaAs MMIC 5-BIT SERIAL Digital Inputs (Reset, Shift Clock, Latch Enable & Serial Input) Digital Outputs (Serial Output) DC Current on Serial Output Outline Drawing -1.5 to (Vcc + 1.5) V -.5 to (Vcc +.5) V ±35 ma Bias Voltage (Vcc) +7V Storage Temperature -65 to +15 C Operating Temperature -4 to +85 C RF Input Power (.7-3.8 GHz) ESD Sensitivity (HBM) +26 m Class 1A ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS Package Information NOTES: 1. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN INCHES [MILLIMETERS] 3. LEAD SPACING TOLERANCE IS NON-CUMULATIVE 4. PAD BURR LENGTH SHALL BE.15mm MAXIMUM. PAD BURR HEIGHT SHALL BE.5mm MAXIMUM. 5. PACKAGE WARP SHALL NOT EXCEED.5mm. 6. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 7. REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED LAND PATTERN. Part Number Package Body Material Lead Finish MSL Rating Package Marking [3] [1] H35 HMC35LP4 Low Stress Injection Molded Plastic Sn/Pb Solder MSL1 XXXX [2] H35 HMC35LP4E RoHS-compliant Low Stress Injection Molded Plastic 1% matte Sn MSL1 XXXX [1] Max peak refl ow temperature of 235 C [2] Max peak refl ow temperature of 26 C [3] 4-Digit lot number XXXX 5-66 978-25-3373 szss2@163.com
Evaluation Circuit Board.5 LSB GaAs MMIC 5-BIT SERIAL 5 List of Materials for Evaluation PCB 18782 [1] Item Description J1 - J2 PCB Mount SMA Connector J3 2 mm Molex Header C1, C2 1 pf Capacitor, 42 Pkg. C3.1 μf Capacitor, 42 Pkg. R1 5k Ohm Resistor, 42 Pkg. U1 HMC35LP4 / HMC35LP4E Digital Attenuator PCB [2] 1878 Evaluation PCB [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 435 The circuit board used in the fi nal application should use RF circuit design techniques. Signal lines should have 5 ohm impedance while the package ground leads and exposed ground paddle should be connected directly to the ground plane similar to that shown below. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation circuit board as shown is available from Hittite Microwave Corporation upon request. 978-25-3373 szss2@163.com 5-67