CHAPTER 4 INSTANTANEOUS SYMMETRICAL COMPONENT THEORY

74 CHAPTER 4 INSTANTANEOUS SYMMETRICAL COMPONENT THEORY 4. INTRODUCTION Ths chapter deals wth nstantaneous symmetrcal components theory for current and oltage compenton. The technque was ntroduced by Forteue. It s appled to resole an unbalanced three-phase system of oltages and currents nto three balanced systems of oltages and currents. The operaton of control crcut s explaned usng analytcal computatons. The steady state and dynamc operaton of control crcut n dfferent load current and/or utlty oltages condtons s studed through smulaton results. It does not need phase lock loop or complcate computatons. The analytcal analyss and smulaton results are presented to study the operaton of control crcut n dynamc and steady state cases. The symmetrcal component theory orgnally defned for steady-state analyss of three phase unbalanced systems. A three-phase four-wre dstrbuton system supplyng an unbalanced and nonlnear load s consdered for smulaton study. The detaled smulaton results usng MATLAB are presented to support the proposed compenton strategy. 4. COMPUTATION OF REFERENCE CURRENT The effecteness of an acte power flter depends baally on the desgn characterstcs of the current controller, the method mplemented to generate the reference template and the modulaton technque used. The

75 control heme of a shunt acte power flter must calculate the current reference waeform for each phase of the nerter, mantan the dc oltage constant, and generate the nerter gatng sgnals. Also the compenton effecteness of an acte power flter depends on ts ablty to follow the reference sgnal calculated to compente the dstorted load current wth a mnmum error and tme delay. 3-Phase 4-Wre AC Mans ln la lb lc ln la lb lc ln Lnear/ Non-Lnear Loads cc cb ca L f,r f S S 3 S 5 C dc + - cn V dc + - S 4 S 6 S DSTATCOM Fgure 4. Schematc dagram of shunt acte power flter Acte flters are wdely employed n dstrbuton system to reduce the harmoncs. Varous topologes of acte flters hae been proposed for harmonc mtgaton. The hematc dagram of shunt acte power flter topology s shown n Fgure 4.. The shunt acte power flter based on Voltage Source Inerter (VSI) structure s an attracte soluton to harmonc current problems. The shunt acte flter s a PWM oltage source nerter that s connected n parallel wth the load. Acte flter njects harmonc current nto the AC system wth the me ampltude but wth opposte phase as that of the load. The prncpal components of the APF are the VSI, DC energy storage dece, couplng nductance and the assocated control crcuts.

76 The power system s confgured wth four wres. The AC source s connected to a set of non-lnear loads. Voltages V, V, V and current I la, I lb, I lc ndcate the phase oltages and currents at the load sde respectely. I ln s the neutral current of the load sde. The APF conssts of three prncpal parts, a three phase full brdge oltage source nerter, a DC sde capactor and the couplng nductance L f. The capactor s used to store energy and the nductance s used to reduce the rpple present n the harmonc current njected by the acte power flter. The shunt acte flter generates the compentng currents to compente the load currents I la, I lb, I lc so as to make the current drawn from the source (I, I, I ) as snusodal and balanced. The performance of the acte flter manly depends on the technque used to compute the reference current and the control system used to nject the desred compenton current nto the lne. In ths chapter, the nstantaneous symmetrcal components theory s used to determne the current references (I fa *, I fb *, I fc *). The prmary goals of DSTATCOM are to cancel the effect of poor load power factor such that the current drawn from the source has a near unty power factor and to cancel the effect of harmonc contents n loads such that the current drawn from the source s nearly snusodal. In addton, t can also elmnate dc offset n loads. The reference current for DSTATCOM s calculated by nstantaneous symmetrcal component theory. It s assumed that source oltages are balanced and are gen by sn t sn( sn( t t 0 ) 0 ) (4.)

77 The symmetrcal component theory orgnally defned for steady state analyss of 3-phase unbalanced systems. Ths transformaton s the result of multplyng the transformaton matrx by the phasor representaton of unbalanced 3-phase system. A= a a a a (4.) where, a j 3 e V V V 0 3 a a a a V V V (4.3) The V 0, V and V stand for phasor presentaton of zero, poste and negate sequence components of phase-neutral oltage n the phase a, respectely. The V, V and V stands for phasor presentaton of oltages of phases a, b and c, respectely. The frst part of control strategy of shunt acte flter s based on computng of nstantaneous poste sequence of load sde currents and utlty sde oltages usng nstantaneous symmetrcal component theory. The objecte of compenton s to prode balanced supply current such that zero sequence component s zero. We therefore hae 0 (4.4) Ths guarantees that zero sequence current flowng through the neutral s zero n a three phase four wre system.

78 3 a a (4.5) The angle of the ector s then gen by tan 3 3 tan 3 3 (4.6) an angle If we now assume that the phase of the ector lags that of by, we get a a a a (4.7) Substtutng the alues of a and a,equaton (4.7) can be expanded as 3 3 ( ) j ( ) ( ) j ( ) (4.8) Equatng the angles, we can wrte from the aboe equaton tan k k tan k3 k4 (4.9) where k 3, k ( ) k3 3, k4 ( )

79 Usng the formula tan( tan tan tan tan Equaton (4.9) can be expanded as k k tan tan k3 k4 ( k3 ) tan k4 k3 k4 tan (4.0) Solng the aboe equaton we get 3 3 3 0 (4.) where tan 3 (4.) When the power factor angle s assumed to be zero, Equaton (4.) mples that the nstantaneous reacte power suppled by the source s zero. On the other hand, when ths angle s non-zero, the source supples a reacte power that s equal to tmes the nstantaneous power. The nstantaneous power n a balanced three-phase crcut s constant whle for an unbalanced crcut t has a double frequency component n addton to a dc alue. In addton, the presence of harmoncs adds to the ollatng component of the nstantaneous power.the objecte of the compentor s to supply the ollatng component such that the source supples the aerage alue of the load power. Therefore, pla (4.3)

80 where p la s the aerage power drawn by the load. Snce the harmonc component n the load does not requre any real power, the source only supples the real power requred by the load. Combnng equatons (4.4), (4.) and (4.3), 3 3 3 0 p 0 la (4.4) Assumng that the current are tracked wthout error, the Krchoffs current law(kcl) at PCC can be wrtten n terms of the reference currents as, fk lk sk (4.5) where k=a, b, c. Substtutng the aboe equaton n Equaton (4.4) and solng fa fb fc la lb lc p p p la la la (4.6) calculated. By usng these Equaton (4.6), reference compentor currents are 4.3 MODELING OF SHUNT ACTIVE FILTER Fgure 4.. From the hematc dagram of compented system gen n

8 The loop equaton for phase a (Upper loop) s, d L fa f +Rf fa+ - c=0 dt d R =- - + fa f c dt L fa f Lf Lf (4.7) The loop equaton for phase a (Lower loop) s, d fa R =- f - - c dt L fa L L f f f (4.8) d R - fa =- f - + S c -Sa c dt L fa L a L L f f f f (4.9) d R - fb =- f - + S c -Sb c dt L fb L b L L f f f f (4.0) d R - fc =- f - + S c -Sc c3 dt L fc L c L L f f f f (4.) Capactor Currents and s gen by, d C c = - = - Sa +S +Sc dt fa b fb fc (4.) d - - - C c = Sa +Sb +Sc dt fa fb fc (4.3) Then defnng a state ector of the state space equaton s gen as, x T = fa fb fc c c (4.4)

8 Combnng the Equatons (4.9) to (4.3), we get, d/dt fa fb fc c c = - Rf S - 0 0 a -Sa Lf Lf Lf - R f S 0-0 b -Sb Lf Lf Lf - R S 0 0 - f c -Sc Lf Lf Lf S S S C C C - a - b - c 0 0 - - - Sa Sb Sc 0 0 C C C fa fb fc c c + - 0 0 L f 0-0 L 0 0 - L f f (4.5) 4.3. Swtchng Control of DSTATCOM The shunt component of UPQC can be controlled n two ways, a) Trackng the shunt conerter reference current, when the shunt conerter current s used as feedback control arable. The load current s sensed and the shunt compentor reference current s calculated from t. The reference current s determned by calculatng the acte fundamental component of the load current and subtractng t from the load current. Ths control technque noles both the shunt acte flter and load current measurements. b) Trackng the supply current, when the supply current s used as the feedback arable. In ths case the shunt acte flter ensures that the supply reference current s tracked. Thus, the supply reference current s calculated rather than the current njected by the shunt acte flter. The supply current s often requred to be snusodal and n phase wth the supply oltage.

83 Snce the waeform and phase of the supply current s known, only ts ampltude needs to be determned. Also, when used wth a hysteress current controller, ths control technque noles only the supply current measurement. Thus, ths s a smpler to mplement method. Therefore t has been used n the UPQC smulaton model. 4.3. DC Voltage Control Usng PI Controller In Fgure 4., assume S and S are the status of the swtch n top and bottom half of an nerter leg. The swtch status, S= and S=0 mples that the top swtch of the nerter leg s closed and t connects the nerter leg to V c =V dc whle the bottom swtch n the me leg s open. Smlarly for S=0 and S=, the bottom swtch connects the nerter leg to V c = -V dc and the top swtch n the nerter leg s open. Therefore, through the nerter swtchng arrangements the nerter supples a oltage + V dc. We now hae to choose the control sgnal S= or 0 and S=0 or, such that approprate nerter connecton s acheed. DC oltage control usng PI controller s shown n Fgure 4..Any deaton of the capactor oltage from the reference s due to losses. The PI controller loops draws the loss from the ac system to hold the oltage constant. Fgure 4. DC oltage control usng PI controller

84 Dfferent current control technques are appled for trackng the reference current. They are mpled error control, hysteress band control, sldng mode controller, lnear quadratc regulator, deadbeat controller and pole shft controller. From the number of current-control technques, the hysteress control appears to be the most preferable for shunt acte flter applcatons. Therefore, n the UPQC smulaton model a hysteress controller has been used. The adantages of usng a hysteress controller are smpler mplementaton, enhanced system stablty, ncreased relablty and response speed. In hysteress control, the controlled current s montored and s forced to track the reference wthn the hysteress band. The nerter swtches are made to change ther states at nstances when the controlled current touches the upper or lower lmt of the hysteress band. The controlled current s forced to decrease when t reaches the upper lmt and to ncrease when t reaches the lower lmt. By alternately reersng the polarty of the dc capactor the controlled current s forced to alternately ncrease or decrease wthn the hysteress band followng the reference current. The narrower the hysteress band (smaller alues of h) the more accurate s the trackng, but ths also results n hgher swtchng frequency. If the current references are assumed to be composed from zero sequence components, the lne currents wll return through the ac neutral wre.in the splt capactor nerter topology, the current of each phase to flow ether through or through and to return through the ac neutral wre. The currents can flow n both drectons through the swtches and capactors.

85 When rses and decreases, but not wth equal rato because the poste and negate alues are dfferent and depend on the nstantaneous alues of the ac phase oltages. The nerse occurs when the dc oltage araton depends also on the shape of the current reference and the hysteress bandwdth. Therefore, the total dc oltage, as well as the oltage dfference wll ollate not only at the swtchng frequency, but also at the correspondng frequency of that s beng generated by the VSI. The swtches are controlled asynchronously to ramp the current through the nductor up and down so that t follows the reference. When the current through the nductor exceeds the upper hysteress lmt a negate oltage s appled by the nerter to the nductor. Ths causes the current n the nductor to decrease. Once the current reaches the lower hysteress lmt a poste oltage s appled by the nerter to the nductor and ths causes the current to ncrease and the cycle repeats. If a dynamc offset leel s added to both lmts of the Hysteress band, t s posle to control the capactor oltage dfference and to keep t wthn an acceptable tolerance margn. Normally 5 % of the load current s taken as Hysteress-band wdth. Hysteress current controller deres the swtchng sgnals of the nerter power swtches (IGBTs). The current controllers of the three phases are desgned to operate ndependently. Each current controller determnes the swtchng sgnals to ts nerter brdge. The swtchng logc for phase a,b and c s formulated as follows. For Phase a: If fa > ( fa * + hb) then upper swtch s OFF & lower swtch s ON. If fa < ( fa * - hb) then upper swtch s ON & lower swtch s OFF.

86 For Phase b: If fb > ( fb * + hb) then upper swtch s OFF & lower swtch s ON If fb < ( fb * - hb) then upper swtch s ON & lower swtch s OFF For Phase c: If fc > ( fc * + hb) then upper swtch s OFF & lower swtch s ON If fc < ( fc * - hb) then upper swtch s ON & lower swtch s OFF where hb s the wdth of the hysteress band around the reference current. 4.4 COMPUTATION OF REFERENCE VOLTAGE The seres component of UPQC s controlled to nject the approprate oltage between the pont of common couplng (PCC) and load, such that the load oltages become balanced, dstorton free and hae the desred magntude. Theoretcally the njected oltages can be of any arbtrary magntude and angle. Howeer, the power flow and dece ratng are mportant ssues that hae to be consdered when determnng the magntude and the angle of the njected oltage. Fgure 4.3 shows hematc dagram of a seres-compented dstrbuton system. In UPQC-Q the njected oltage s mantaned 90 degree n adance wth respect to the supply current, so that the seres compentor consumes no acte power n steady state. In second case UPQC-P the njected oltage s n phase wth both the supply oltage and current, so that the seres compentor consumes only the acte power, whch s delered by the shunt compentor through the dc lnk.

87 In the case of quadrature oltage njecton UPQC-Q the seres compentor requres addtonal capacty, whle the shunt compentor VA ratng s reduced as the acte power consumpton of the seres compentor s mnmsed and t also compentes for a part of the load reacte power demand. In UPQC-P, the seres compentor does not compente for any part of the reacte power demand of the load, and t has to be entrely compented by the shunt compentor. Also the shunt compentor must prode the acte power njected by the seres compentor. Thus, n ths case the VA ratng of the shunt compentor ncreases. The reference oltage for DVR s calculated by usng nstantaneous symmetrcal component theory. Z Z Three-Phase Three-Wre Nonlnear Loads Z C r C r C r L r L r L r AF Sh C d Fgure 4.3 Schematc dagram of a seres-compented dstrbuton system Let the source oltages n phase a,b and c are represented by V, V and V. The source s connected to the DVR by a feeder wth an

88 mpedance of R+jX. The DVR s represented by oltage sources fa, fb and fc. Usng Krchoffs oltage law at PCC we get, V V V (4.6) t f l where l s the load oltage, t s the oltage at the PCC, and f s the oltage njected by the seres flter. The nstantaneous symmetrcal components for, and are defned as, a0 a0 a a 3 a a a a (4.7) For balanced currents the component a0 s equal to zero,and the component a s complex conjugate of a. The me transformaton s appled for oltages. The man am of the DVR s to make the load oltage a strctly poste sequence. Furthermore, the DVR must not supply or absorb any real power. To force l to be poste sequence f must cancel the zero-and negate-sequence components of t. Here the DVR must operate n zero power mode, P P V I V I V I (4.8) la ta ta tb tc where p ta s the aerage alue of the nstantaneous power enterng the termnal and p la s the nstantaneous power suppled to the load. Equaton (4.8) can be rewrtten as, p (4.9) a 0 a 0 a a a a

89 Snce the desred load oltages are balanced snusods and the currents flowng through the seres compentor are also balanced (shunt compentor acton), the nstantaneous UPQC output power s constant and ths must be equal to the aerage power enterng the UPQC (losses are neglected). Let us denote the phasor load oltage as V V (4.30) l Snce the load oltage s strctly poste sequence, the aerage power to the load s also poste sequence. Therefore, P cos( ) la V I l (4.3) Therefore, V (4.3) * * * * f 0 Vt 0, V f V Vt, V f Vt An nerse symmetrcal component transformaton of aboe equaton produces the reference phasor oltages of the DVR. The nstantaneous phase oltages then can be obtaned from the phasor oltages. Once the nstantaneous load oltages are obtaned, the reference seres flter oltages are obtaned usng the followng expresson, V V V (4.33) f l t In the case when the UPQC-P control strategy s appled, the njected oltage s n phase wth the supply oltage. Hence, the load oltage s n phase wth the supply oltage and there s no need for calculatng the angle of the reference load oltage. Thus, the reference load oltage s determned by multplyng the reference magntude (whch s constant) wth the snusodal template phase-locked to the supply oltage. Then, the reference seres flter oltage s obtaned usng the Equaton (4.33).

90 Comparng the technques for calculatng the reference oltage of the seres compentor, presented aboe, t can be concluded that the UPQC-P algorthm has the smplest mplementaton (t noles ery lttle computaton). In the UPQC-P case the oltage ratng of the seres compentor s consderably reduced. Also, the UPQC-Q compenton technque does not work n the case when the load s purely resste. Therefore, the UPQC-P control strategy has been used n the UPQC smulaton model. 4.5 MODELING OF SERIES ACTIVE FILTER The ba purpose of the DVR s to nject a set of three phase oltages such that the oltage l at the crtcal load termnal s balanced wth a pre-specfed magntude and phase angle. Fgure 4.4 Sngle-phase equalent crcut of DVR

9 Let ths oltage be denoted by l, then applyng Krchoffs Voltage Law(KVL), the DVR reference oltage k s gen by V V V (4.34) k l t Once the reference oltage s generated, t s tracked n a Hysteress band state feedback control. Consder the DVR sngle-phase equalent crcut shown n Fgure 4.4. In ths Fgure, the nerter output oltage s represented by the dc oltage ( dc ) tmes the swtchng functon u =. Also, the transformer leakage nductance s denoted by L d and R d represents the swtchng losses. Defnng the system state ector as equaton of the system s, T x = k d, the state space. x =Ax+Bu c +D l (4.35) where, u c s the contnuous-tme equalent of u and A= 0 C k R - - d L L d d B= 0 - dc L d - D= C k 0 (4.36) 4.5. Swtchng Control of DVR In the state feedback control, u c s gen by u =-K x-x c ref (4.37)

9 where, K s the feedback gan matrx and x ref contans the references of the state ector. The nerter swtchng logc s then If u c >h, then u=+, If u c <h, then u=-, where, h s a small poste constant that defnes the Hysteress band. 4.6 MODELING OF UPQC The equalent crcut of the UPQC compented system s shown n Fgure 4.5. The nductance L f represents the leakage nductance of the shunt transformer and smlarly the nductance L d s the leakage nductance of the seres transformer. Fgure 4.5 Equalent crcut of the UPQC compented system The swtchng losses of an nerter and the copper loss of the connectng transformer are represented by a resstance R f and R d. The ron losses of the transformer are neglected. The load s assumed to be an RL load

93 characterzed by R and L. The oltage sources V dc and V dc are the oltage V dc across the d.c. storage capactor multpled by the swtch functon of the shunt and seres nerters respectely. The purpose of UPQC control s to determne these swtch functons. Let us defne the followng state ector, x T = (4.38) 3 4 t d The state-space equaton of the crcut then can be wrtten as, x Ax B VS BU (4.39) A R L 0 0 0 0 L Rf 0 0 0 L L 0 f R 0 0 0 0 L L R 0 0 0 d 0 L 0 0 0 C C C 0 0 0 0 C C d f L d B 0 0 L Vdc 0 0 L f 0 0 0 B 0 0 Vdc L 0 0 0 0 0 0 d u u u dc V dc V V dc (4.40)

94 In general the control arables are njected current f, nserted oltage d, the termnal oltage t along wth the two capactor currents. Furthermore, the presence of the load current n the state arable feedback s undesrable as the load may change at any tme. We must therefore perform a sutable state transformaton such that all the pertnent sgnals appear as state arables. One sutable transformaton s gen by z f c s s c d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (4.4) The state equaton can be transformed nto, Z S PAP Z PB V PB U (4.4) 4.6. Swtchng control of UPQC Assumng that we hae full control oer u, an nfnte tme Lnear Quadratc Regulator(LQR) s desgned. The control law s defned as, u = -K(z-z ref ) (4.43) where z ref s the desred state ector. The control sgnal computed so far usng the LQR s a contnuous sgnal. In practce the control sgnal u s the swtchng decson of the VSI of the UPQC and s thus constraned to be +. The swtchng s then based on u = -hys(k(z-z ref )) (4.44)

95 Here the hys functon s defned for a small lmt around zero. If u >lm then hys(u)= Else f u <lm then hys(u)=- The selecton of lm determnes the swtchng frequency whle trackng the reference. Ths swtchng control ges good conergence to the trackng band as well as good stablty of trackng. 4.6. Voltage Control of the DC Bus For a oltage source nerter the dc oltage needs to be mantaned at a certan leel to ensure the dc-ac power transfer. Because of the swtchng and other power losses nsde UPQC, the oltage leel of the dc capactor wll be reduced f t s not compented. Thus, the dc lnk oltage control unt s meant to keep the aerage dc bus oltage constant and equal to a gen reference alue. The dc lnk oltage control s acheed by adjustng the small amount of real power absorbed by the shunt nerter. Ths small amount of real power s adjusted by changng the ampltude of the fundamental component of the reference current. The ac source prodes some acte current to recharge the dc capactor. Thus, n addton to reacte and harmonc components, the reference current of the shunt acte flter has to contan some amount of acte current as compentng current. Ths acte compentng current flowng through the shunt acte flter regulates the dc capactor oltage. Usually a PI controller s used for determnng the magntude of ths compentng current from the error between the aerage oltage across the dc capactor and the reference oltage. The PI controller estmates the P loss component and determnes the duty cycle of the chopper to mantan the

96 capactor oltage at a prespecfed set reference oltage. The PI controller has a smple structure and fast response. Thus, a PI controller has been used for dc lnk oltage control n the UPQC smulaton model. The set alues are taken approxmately.3 tmes the peak AC oltage of the source oltage for compentor to work tsfactorly. 4.7 SIMULATION RESULTS Ths secton presents the detals of the smulaton carred out to demonstrate the effecteness of the proposed control strategy for the acte flter for harmonc current flterng, reacte power compenton, load current balancng, load oltage compenton and neutral current elmnaton. In the proposed work, the reference compentor currents and oltages are generated usng the nstantaneous symmetrcal component theory to achee the load current compenton and reacte power compenton. The swtchng control of the oltage source nerter based on hysteress current controller used n the DSTATCOM and DVR s presented. The swtchng harmoncs due to the VSI of the DSTATCOM and DVR are elmnated. The smulaton results before and after the compenton s presented. The test system conssts of a three phase supply connected to a set of non-lnear loads namely, a 3-phase dode-brdge rectfer wth RL load. The alues of the crcut elements used n the smulaton are gen n Table 4.. The smulaton was conducted under unbalanced dstorted source condtons. The comprehense smulaton results are presented below.

97 Table 4. System parameters of UPQC System parameters Specfcatons System frequency 50 Hz Dc lnk capactance C =4400 F,C =4400 F Dc-lnk oltage 600V Non-Lnear Load R =0 ohms, L=5 mh,.6 KVA Shunt Inerter Flter L=5.5 mh, C= µf Seres Inerter Flter L=5.5 mh, C= µf Swtchng Frequency 9730 Hz PWM Control Hysteress control Couplng transformer 3.3 KVA 4.7. Compenton of current harmoncs Fgure 4.6 shows the smulaton results of the system wth the proposed approach. Fgure.4.6 (a) shows the waeforms of the source oltages before compenton. The source oltage s ntentonally assumed to be much dstorted wth 7th harmonc and 3th harmoncs to better show the behaor of the acte flter under seere condtons. The Total harmonc Dstorton (THD) of the dstorted three-phase load oltages are 4.5%, 35.7% and 40.36% respectely. Fgure.4.6 (b) shows the waeforms of the load oltages before compenton Fgure.4.6(c) shows the waeforms of the load oltages after compenton usng seres acte flter.

98 The THD of load oltages n phase A, B and C has reduced to 5.98%, 5.7% and 5.86 % respectely. After the nstallaton of the UPQC, the three phase load oltage s balanced and snusodal and t s n phase wth the supply oltage. The resultng THD, showng the successful performance of the proposed control approach. The reached THD s suffcently close to the acceptable leel suggested by IEEE-59 standards. Fgure. 4.6 (a) Source Voltages before Compenton Fgure. 4.6 (b) Load Voltages before Compenton Fgure 4.6 (c) Load Voltages after Compenton wth UPQC 4.7. Compenton of Load Voltage Fgure.4.7(a) shows the waeforms of the load currents before compenton usng shunt acte flter. In ths case the smplest control system that s a hysteress controller for the shunt compentor s used. There s a hysteress controlled Inerter n each phase accompaned by a Hgh Pass Flter (HPF) to suppress the hgh frequency rpples ntroduced by the nerter.

99 Fgure. 4.7(b) shows the Compentng current of shunt acte flter. Fgure.4.7(c) shows the waeforms of the source currents after compenton usng shunt acte flter The THD of the dstorted three-phase lne currents (I a, I b & I c ) are 37.35%, 8.% and 33.74% respectely. The THD of current n phase A, B and C has reduced to 5.%, 4.66% and 4.98% respectely. The reached THD s suffcently close to the acceptable leel suggested by IEEE-59 standards. Fgure 4.7 (a) Load current before Compenton Fgure 4.7 (b) Compentng current Fgure 4.7 (c) Source current after Compenton After the nstallaton of the UPQC, the three phase source current s balanced and snusodal and t s n phase wth the supply oltage. Source delers constant real power and zero reacte power to the load whch ndcates that the source sde power factor s mantaned at unty.

00 4.8 CONCLUSION A new control strategy for UPQC s presented. Ths method s easy to mplement and t has reasonable dynamc response. The control strategy generates reference compentng currents of shunt acte flter and reference compentng oltages of seres acte flter n such a manner that the source sde currents and load sde oltages become snusodal and balanced n arous power qualty condtons. The analytcal expressons and smulaton results explan the crcut operaton and the aldty of presented method.