F:/Academic/22 Refer/WI/ACAD/10 SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGG. & MANAGEMENT (Following Paper-ID and Roll No. to be filled by the student in the Answer Book) PAPER ID: 3301 Roll No. B.Tech. SEM I (CS-11, 12; ME-11, 12, 13, & 14) MID SEMESTER EXAMINATION, 2011-12 ELECTRONICS ENGINEERING (EEC-101) Time: 3 Hours Max. Marks: 100 Not e : 1. At t e m pt all s e c t ions. 2. As s um e s uit able dat a, whe re ne c e s s ary and s pe c ify. SECTION-A At t em p t (Q1 ) a t on e p la ce w it h a ll t h e p a rt s (1 )-(1 0) in t h e s a m e ord er Q1. Attempt all the parts of this question. All the parts carry equal marks. It contains Short answer type questions. [2 X 10 = 20 Marks] (1) At what value of applied voltage the forward current reaches to 2mA in a Si pn junction diode at room temperature for a leakage current of 50nA. (2) Compute TUF for a half-wave rectifier. (3) Temperature coefficient of avalanche diodes is positive. Explain this statement. (4) A 100V, 50Hz power supply is provided at the input of the full wave rectifier. Given R L =150Ω with a shunt capacitor of 1000 µf. Find the value of ripple factor. Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 1 of 8
(5) The collector and base currents of a BJT are measured as I C =2mA, I B =50 µa and I CBO =2µA. Determine the value of β & I E at room temperature. (6) Define h fe and h ie for a BJT CE amplifier. (7) Calculate the output voltage, V 0 for the following Op-Amp Summer: V 1 = -1.0V, V 2 = 2.5V, V 3 = 3.5V; R 1 = 5KΩ, R 2 = 10K Ω, R 3 = 15K Ω, R f = 100KΩ. (8) Draw the circuit diagram for an Op-Amp used as: (a) Scale Changer; (b) Square Wave to Triangular Wave Converter. (9) Define Pinch-Off Voltage for JFET. (10) Mention briefly any four important differences between a BJT and a FET. SECTION-B Q2. Attempt any three parts of the following: [3 x 10 = 30 Marks] (a) (i) Differentiate between static and dynamic resistance of a pnjunction diode. How is average ac resistance a special case of dynamic resistance? (ii) Graphically discuss the variation of diode capacitance with the applied bias. (iii)determine the drop across each resistor in the following circuit: Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 2 of 8
+15V 5.8K Si Ge 2.5K -5.0V [5+2+3] (b) (i) Construct the output characteristics for a BJT amplifier in CE configuration and indicate the various regions of operation. (ii) Draw the self bias circuit of BJT. Discuss in detail how stability is improved in this circuit. [3+7] (c) Write short notes on any five of the following: (i) BJT Emitter follower; (ii) Op-Amp Phase Inverter; (iii)jfet Drain characteristics; (iv) CMRR; (v) JFET Voltage variable resistor; (vi) Drain to source saturation current; (vii)op-amp Offset Voltage. [5X2] (d) (i) Discuss any five properties of an ideal Op-amp. (ii) Derive the expression for closed loop gain of an Op-Amp Non- Inverting amplifier. Draw the circuit diagram of an Op-Amp Voltage Follower. [5+4+1] (e) (i) Draw the block diagram of a CRO. (ii) Mention the basic principle of operation of CRO and some of its applications. [5+3+2] Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 3 of 8
SECTION-C Attempt all questions. All questions carry equal marks. [5 x 10 = 50 Marks] Q3. Attempt any two parts: [2 x 5 = 10 Marks] (a) Determine the value of V L, I L, I Z, I R and P z in the following configuration. [1x5] (b) Determine V i and i dc in the following network for a given sinusoidal input signal of 60 Hz and a Si diode with internal resistance of 20Ω. Also estimate the rectification efficiency. [2+1+2] (c) Sketch the output v 0 for the given input voltage in the following network. Also name this circuit. [5] Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 4 of 8
Q4. Attempt any two parts: [2 x 5 = 10 Marks] (a) Answer the following very briefly in reference to a BJT: (i) Mention the major difference between a unipolar and a bipolar device. (ii) How must the two transistor junctions be biased for proper transistor amplifier action? What is the name of this particular mode? (iii)which of the two transistor currents are relatively close in magnitude & why? (iv) Which of the transistor region is heavily doped and why? (v) What do you understand by Q-point? [1X5] (b) Determine I C, V E, V B and V C for the following circuit. Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 5 of 8 [2+3]
(c) For an n-channel JFET, the experimentally measured data are as follows: For V GS = 2.5V, I D = 1.8 ma and for V GS = 5V, I D = 0.3 ma. Find I DSS and V P. Hence, trace the transfer characteristics. [2+3] Q5. Attempt any one part: [1 x 10 = 10 Marks] (a) A Ge transistor with β = 49 has a self biasing arrangement with V CC = 10 V, R C = 1 KΩ, V CE = 5 V, I C = 4.9 ma, V BE = 0.2V and the stability factor S is desired to be 10. Obtain the values of R 1, R 2 and R E to complete the design. [4+6] (b) For a CE amplifier circuit with h-parameters: h ie = 2 kω, h re = 6 x 10-4, h fe = 50, h oe = 25µ x A/V, Load resistance R L = 4 kω and Source resistance R S = 10 kω. Trace the small signal hybrid model and hence compute A V, A i, R i and R o. [2x5] Q6. Attempt any two parts: [2 x 5 = 10 Marks] (a) Determine the (i) Output Voltage; (ii) Closed Loop Voltage Gain (db); of the Op-Amp network shown in the figure below: [3+2] 56K 68K 12.0mV 2.2K 4.4K - - ++ + Vo Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 6 of 8
(b) Calculate the Output Voltage (Vo) of the following network in terms of V a, V b & V c. Assume Op-Amp to be an ideal one. 12R +Va -2Vb 4R 2R - + Vo +2Vc 6R [5] (c) In the following FET configuration determine: I D, V GS, V DS and V P. [1+1+1+2] Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 7 of 8
Q7. Attempt any one part: [1 x 10 = 10 Marks] (a) Explain the operation of an n-channel Enhancement type MOSFET with appropriate structures & various characteristics curves (Drain & Transfer Curves). [5+5] (b) Draw the block diagram of digital multimeter. Mention its advantages and applications. [5+5] X Mr. Vikrant Bhateja & Mr. A. K. Shukla Page 8 of 8
F:/Academic/22 Refer/WI/ACAD/10 SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGG. & MANAGEMENT (Following Paper-ID and Roll No. to be filled by the student in the Answer Book) PAPER ID: 3301 Roll No. B.Tech. SEM I (CS-11, 12; ME-11, 12, 13, & 14) MID SEMESTER EXAMINATION, 2011-12 ELECTRONICS ENGINEERING (EEC-101) Time: 3 Hours Max. Marks: 100 Not e : 1. At t e m pt all s e c t ions. 2. As s um e s uit able dat a, whe re ne c e s s ary and s pe c ify. SECTION-A At t em p t (Q1 ) a t on e p la ce w it h a ll t h e p a rt s (1 )-(1 0) in t h e s a m e ord er Q1. Attempt all the parts of this question. All the parts carry equal marks. It contains Short answer type questions. [2 X 10 = 20 Marks] (1) Compute the dynamic resistance for a Si diode at room temperature for an applied reverse bias of 0.28V for a leakage current of 50nA. (2) Compute rectification efficiency for a half-wave rectifier. (3) Temperature coefficient of zener diodes is negative. Explain this statement. (4) Determine the value of ripple factor for a C-Filter connected across a half wave rectifier with the following specifications: f=50hz, R L =1KΩ, C=500 µf. Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 1 of 8
(5) Determine the values of I C and I CEO at a room temperature for a BJT with I B =15 µa, I CBO =2.5µA and β =90. (6) Define h re and h oe for a BJT CE amplifier. (7) Calculate the output voltage, V 0 for the following Op-Amp Subtractor: V 1 = 1V, V 2 = 2V; R 1 = R 2 = 5KΩ, R 3 = R f =1M. (8) Draw the circuit diagram for an Op-Amp used as: (a) Constant Gain Multiplier; (b) Triangular Wave to Square Wave Converter. (9) Define g m for a JFET. (10) Use Shockley s equation to deduce the expression for transconductance. SECTION-B Q2. Attempt any three parts of the following: [3 x 10 = 30 Marks] (a) (i) Differentiate between static and dynamic resistance of a pnjunction diode. How is average ac resistance a special case of dynamic resistance? (ii) Graphically discuss the variation of diode capacitance with the applied bias. (iii)determine the drop across each resistor in the following circuit: Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 2 of 8
+15V 5.8K Si Ge 2.5K -5.0V [5+2+3] (b) (i) Construct the output characteristics for a BJT amplifier in CE configuration and indicate the various regions of operation. (ii) Draw the self bias circuit of BJT. Discuss in detail how stability is improved in this circuit. [3+7] (c) Write short notes on any five of the following: (i) BJT Emitter follower; (ii) Op-Amp Phase Inverter; (iii)jfet Drain characteristics; (iv) CMRR; (v) JFET Voltage variable resistor; (vi) Drain to source saturation current; (vii)op-amp Offset Voltage. [5X2] (d) (i) Discuss any five properties of an ideal Op-amp. (ii) Derive the expression for closed loop gain of an Op-Amp Non- Inverting amplifier. Draw the circuit diagram of an Op-Amp Voltage Follower. [5+4+1] (e) (i) Draw the block diagram of a CRO. (ii) Mention the basic principle of operation of CRO and some of its applications. [5+3+2] Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 3 of 8
SECTION-C Attempt all questions. All questions carry equal marks. [5 x 10 = 50 Marks] Q3. Attempt any two parts: [2 x 5 = 10 Marks] (a) Determine the value of V L, I L, I Z, I R and P z in the following configuration. [1x5] (b) Determine V i and i dc in the following network for a given sinusoidal input signal of 60 Hz and a Si diode with internal resistance of 20Ω. Also estimate the rectification efficiency. [2+1+2] (c) Sketch the output v 0 for the given input voltage in the following network. Also name this circuit. [5] Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 4 of 8
Q4. Attempt any two parts: [2 x 5 = 10 Marks] (a) Answer the following very briefly in reference to a BJT: (i) Mention the major difference between a unipolar and a bipolar device. (ii) How must the two transistor junctions be biased for proper transistor amplifier action? What is the name of this particular mode? (iii)which of the two transistor currents are relatively close in magnitude & why? (iv) Which of the transistor region is heavily doped and why? (v) What do you understand by Q-point? [1X5] (b) Determine I C, V E, V B and V C for the following circuit. Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 5 of 8 [2+3]
(c) For an n-channel JFET, the experimentally measured data are as follows: For V GS = 2.5V, I D = 1.8 ma and for V GS = 5V, I D = 0.3 ma. Find I DSS and V P. Hence, trace the transfer characteristics. [2+3] Q5. Attempt any one part: [1 x 10 = 10 Marks] (a) A Ge transistor with β = 49 has a self biasing arrangement with V CC = 10 V, R C = 1 KΩ, V CE = 5 V, I C = 4.9 ma, V BE = 0.2V and the stability factor S is desired to be 10. Obtain the values of R 1, R 2 and R E to complete the design. [4+6] (b) For a CE amplifier circuit with h-parameters h ie = 2 kω, h re = 6 x 10-4, h fe = 50, h oe = 25µ x A/V, Load resistance R L = 4 kω and Source resistance R S = 10 kω. Trace the small signal hybrid model and hence compute A V, A i, R i and R o. [2x5] Q6. Attempt any two parts: [2 x 5 = 10 Marks] (a) Determine the (i) Output Voltage; (ii) Closed Loop Voltage Gain (db); of the Op-Amp network shown in the figure below: [3+2] 56K 68K 12.0mV 2.2K 4.4K - - ++ + Vo Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 6 of 8
(b) Calculate the Output Voltage (Vo) of the following network in terms of V a, V b & V c. Assume Op-Amp to be an ideal one. 12R +Va -2Vb 4R 2R - + Vo +2Vc 6R [5] (c) In the following FET configuration determine: I D, V GS, V DS and V P. [1+1+1+2] Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 7 of 8
Q7. Attempt any one part: [1 x 10 = 10 Marks] (a) Explain the operation of an n-channel Enhancement type MOSFET with appropriate structures & various characteristics curves (Drain & Transfer Curves). [5+5] (b) Draw the block diagram of digital multimeter. Mention its advantages and applications. [5+5] X Mr. Vikrant Bhateja & Mr. A.K. Shukla Page 8 of 8