STF1N6M2 N-channel 6 V,.56 Ω typ., 7.5 A MDmesh II Plus low Q g Power MOSFET in a TO-22FP package Features Datasheet production data Order code V DS @ T Jmax R DS(on) max I D STF1N6M2 65 V.6 Ω 7.5 A TO-22FP 1 2 3 Extremely low gate charge Lower R DS(on) x area vs previous generation Low gate input resistance 1% avalanche tested Zener-protected Applications Figure 1. Internal schematic diagram Switching applications Description This device is an N-channel Power MOSFET developed using a new generation of MDmesh technology: MDmesh II Plus low Q g. This revolutionary Power MOSFET associates a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. AM15572v1 Table 1. Device summary Order code Marking Package Packaging STF1N6M2 1N6M2 TO-22FP Tube May 213 DocID24712 Rev 1 1/13 This is information on a product in full production. www.st.com 13
Contents STF1N6M2 Contents 1 Electrical ratings............................................ 3 2 Electrical characteristics..................................... 4 2.1 Electrical characteristics (curves)................................ 6 3 Test circuits.............................................. 8 4 Package mechanical data..................................... 9 5 Revision history........................................... 12 2/13 DocID24712 Rev 1
STF1N6M2 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ± 25 V I D Drain current (continuous) at T C = 25 C 7.5 (1) A I D Drain current (continuous) at T C = 1 C 4.9 (1) A I (1) DM Drain current (pulsed) 3 (1) A P TOT Total dissipation at T C = 25 C 25 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 5 V ISO T stg Storage temperature T j Max. operating junction temperature 1. Pulse width limited by safe operating area 2. I SD 7.5 A, di/dt 4 A/μs; V DS peak < V (BR)DSS, V DD =4 V 3. V DS 48 V Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s, T C =25 C) 25 V - 55 to 15 C Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max 5 C/W R thj-amb Thermal resistance junction-ambient max 62.5 C/W Table 4. Avalanche characteristics Symbol Parameter Value Unit I AR E AS Avalanche current, repetetive or not repetetive (pulse width limited by T jmax ) Single pulse avalanche energy (starting T j =25 C, I D = I AR ; V DD =5) 2.5 A 11 mj DocID24712 Rev 1 3/13
Electrical characteristics STF1N6M2 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage drain current (V GS = ) I D = 1 ma, V GS = 6 V V DS = 6 V V DS = 6 V, T C =125 C Gate-body leakage I GSS V current (V DS = ) GS = ± 25 V ±1 μa V GS(th) Gate threshold voltage V DS = V GS, I D = 25 μa 2 3 4 V Static drain-source R DS(on) V on-resistance GS = 1 V, I D = 4 A.56.6 Ω 1 1 μa μa Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 4 - pf C oss Output capacitance V DS = 1 V, f = 1 MHz, - 22 - pf C rss V GS = Reverse transfer capacitance -.84 - pf C (1) Equivalent output oss eq. capacitance V DS = to 48 V, V GS = - 83 - pf R G Intrinsic gate resistance f = 1 MHz open drain - 64 - Ω Q g Total gate charge V DD = 48 V, I D = 7.5 A, - 13.5 - nc Q gs Gate-source charge V GS = 1 V - 2.1 - nc Q gd Gate-drain charge (see Figure 15) - 7.2 - nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from to 8% V DSS Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time V DD = 3 V, I D = 3.75 A, - 8.8 - ns t r Rise time R G = 4.7 Ω, V GS = 1 V - 8 - ns t d(off) Turn-off delay time (see Figure 14 and - 32.5 - ns t f Fall time Figure 19) - 13.2 - ns 4/13 DocID24712 Rev 1
STF1N6M2 Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 7.5 A I (1) SDM Source-drain current (pulsed) - 3 A V (2) SD Forward on voltage I SD = 7.5 A, V GS = - 1.6 V t rr Reverse recovery time - 27 ns Q rr Reverse recovery charge I SD = 7.5 A, di/dt = 1 A/μs V DD = 6 V (see Figure 16) - 2 nc I RRM Reverse recovery current - 14.4 A t rr Reverse recovery time I SD = 7.5 A, di/dt = 1 A/μs - 376 ns Q rr Reverse recovery charge V DD = 6 V, T j = 15 C - 2.8 nc I RRM Reverse recovery current (see Figure 16) - 15 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 3 μs, duty cycle 1.5% DocID24712 Rev 1 5/13
Electrical characteristics STF1N6M2 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ID (A) AM15822v1 1 1.1 Operation in this area is Limited by max RDS(on) Tj=15 C Tc=25 C Single pulse.1.1 1 1 1 VDS(V) 1µs 1µs 1ms 1ms Figure 4. Output characteristics Figure 5. Transfer characteristics ID (A) 14 12 VGS=7, 8, 9, 1V 6V AM15823v1 ID (A) 14 12 VDS=18V AM15824v1 1 1 8 8 6 4 5V 6 4 2 4V 5 1 15 2 VDS(V) Figure 6. Gate charge vs gate-source voltage VGS (V) 12 1 8 6 4 VDS VDD=48V ID=7.5A AM15825v1 VDS (V) 5 4 3 2 2 2 4 6 8 1 VGS(V) Figure 7. Static drain-source on-resistance RDS(on) (Ω) VGS=1V.59.58.57.56 AM15826v1 2 1.55 2 4 6 8 1 12 Qg(nC).54 1 2 3 4 5 6 7 ID(A) 6/13 DocID24712 Rev 1
STF1N6M2 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs. temperature C (pf) AM15827v1 VGS(th) (norm) ID=25 µa AM15828v1 1 Ciss 1.1 1 1. 1 Coss.9 1 Crss.8.1.1 1 1 1 VDS(V).7-5 -25 25 5 75 1 125 TJ( C) Figure 1. Normalized on-resistance vs temperature RDS(on) (norm) 2.5 2.3 2.1 1.9 1.7 1.5 ID=4 A 1.3 1.1.9.7.5-5 -25 25 AM15829v1 5 75 1 125 TJ( C) Figure 12. Normalized V DS vs temperature VDS (norm) 1.11 1.9 1.7 1.5 1.3 1.1.99.97.95.93-5 ID=1mA -25 25 5 75 1 125 AM15831v1 TJ( C) Figure 11. Source-drain diode forward characteristics VSD (V) 1.4 1.2 1.8.6.4.2 TJ=15 C TJ=-5 C TJ=25 C AM1583v1 1 2 3 4 5 6 7 ISD(A) Figure 13. Output capacitance stored energy Eoss(µJ) 3 2 1 AM15832v1 1 2 3 4 5 6 VDS(V) DocID24712 Rev 1 7/13
Test circuits STF1N6M2 3 Test circuits Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit VDD VGS VD RG RL D.U.T. 22 μf 3.3 μf VDD Vi=2V=VGMAX 22 μf 12V IG=CONST 2.7kΩ 47kΩ 1Ω 1nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM1468v1 AM1469v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=1μH 3.3 1 μf μf VDD VD ID L 22 μf 3.3 μf VDD G RG S Vi D.U.T. AM147v1 Pw AM1471v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform ton toff tdon tr tdoff tf 9% 1% VDS 1% 9% VGS 9% 1% AM1473v1 8/13 DocID24712 Rev 1
STF1N6M2 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DocID24712 Rev 1 9/13
Package mechanical data STF1N6M2 Table 9. Dim. TO-22FP mechanical data mm Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E.45.7 F.75 1 F1 1.15 1.7 F2 1.15 1.7 G 4.95 5.2 G1 2.4 2.7 H 1 1.4 L2 16 L3 28.6 3.6 L4 9.8 1.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 1/13 DocID24712 Rev 1
STF1N6M2 Package mechanical data Figure 2. TO-22FP drawing 71251_Rev_K_B DocID24712 Rev 1 11/13
Revision history STF1N6M2 5 Revision history Table 1. Document revision history Date Revision Changes 29-May-213 1 First release. 12/13 DocID24712 Rev 1
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