PI6LC48P25104 Single Output LVPECL Clock Generator

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Features ÎÎSingle differential LPECL output ÎÎOutput frequency range: 145MHz to 187.5MHz ÎÎRMS phase jitter @ 156.25MHz, using a 25MHz crystal (12kHz - 20MHz): 0.3ps (typical) ÎÎFull 3.3 or 2.5 supply modes ÎÎCommercial and industrial operating temperature ÎÎAvailable in lead-free package: 8-TSSOP Description The PI6LC48P25104 is a single output LPECL synthesizer optimized to generate Ethernet reference clock frequencies and is a member of Pericom s HiFlex family of high performance clock solutions. Using a 25MHz, it can generate 156.25MHz, or 187.5MHz output. Using other crystal frequencies, it can generate other popular frequencies for networking and server storage systems. The PI6LC48P25104 uses Pericom s proprietary low phase noise PLL technology to achieve ultra low phase jitter, so it is ideal for SATA/SAS or Ethernet interface in all kind of systems. Applications ÎÎNetworking systems ÎÎServers and Storage systems Block Diagram Pin Configuration XTAL_IN XTAL_OUT OSC Freq_SEL PFD /M CO /N CLK CLK# DDA GND XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 DD CLK CLK# Freq_SEL 1

Pinout Table Pin No. Pin Name I/O Type Description 1 DDA Power Analog Power Supply 2 GND Power Ground 3, 4 XTAL_OUT, XTAL_IN Crystal 5 Freq_SEL Input Pull Down Crystal Input and Output 6, 7 CLK#, CLK Output Output Clock 8 DD Power Core Power Supply "LOW", output is multiplied by 6.25, "HIGH", output is multiplied by 7.5. Output Frequency Table Xtal Frequency (MHz) Freq_SEL Output Frequency (MHz) 20 1 150 21.25 1 159.375 24 0 150 0 156.25 25 1 187.5 25.5 0 159.375 30 0 187.5 Typical Crystal Requirement Parameter Minimum Typical Maximum Units Mode of Oscillation Fundamental Frequency Freq_SEL = 0 23.2 30 Freq_SEL = 1 19.33 25 MHz Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pf Drive Level 1 mw Recomended Crystal Specification Pericom recommends: a) FL2500047, SMD 3.2x2.5(4P), 25MHz, CL=18pF, +/-20ppm http://www.pericom.com/pdf/datasheets/se/fl.pdf b) b) FY2500091, SMD 5x3.2(4P), 25MHz, CL=18pF, +/-30ppm http://www.pericom.com/pdf/datasheets/se/fy_f9.pdf 2

Maximum Ratings (Over operating free-air temperature range) Note: Storage Temperature... -65ºC to+155ºc Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This Ambient Temperature with Power Applied...-40ºC to+85ºc is a stress rating only and functional operation of the device 3.3 Analog Supply oltage...-0.5 to +3.6 at these or any other conditions above those indicated in ESD Protection (HBM)... 2000 the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics Power Supply DC Characterisitcs, ( DD = DDA, T A = -40 to 85ºC) Symbol Parameter Condition Min. Typ Max Units DD, DDA Core, Analog Supply oltage 3.135 3.3 3.465 DD, DDA Core, Analog Supply oltage 2.375 2.5 2.625 I GND Power Supply Current 70 ma I DDA Analog Supply Current 25 ma LPECL DC Electrical Characteristics Symbol Parameter Condition Min. Typ Max Units OH Output High oltage (1) DD = 3.3 1.9 2.4 DD = 2.5 1.1 1.6 OL Output Low oltage (1) DD = 3.3 1.2 1.6 DD = 2.5 0.4 0.8 Note: 1. LPECL Termination: Source 150ohm to GND and 100ohm across CLK and CLK#. LPECL AC Electrical Characteristics LPECL Termination: Source 150ohm to GND and using 0.01uF ac-coupled to 50ohm to GND Symbol Parameter Condition Min.. Typ. Max Units f OUT Output Frequency 145 125 187.5 MHz t jit(ø) RMS Phase Jitter, 156.25MHz, (12kHz - 20MHz) 0.30 ps (Random) (1) 187.5MHz, (12kHz - 20MHz) 0.33 ps t R / t F Output Rise/Fall Time 20% to 80% 400 ps o DC Output Duty Cycle 48 52 % Note: 1. Please refer to the Phase Noise Plots. 3

Phase Noise Plots f OUT = 156.25MHz f OUT = 187.5MHz LPECL Test Circuit 4

Power Supply Filtering Techniques As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. To achieve optimum jitter performance, power supply isolation is required. The PI6LC48P25104 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. DD and DDA should be individually connected to the power supply plane through vias, and 0.1μF bypass capacitors should be used for each pin. Figure below illustrates this for a generic DD pin and also shows that DDA requires that an additional 10Ω resistor along with a 10μF bypass capacitor be connected to the DDA pin. Crystal Input Interface The clock generator has been characterized with 18pF parallel resonant crystals. The capacitor values shown in the figure below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. 5

LCMOS to XTAL Interface The XTAL_IN input can accept a single-ended LCMOS signal through an AC coupling capacitor. A general interface diagram is shown in the figure below. The XTAL_OUT pin can be left floating. The input edge rate can be as slow as 10ns. For LCMOS signals, it is recommended that the amplitude be reduced from full swing to half swing in order to prevent signal interference with the power rail and to reduce noise. This configuration requires that the output impedance of the driver (Ro) plus the series resistance (Rs) equals the transmission line impedance. In addition, matched termination at the crystal input will attenuate the signal in half. This can be done in one of the two ways. First, R1 and R2 in parallel should equal the transmission line empedance. For most 50Ω applications, R1 and R2 can be 100Ω. This can also be accomplished by removing R1 and making R2 50Ω. By overdriving the crystal oscillator, the device will be functional, but note, the device performance is quaranteed by using a quartz crystal. Thermal Information Symbol Description Condition Q JA Junction-to-ambient thermal resistance Still air 124.0 O C/W Q JC Junction-to-case thermal resistance 37.0 O C/W 6

Packaging Mechanical: 8-Contact TSSOP (L) DATE: 05/03/12 Notes: 1. Refer JEDEC MO-153F/AA 2. Controlling dimensions in millimeters 3. Package outline exclusive of mold flash and metal burr 12-0370 DESCRIPTION: 8 pin, 173mil wide TSSOP PACKAGE CODE: L DOCUMENT CONTROL #: PD-1308 REISION: F Ordering Information Ordering Code Packaging Type Package Description Operating Temperature PI6LC48P25104LE L Pb-free & Green, 8-pin TSSOP Commercial PI6LC48P25104LIE L Pb-free & Green, 8-pin TSSOP Industrial Notes: Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ "E" denotes Pb-free and Green Adding an "X" at the end of the ordering code denotes tape and reel packaging Pericom Semiconductor Corporation 1-800-435-2336 www.pericom.com 7