CHAPTER 1 INTRODUCTION

Similar documents
Design of High Gain Two stage Op-Amp using 90nm Technology

High Voltage Operational Amplifiers in SOI Technology

1 FUNDAMENTAL CONCEPTS What is Noise Coupling 1

Microelectronic Circuits

Design and Analysis of Low Power Two Stage CMOS Op- Amp with 50nm Technology

Performance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design

Design and Performance Analysis of Low Power RF Operational Amplifier using CMOS and BiCMOS Technology

A Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier

An Analog Phase-Locked Loop

4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

Atypical op amp consists of a differential input stage,

EE 501 Lab 11 Common mode feedback (CMFB) circuit

444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407

30 ma flash LDO voltage regulator (output voltage 1.8 ± 0.2 V)

An Improved Bandgap Reference (BGR) Circuit with Constant Voltage and Current Outputs

DESIGN OF A CURRENT STARVED RING OSCILLATOR FOR PHASE LOCKED LOOP (PLL)

On Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital VLSI

Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process

Design and Simulation of Low Dropout Regulator

Design of High-Speed Op-Amps for Signal Processing

DESIGN AND VERIFICATION OF ANALOG PHASE LOCKED LOOP CIRCUIT

International Journal of Advance Engineering and Research Development. Comparitive Analysis of Two stage Operational Amplifier

Index. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10

Lecture 16. Complementary metal oxide semiconductor (CMOS) CMOS 1-1

Design of Low Voltage Low Power CMOS OP-AMP

Analogue Electronic Systems

Course Outcome of M.Tech (VLSI Design)

The Design of SET-CMOS Hybrid Logic Style of 1-Bit Comparator

Effect of Current Feedback Operational Amplifiers using BJT and CMOS

Design of Analog CMOS Integrated Circuits

VLSI Chip Design Project TSEK01

[Kumar, 2(9): September, 2013] ISSN: Impact Factor: 1.852

GOPALAN COLLEGE OF ENGINEERING AND MANAGEMENT Department of Electronics and Communication Engineering COURSE PLAN

Design Of Two Stage CMOS Op-Amp With Low Power And High Slew Rate.

Design cycle for MEMS

CHAPTER 7 HARDWARE IMPLEMENTATION

A Multiobjective Optimization based Fast and Robust Design Methodology for Low Power and Low Phase Noise Current Starved VCO Gaurav Sharma 1

Using Transistor Roles in Teaching CMOS Integrated Circuits

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation

Low-Voltage Rail-to-Rail CMOS Operational Amplifier Design

Analog CMOS Interface Circuits for UMSI Chip of Environmental Monitoring Microsystem

University of Michigan, EECS413 Final project. A High Speed Operational Amplifier. 1. A High Speed Operational Amplifier

A Robust Oscillator for Embedded System without External Crystal

VLSI Chip Design Project TSEK06

Chapter 13: Introduction to Switched- Capacitor Circuits

Design and Analysis of Double Gate MOSFET Operational Amplifier in 45nm CMOS Technology

ISSN:

ECEN 474/704 Lab 7: Operational Transconductance Amplifiers

Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP

Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier

Operational Amplifiers Part I of VI What Does Rail-to-Rail Input Really Mean? by Bonnie C. Baker Microchip Technology, Inc.

Rail to rail CMOS complementary input stage with only one active differential pair at a time

Fully integrated CMOS transmitter design considerations

d. Can you find intrinsic gain more easily by examining the equation for current? Explain.

ET475 Electronic Circuit Design I [Onsite]

Design of Rail-to-Rail Op-Amp in 90nm Technology

A -100 db THD, 120 db SNR programmable gain amplifier in a 3.3 V, 0.5µm CMOS process

Chapter 13 Oscillators and Data Converters

Technology, Jabalpur, India 1 2

Chapter 1. Introduction

DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER

EE 320 L LABORATORY 9: MOSFET TRANSISTOR CHARACTERIZATIONS. by Ming Zhu UNIVERSITY OF NEVADA, LAS VEGAS 1. OBJECTIVE 2. COMPONENTS & EQUIPMENT

Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc.

Common-Source Amplifiers

GRAPHIC ERA UNIVERSITY DEHRADUN

6. Field-Effect Transistor

EEC 210 Fall 2008 Design Project. Rajeevan Amirtharajah Dept. of Electrical and Computer Engineering University of California, Davis

Class-AB Low-Voltage CMOS Unity-Gain Buffers

Exam Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance voltage?

Chapter 10 Feedback ECE 3120 Microelectronics II Dr. Suketu Naik

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage

A Design of Sigma-Delta ADC Using OTA

Yet, many signal processing systems require both digital and analog circuits. To enable

Metal-Oxide-Silicon (MOS) devices PMOS. n-type

International Journal of Scientific & Engineering Research, Volume 4, Issue 6, June ISSN

DESIGN OF MULTI-BIT DELTA-SIGMA A/D CONVERTERS

DESIGN OF A NOVEL CURRENT MIRROR BASED DIFFERENTIAL AMPLIFIER DESIGN WITH LATCH NETWORK. Thota Keerthi* 1, Ch. Anil Kumar 2

DESIGN HIGH SPEED, LOW NOISE, LOW POWER TWO STAGE CMOS OPERATIONAL AMPLIFIER. Himanshu Shekhar* 1, Amit Rajput 1

Carleton University. Faculty of Engineering and Design, Department of Electronics. ELEC 2507 Electronic - I Summer Term 2017

EE301 Electronics I , Fall

Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier in 0.35μm CMOS

What is the typical voltage gain of the basic two stage CMOS opamp we studied? (i) 20dB (ii) 40dB (iii) 80dB (iv) 100dB

Microelectronics Circuit Analysis and Design. Differential Amplifier Intro. Differential Amplifier Intro. 12/3/2013. In this chapter, we will:

ENEE307 Lab 7 MOS Transistors 2: Small Signal Amplifiers and Digital Circuits

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

Design And Simulation Of First Order Sigma Delta ADC In 0.13um CMOS Technology Jaydip H. Chaudhari PG Student L. C. Institute of Technology, Bhandu

Common Mode Feedback for Fully Differential Amplifier in ami06 micron CMOS process

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 02, 2016 ISSN (online):

Chapter 2 CMOS at Millimeter Wave Frequencies

PURPOSE: NOTE: Be sure to record ALL results in your laboratory notebook.

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Low-Voltage Wide Linear Range Tunable Operational Transconductance Amplifier

DESIGN OF LOW POWER OPERATIONAL AMPLIFIER USING CMOS TECHNOLOGIES

SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver

REVIEW ON DIFFERENT LOW DROP-OUT VOLTAGE REGULATOR TOPOLOGY

EE 230 Lab Lab 9. Prior to Lab

Hot Topics and Cool Ideas in Scaled CMOS Analog Design

F9 Differential and Multistage Amplifiers

EE 501 Lab 4 Design of two stage op amp with miller compensation

DESIGN AND PERFORMANCE VERIFICATION OF CURRENT CONVEYOR BASED PIPELINE A/D CONVERTER USING 180 NM TECHNOLOGY

Transcription:

CHAPTER 1 INTRODUCTION 1.1 Historical Background Recent advances in Very Large Scale Integration (VLSI) technologies have made possible the realization of complete systems on a single chip. Since complete systems often include analog devices as well as digital devices, there has been a reemergence of interest in Metal-Oxide Semiconductor (MOS) analog circuits. Examples of these types of integrated circuits include: Digital-to-Analog Converters, Analog-to-Digital Converters, Voltage- Controlled Oscillators, Analog Input/Output Pads, and amplifiers. All these devices can be based on a simple element in MOS design, the MOSFET transistor. Complementary Metal-Oxide-Semiconductor (CMOS) technology is circuit implementation using both pmos and nmos transistors on the same silicon chip. CMOS designs typically offer high gain and speed at low power consumption. In addition, CMOS scales well to smaller devices without drastic changes in performance. One of the most common analog circuit elements is the operational amplifier. Operational amplifier are amplifiers (controlled sources) that have sufficiently high forward gain so that when negative feedback is applied, the closed-loop transfer function is practically independent of the gain of op amp. This principle has been exploited to develop many useful analog circuits and systems. It will compare two inputs (V+ an V- ) and amplify their difference. This device is commonly used to amplify small signals, to add or 1

subtract voltages, and in active filtering. It must have high gain, low current, high input output impedance and should function over a variety of frequencies. The primary requirement of an op amp is to have an open loop gain that is sufficiently large to implement the negative feedback concept. Most of the amplifiers do not have a large enough gain. Consequently, CMOS op amps use two or more stages of gain. One of the most popular op amp is a two stage op amp. The first is because it is simple yet robust implementation of an op amp and second it can be used as the starting point for the development of other types of op amp. Compensation concept is very important in two stage op amp. The goal of compensation is to maintain stability when negative feedback is applied around the op amp. An understanding of compensation, along with previous concepts, provides the necessary design relationships to formulate a design approach for the two stage op amp. In designing a CMOS op amp, the designer starts with building blocks whose performance can be analyzed to a first-order approximation by hand or calculator methods of analysis. The advantage of this step is the insight it provides to the designer as the design of the circuit develops. However, at some point the designer must turn to a better means of simulation. For the CMOS op amp this is generally a computer analysis program such as Mentor Graphics. The design can be optimized and many other questions such as tolerances, stability, and noise can be examined. 2

1.2 Project overview The flow chart as shown in figure 1.1 details the overview of the project. It is consists of four stages. At first stage, the design of the CMOS operational amplifier is studied based on theories of advanced analog circuit design. Then the calculation of transistors width over length ration and its bias currents is calculated. Design of the CMOS operational amplifier based on theories and calculation Simulation of the circuit using Mentor Graphics Stage 1 Stage 2 Layout design and DRC and LVS simulation Modifications and circuit tuning to meet the specifications Stage 4 Stage 3 Figure 1.1: The project overview In the next stage, the two stage CMOS operational amplifier circuit is developed and simulated. The simulation results compared with the calculated results in theories. Multiple simulations are performed in order to get accurate results. In the following stage, the circuit is modified and tuned to meet the operational amplifier specifications. Some redesign needed in this stage. At the final stage, the complete CMOS operational amplifier circuit s layout is drawn and simulated. Details explanation and design of the CMOS operational amplifier were discussed in chapter 3. 3

1.3 The Aim and Objectives The aim of the project is to design and simulate two stage CMOS operational amplifier circuit employing Mentor Graphics tool. The basic operation of CMOS operational amplifier need to be understood clearly and two stage design topology need to be implemented and verified by simulation. The main objectives of the task undertaken were: To design the Complementary Metal Oxide Semiconductor operational amplifier. To determine the width over length ratio (W/L) and bias currents of the transistors. To simulate and investigate the design to verify the operation. To design the layout of the amplifier and perform DRC and LVS simulation. 1.4 Scope of study This project is based on analog electronic devices and advanced integrated circuit design fundamentals. It involves 3 basic concepts, design, simulation and verification using Mentor Graphics software. 4

1.5 Project outline This project is organized into five chapters as follows. Chapter 2 discusses the literature survey on the theories of an ideal operational amplifier and its performance characteristics. This chapter also details the two stages operational amplifier design technique consist of differential gain stage and common source gain stage. The existing method to generate an operational amplifier with stable performance through compensation is also discussed. Chapter 3 presents the methodology for the two stages CMOS operational amplifier design. The design objectives and the compensation network were determined from theories of advanced analog circuit design. The transistor sizes and its bias currents then calculated according to design objectives. Once a satisfactory architecture has been obtained, the circuit entered the simulation stage. Chapter 4 discussed the simulation and experimental results of CMOS operational amplifier generated using test bench circuit. The discussion of transistor bias summary and its design performance is done and concluded. Chapter 5 outlines the conclusion and future works. Conclusion for the overall project findings especially on the CMOS operational amplifier circuit is done and the suggestion for the future works is also stated. 5