PMBus. PMB TM Digital
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1 The World Leader in High Performance Signal Processing Solutions PMBus PMB TM Digital Di it l PFC Controller with Integrated AC Power Metering Marco Soldano Power Systems Architect Marco.Soldano@Analog.com
2 OUTLINE Introduction Digital PFC Controller architecture User interface - keeping it simple Power Supply performance optimization PMBus command set support Power Metering Conclusions 2
3 Mission Statement Flexible yet simple to use digital PFC controller Accurate and cost effective Power Metering implementation High Performance THD and PF Industry Standard PMBus TM command set support Real time efficiency optimization 3
4 Different Flavors of Digital Power PMBUS MICRO (supervisor) Tweaking Analog Controller PMBUS MICRO (supervisor) I2C Digital Wrapper Analog Controller PMBUS Digital FSM Controller PMBUS DSP 4
5 FSM DSP P ANALO OG Design Flow comparison: Loop Compensation 5 H (s) K s z1 s s p1 H ( z) K z a z 1 z b
6 ADP1047: Single Phase Digital PFC Controller VRec Relay Vout Bulk Cap AC Input 3.3V AGND VAC VFB OVP PGND ILIM NC CS- CS+ 10 DGND 11 PSON VDD RES RTD 22 ADD 21 SDA 20 SCL 19 SYNC 18 INRUSH 17 PGOOD 16 AC_OK PWM VCORE PWM 13 ADP1047 PMBus
7 ADP1047 Block Diagram AGND VAC VFB OVP PGND ILIM NC CS- CS+ DGND PSON VCORE ADP1047 TOP VIEW (Not to Scale) VDD RES RTD ADD SDA SCL SYNC INRUSH PGOOD AC_OK PWM2 PWM BSC BSC BSC PIN BSC COPLANARITY SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-137AE 24 Lead QSOP Package
8 Time Continuous Sigma-Delta ADC Bits = Log 2 (Clock/BW) FAST LO Accuracy MID Speed/Accuracy SLOW HI Accuracy Some Protections, Control Loop, Telemetry, trigger levels Protections Power Metering Time continuous Sigma-Delta 8 Nyquist rate (Flash or SAR) + inherent anti-aliasalias filter + does not necessarily require high clock + single-bit SD has guaranteed linearity rate (but higher eases anti-alias + smaller area requirement) - - High clock rate needed for higher Higher power consumption resolution (over-sampling) - Needs anti-alias filter - Requires a decimation filter post ADC - Linearity dependent on matching
9 ADP1047/48 Control Loop VFB1 _ K Compensator Hv(z) VAC 2 VAC,rms IREF IL _ K Compensator fz fp fz fp frequency frequency VREF VEA + + Hi(z) D Voltage Loop Current Loop Compensator Compensator (Normal and Fast) (High and Low Line) HI LINE LO LINE NORMAL COMPENSATION HI LINE LIGHT-LOAD HI LINE HEAVY-LOAD CURRENT FILTER CURRENT FILTER SLOW VOLTAGE FILTER LO LINE LIGHT-LOAD CURRENT FILTER SLOW VOLTAGE FILTER SLOW VOLTAGE FILTER LO LINE HEAVY-LOAD CURRENT FILTER SLOW VOLTAGE FILTER FAST COMPENSATION HI LINE CURRENT FILTER FAST VOLTAGE FILTER LO LINE CURRENT FILTER SLOW VOLTAGE FILTER 9
10 Voltage and Current Loop programming 10
11 Fast Loop to Improve Transient Response Load Step Change: 150W 300W V rec I in I load I out V bulk Programmable Range V out Progr. Delay (1-8 half cycles) I in Fastloop I out Fast loop is enabled when V out is outside programmable range (from 1.5% to 12%) Switch between fast loop and regular loop happens at voltage zero-crossings Control switches back to Normal filter after programmable delay of 1 to 8 AC line cycles V out 11
12 Intuitive Graphic User Interface 12 APEC 2010
13 Power Factor and THD performance Vin=90V PF>0.99, THD=0.9% Power Fa actor Vin (V) Vo (V) Power Factor Distortion (THD) > % > % % % % Vin = 90V Vin = 120V Vin = 150V Vin = 180V Vin = 210V Vin = 240 V Vin=220V PF=0.99, THD=2.5% % Output power (W) 13
14 ADP1047 Programmable Inrush Control Programmable start-up inrush control of external relay Programmable soft start delay and timing 14
15 Adaptive Boost Voltage Output Voltage VOH 240V AC input VOH2 VOH1 High line VOL2 VOL1 Low line Power P1 P2 100% Bulk Voltage tracking to improve efficiency and keep hold up time constant Voltage is adjusted based on input Power and Input Line Voltage 15
16 PMBus Command Set Support Native support for 31 PMBus commands PIN, VIN, VOUT, IIN reporting in Linear Format Standard Warning and Fault limit settings Support of Standard PMBus Fault Responses Additional 134 Manufacturer Specific Commands Additional functionalities not covered by PMBus 16
17 Data representation for Power, Voltage and Current Linear Format Mantissa (bits) Exp (N) Min Range Min LSB Max Range Max LSB Exponent # of bits VIN 11-3 to V 0.125V 1024V 0.5V 3: -2 2 to IIN to -5 2A 0.976mA 64A 31.25mA 5: -2 4 to PIN 11-3 to+4 256W 125mW 32.8kW 16W 3: -2 2 to VOUT 11-3 to 0 256V 0.125V 2048V 1V 3: -2 2 to
18 AC Power Measuring Input RMS Current/Voltage Sampling bandwidth is 24kHz Sampling window is synchronized with line frequency Input True RMS Power is calculated cycle by cycle and then averaged Data is averaged over a programmable window from 133ms to 60Hz from 160ms to 50Hz 18
19 1047 Power Metering Data with ideal AC Input Power Error in terms of percentage (Vout=385V) Error percent tage 5.00% 3.00% 1.00% 1.00% Vin = 90V Vin = 120V Vin = 150V Vin = 180V Vin = 210V Vin = 240 V 3.00% 5.00% Output Power (W) 19
20 1047 Power Metering Data with Non-ideal AC Input Accuracy is within 1% at loads higher than 125W Voltage AC Input Input power (W) frompower meter From 1047 Error pecentage age of Error Percent Power (W) Input from power meter From 1047 Error percentage tage of Error Percent % 20% 40% 60% 80% 100% percentage of full load % 20% 40% 60% 80% 100% Percentage of full load
21 1047 Power Metering Data with Non-ideal AC Input Accuracy is within 1.5% at loads higher than 125W Voltage AC Input Inpu ut Power (W) from power meter From 1047 Error percentage % 20% 40% 60% 80% 100% Percentage of full load tage of Error Percent Inpu ut Power(W) from power p meter From 1047 Error percentage 0% 20% 40% 60% 80% 100% Percentage of full load Percentage e of Error 21
22 ADP Summary Flexible, digital Power Factor correction controller Accurate Power Metering capability Easy to use GUI Real-time Efficiency optimization Enhanced dynamic response Programmable soft start and Inrush Control Frequency Spread Spectrum improves EMI PMBus TM Compliant 22
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The World Leader in High Performance Signal Processing Solutions Power Monitoring in Server Power Supplies Challenges and Opportunities Marco Soldano Power Systems Architect Marco.Soldano@Analog.com OUTLINE
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