MP6400 Low Quiescent Current Programmable-Delay Supervisory Circuit

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1 The Future of Analog IC Technology MP6400 Low Quiescent Current Programmable-Delay Supervisory Circuit DESCRIPTION The MP6400 family is the microprocessor (µp) supervisory circuit which can monitor and provide reset function for system voltages from 0.4V. When either the voltage falls below its threshold (V IT ) or the voltage of manual reset ( ) is pulled to a logic low, the signal will be asserted. The reset voltage can be factory-set for standard voltage rails from 0.9V to 5V, while the MP6400DG(J)- 0 reset voltage is adjustable with an external resistor divider. When voltage and exceed their thresholds, is driven to a logic high after a user-programmable delay time. The MP6400 has a very low quiescent current of.6μa typically, which makes it ideal suitable for battery-powered applications. It provides a precision reference to achieve ±% threshold accuracy. The reset delay time can be selected by a capacitor which is connected between and, allowing the user to select any delay time from 2.ms to 0s. 380ms delay time is selected by connecting the pin to V CC, while 24ms delay time by leaving the pin float. MP6400 is available in TSOT23 and 2mm 2mm 6-pin QFN packages. FEATURES Fixed Threshold Voltages for Standard Voltage Rails From 0.9V to 5V and Adjustable Voltage From 0.4V are Available Low Quiescent Current:.6uA typ Power-On Reset Generator with Adjustable Delay Time: 2.ms to 0s High Threshold Accuracy: R±% typ Manual Reset ( M) Input Open-Drain RETOutput Immune to Short Negative voltage Guaranteed Reset Valid to V CC =0.8V 6 Pin TSOT23 and 2mm 2mm QFN APPLICATIONS ES DSP or Micro controller Applications Laptop/Desktop Computers PDAs/Hand-Held Products Portable/Battery-Powered Products FPGA/ASIC Applications MPS and The Future of Analog IC Technology are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION V CC C C2 R R2 MP6400 R3 C3 Microprocessor DSP Microcontroller MP6400 Rev

2 TM MP LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT ORDERING INFORMATION Part Number* Package Free Air Temperature (T A ) MP6400DG-XX QFN6 (2x2mm) 40 C to +85 C MP6400DJ-XX TSOT23-6 *For Tape & Reel, add suffix Z (e.g. MP6400DG XX-Z); For RoHS compliant packaging, add suffix LF (e.g. MP6400DG XX-LF Z). **For Tape & Reel, add suffix Z (e.g. MP6400DJ XX-Z); For RoHS compliant packaging, add suffix LF(e.g. MP6400DJ XX-LF Z). PACKAGE REFERENCE TOP VIEW TOP VIEW QFN6 (2mm x 2mm) ABSOLUTE MAXIMUM RATINGS () Supply Voltage V CC to 6.5 V Voltage V CDELAY V to V CC + 0.3V Voltage V V to 6V All Other Pins V to +6.5V Current I... 5mA Continuous Power Dissipation (T A = +25 C) (2) QFN6 (2mmx2mm) W TSOT W Junction Temperature...50 C Lead Temperature C Storage Temperature C to +50 C TSOT23-6 Recommended Operating Conditions (3) Supply Voltage V CC...8V to 6V Operating Junct. Temp (T J ) C to +25 C Thermal Resistance (4) θ JA θ JC QFN6 (2mmx2mm) C/W TSOT C/W Notes: ) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-toambient thermal resistance θ JA, and the ambient temperature T A. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX)=(T J (MAX)- T A )/θ JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD5-7 4-layer board. MP6400 Rev

3 ESETHysteresis on V IT Pin V HYS V IT % MESETM MP LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT ELECTRICAL CHARACTERISTICS.8V V CC 6V, R 3 = 00kΩ, C 3 = 47pF, T A = -40 C to +85 C, Typical values are at T A =+25 C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Input Supply Range V CC.8 6 V V CC = 3.3V, not asserted., RET, µa Supply Current open I (current into V CC pin) CC V CC = 6V, RETnot asserted., RET,.85 2 µa open Low-level Output Voltage V OL.3V V CC <.8V, I OL = 0.4mA.8V V CC 6V, I OL =.0mA VIOL (max) = 0.2V, Power-up Reset Voltage (5) RT rise(vcc) 5µs/V Negative-going Input Threshold Accuracy ESSEES5uA= 0.3 V 0.4 V 0.8 V V IT V falling slowly ±.0 ±2.0 % RRInternal Pull-up Resistance MInput Current at Pin I MP6400DJ-0 V = V IT Fixed versions = 6V VRSET= 6V, Leakage Current asserted RLogic Low Input V V R2.4 µa RETnot 50 0 kω na RLogic High Input V IH 0.7V CC V Maximum Transient Duration RE = 50pF ms SETDelay Time t w t d V IH =.05 V IT, V IL = 0.95 V IT 7.5 µs = Open ms (6) = V CC ms = 0nF (6) ms to RESHigh to Low Level to ETPropagation Delay t phl Delay, Note: R5) The lowest supply voltage (V CC ) at which 6) Guaranteed by design. ESt phl2 EV IH = 0.7 V CC, V IL = 0.25 V CC V IH =.05 V IT, V IL = 0.95 V IT Tbecomes active. 60 ns 7.5 µs MP6400 Rev

4 ORDERING INFORMATION (7) Product Package Top Mark Nominal Supply Voltage Threshold Voltage (VIT) MP6400DG-0 QFN 5B MP6400DJ-0 TSOT23 4B Adjustable 0.4V MP6400DG-09 QFN Contact Factory MP6400DJ-09 TSOT23 0.9V 0.84V MP6400DG-2 QFN MP6400DJ-2 TSOT23.2V.2V MP6400DG-25 QFN MP6400DJ-25 TSOT23.25V.6V MP6400DG-5 QFN MP6400DJ-5 TSOT23.5V.40V MP6400DG-8 QFN MP6400DJ-8 TSOT23.8V.67V MP6400DG-25 QFN MP6400DJ-25 TSOT23 2.5V 2.33V MP6400DG-30 QFN 9S MP6400DJ-30 TSOT23 8S 3.0V 2.79V MP6400DG-33 QFN 9R MP6400DJ-33 TSOT23 3S 3.3V 3.07V MP6400DG-50 QFN Contact Factory MP6400DJ-50 TSOT23 5.0V 4.65V Note: 7) In MP6400DG(J)-, the are placeholders for the monitored voltage levels of the devices. Desired monitored voltages are set by the suffix found in ordering information. MP6400 Rev

5 PIN FUNCTIONS QFN Pin # TSOT Pin # 6 RName ESETRDescription ETis an open drain signal which will be asserted when the voltage drops below a preset threshold or when the manual reset ( ) pin drops to a logic low. The delay time is programmable from 2.ms to 0s by using external capacitors. A pull-up resistor bigger than 0k should be connected this pin to supply line, and the outputting a higher voltage than V CC is allowable. ES5 2 Ground. The manual reset ( ) can introduce another logic signal to control the R4 3 internally connected to V CC through a 90kΩ resistor. Programmable reset delay time pin. When connected to V CC through a resistor between 50kΩ and 200kΩ, a 380ms delay time is selected. When C 3 4 DELAY floated, the delay time is 24ms. A capacitor bigger than 50pF connected to could be used to get the user s programmable time from 2.ms to 0s. 2 5 ESET. It is pin is connected to the monitored system voltage. When the monitored voltage is below desired threshold, is asserted. 6 V CC Supply voltage. A 0.uF decoupling ceramic capacitor should be put close to this pin. DETAIL DESCRIPTION TThe MP6400 product family asserts a signal when either the pin voltage is lower than V IT or the manual reset ( ) is driven low. The MP6400 family can be monitored a fixed voltage from 0.9V to 5.0V, while the MP6400DG(J)-0 can monitor any voltage above 0.4V by adjusting the external resistor divider. After both the manual reset ( ) and voltages exceed their thresholds, the RESEoutput remains asserted for a user s programmable delay time. Two fixed delay times are user-selectable: 380ms delay time by connecting the pin to V CC, and 24ms delay time by leaving the pin float. Any delay time from 2.ms to 0s could be gotten by connecting a capacitor between and. The wide monitor voltage and programmable reset delay time make MP6400 product family suitable for a broad array of applications. MP6400 Rev

6 TYPICAL PERFORMANCE CHARACTERISTICS V CC =3.3V, R 3 = 00kΩ, C 3 = 47pF, T A = -40 C to +85 C, Typical values are at T A =+25 C, unless otherwise noted. SUPPLY CURRENT(uA) Supply Current vs. V CC +85 O C -40 O C +25 O C DELAY TIME(s) Reset Delay Time vs MAXIMUM TRANSIENT DURATION(us) 00 0 Maximum Transient Duration vs. Threshold Overdrive Voltage V CC (V) (uf) THRESHOLD OVERDRIVE(%) 30 Reset Delay vs.temperature ( =open) 460 Reset Delay vs.temperature ( =V CC ) 0.40 V IT vs. Temperature DELAY(ms) DELAY(ms) V IT (V) LOW LEVEL VOLTAGE(V) I vs. Low Level Voltage V CC =3.3V V CC =.8V V CC =6V I (ma) MP6400 Rev

7 MESETMP6400 LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT FUNCTIONAL BLOCK DIAGRAM 90k MP6400DJ-0 Adjustable Voltage 90k MP6400DJ-XX 0.4V + Reset Logic Timer R R Reset Logic Timer V Adjustable Voltage Version Figure Functional Block Diagram TIMING DIAGRAM Fixed Voltage Version V CC 0.8V 0.0V t D t D t D t D =Reset Delay =Undefined State V IT +V HYS V IT 0.7V CC 0.25V CC Time Figure 2 MP6400 Timing Diagram TRUTH TABLE RR > V IT L 0 L L L H 0 L H H MP6400 Rev

8 APPLICATION INFORMATION Reset Output Function The MP6400 output is typically connected to the input of a microprocessor, as shown Tin Figure 3. When is not asserted, a pull up resistor must be connected to hold this signal high. The voltage of reset signal is allowed to be higher than V CC (up to 6V) through a resistor pulling up from supply line. If the voltage is below RESE0.8V, output is undefined. This condition can be ignored generally because that most microprocessors do not function at this state. When both and are higher than their threshold voltage, output holds logic high. Once either of the two drops below their threshold, will be asserted. V CC 0.uF R nf R2 Microprocessor 00k DSP Microcontroller 47pF Figure 3 Typical Application of MP6400 with Microprocessor From the point that is again logic high and is above V IT + V HYS (the threshold hysteresis), will be driven to a logic high after a reset delay time. The reset delay time is programmable by pin. Due to the finite impedance of pin, the pull up resistor should be bigger than 0kΩ. Monitor a Voltage The input pin is connected to the monitored system voltage directly or through a resistor network (on MP6400DJ-0). When the voltage on the pin is below V IT, is asserted. A threshold hysteresis will prevent the chip from responding perturbation on pin. A nf to 0nF bypass capacitor should be put on this pin to increase its immunity to noise. A typical application of the MP6400DJ-0 is shown in Figure 4. Two external resistors form a voltage divider from monitored voltage to. Its tap connects to the pin. The circuit can be used to monitor any voltage higher than 0.4V. nf R R2 V SEN MP6400DJ-0 V OUT R V IT = (+ ) R2 0.4 Figure 4 MP6400DJ-0 Monitoring a User- Defined Voltage Monitor Multiple System Voltages The manual reset ( ) can introduce another logic signal to control the. When is a logic low (0.25V CC ), will be asserted. After both and are above their thresholds, will be driven to a logic high after a reset delay time. The is internally connected to V CC through a 90kΩ resistor so this pin can float. See how multiple system voltages are monitored by in Figure 5. If the signal on isn t up to V CC, there will be an additional current through internal 90kΩ pull up resistor. A logic-level FET can be used to minimize the leakage, as shown in Figure 6..2V 3.3V V I/O MP6400DJ-2 MP6400DJ-33 DSP V CORE Figure 5 MP6400 Family Monitoring Multiple System Voltages MP6400 Rev

9 3.3V MP6400DJ-33 Figure 6 Minimizing I CC When Signal isn t over by External MOSFET Programmable Reset Delay Time The reset delay time can be programmed by configure. When is connected to through a resistor between 50kΩ and 200kΩ, the delay time is 380ms. When floated, the delay time is 24ms. In addition, a capacitor connected to could be used to get the user s programmable delay time from 2.ms to 0s. The three configures can be found in Figure 7(a)(b)(c). 3.3V 50k (a) 380ms Delay 3.3V MP6400DJ V MP6400DJ-33 24ms Delay (b) MP6400DJ-33 The reset delay time is determined by the charge time of external capacitor. While is above V IT and is a logic high, the internal 40nA current source is enabled and starts to charge the capacitor to set the delay time. When the capacitor voltage rises to.3v, the is deasserted. The capacitor will be discharged when the is again asserted. Stray capacitance may cause errors of the delay time. A ceramic capacitor with low leakage is strongly recommended. Voltage Transients Immunity The MP6400 can be immune to pin short negative transient. The maximum immune duration is 7us while overdrive is 5%. A shorter negative transient can not assert the output. The effective duration is relative to the threshold overdrive, as shown in Figure 8. MAXIMUM TRANSIENT DURATION(us) 00 0 Maximum Transient Duration vs. Threshold Overdrive Voltage THRESHOLD OVERDRIVE(%) Figure 8 Maximum Transient Duration vs. Sense Threshold Overdrive Voltage (c) Figure 7 Programmable Configurations to the Reset Delay Time The external capacitor must be larger than 50pF. For a given delay time, the capacitor value can be calculated using the following equation: 4 C ( nf) = [ t ( s) ( s)] 07 DELAY D MP6400 Rev

10 PACKAGE INFORMATION QFN6 (2mm x 2mm) PIN ID MARKING PIN ID SEE DETAIL A PIN ID INDEX AREA BSC TOP VIEW BOTTOM VIEW 0.20 REF PIN ID OPTION A 0.30x45º TYP. PIN ID OPTION B R0.20 TYP SIDE VIEW DETAIL A.90 NOTE: ) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.0 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION C. 5) DRAWING IS NOT TO SCALE RECOMMENDED LAND PATTERN MP6400 Rev

11 TSOT23-6 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6400 Rev

MP20142 Dual Channel, 200mA Linear Regulator With Programmable Output Voltage and Output Discharge

The Future of Analog IC Technology MP20142 Dual Channel, 200mA Linear Regulator With Programmable Output Voltage and Output Discharge DESCRIPTION The MP20142 is a dual-channel, low noise, low dropout and