Brief Manual of HERA Application Board. with MiDAS Family. V2.0 March 2006

Transcription

1 MiDAS HERA Family BM-HERA-V2. Brief Manual of HERA Application Board with MiDAS Family V2. March 26 CORERIVER Semiconductor reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. The CORERIVER Semiconductor products listed in this document are intended for usage in general electronics applications. These CORERIVER Semiconductor products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury. ( mcu-support@coreriver.com)

2 Contents 1. Introduction 2. HERA Application Board 3. Main Board 4. Block Diagram of Main Board 5. Pin Descriptions 6. LCD Control 7. Address Map : Verilog Source 8. Memory Interface 9. Serial Port Communication 1.External Ports and Display Applications 11. ADC Inputs, PWM Outputs, and Etc. [2]

3 1. Introduction What is the HERA Application Board? HERA Application Board is designed as a low cost platform for learning the MiDAS family and peripheral components Configuration of HERA Application Board Main Board MiDAS Family: Its execution time is about 3 times faster than that of traditional 8C52. External Data Memory : Max. 64KBytes SRAM (32kBytes x 2 ea) External Program Memory : Max. 64KBytes EPROM Serial Port Communication ADC Function Test : External 4-channel analog inputs, or internal temperature sensor (LM35DM) External Ports and Display Applications [3]

4 2. HERA Application Board [Main Board] [Main Board with Sub Board] [4]

5 3. Main Board RESET Push Button External Input Port 4-channel ADC Input Port 2-channel PWM Output Port SRAM 64kBytes(32kBytes x 2ea) : below LCD Module +9V Input 16x4 Character LCD DSUB-9 MALE (Serial Port) RS232 MiDAS 1. Family EPROM (64K) PORT A PORT B Parallel Port MiDAS 2. Family CPLD : XC9572 PORT C PORT D MiDAS 2. Oscillator MCU Port Test Pin MiDAS 1. Oscillator Optic Receiver 7-segment Display (IrDA) [Main Board] LED Display [5]

6 4. Block Diagram of Main Board Serial Port Interface Clock /EA TX, RX MAX232 (RS232) P3[1:] P3. RXD, P3.1 TXD Oscillator (Half Type) 1 : Internal ROM can use : Internal ROM cannot use 16x4 Character LCD External Input P3.2 /INT P3.3 /INT1 P1.4 /INT2 P1.5 /INT3 P1.6 /INT4 P1.7 /INT5 P. ADC P1.1 ADC1 P1.2 ADC2 P1.3 ADC3 P1. T2 P1.1 T2EX RESET External Output P3.4 PWM1 P1. PWM2 P3[3:2] P1[7:4] PB Input P., P1[3:1] ADC[3:] PORT_PWM[2:1] RESET P3.4, P1. P., P1, P2, P3 P3[5:1] P1[7:] MiDAS 1. P, P2 /WR, /RD /RAM_CS_HIGH ADDRESS_LOW[7:] /RAM_CS_LOW ADDRESS_LOW[7:] (32K SRAM) (32K SRAM) 7-segment Display LED Display CONFIG MiDAS 2. P1[7:4] P3[3:2] to External PORT D & External Input Port P [7:], P2 [7:], /WR, /RD, /PSEN, ALE, XTAL (64K EPROM) /ROM_CS /PSEN_CPLD ADDRESS_LOW[7:] From MCU (See MCU) P3.2 Optic Receiver PORT A (8 bits) RESET, XTAL1, /EA, PSEN, ALE, GND P P1 P2 P3 MCU PORT TEST PIN PP_CPLD_D[7:] PP_CPLD_C[3:] PP_CPLD_S[7:3] XC9572 CPLD LCD_EN, LCD_RS, LCD_RW PORTA[7:] PORTB[6:], PP_CPLD_C2 CONFIG PORTC[7:] PORTD[5:] P3.2 /INT P3.3 /INT1 P1.4 /INT2 P3[3:2] From MCU (See MCU) P1.5 /INT3 P1.6 /INT4 P1.7 /INT5 P1[7:4] PORT B (8 bits) PORT C (8 bits) PORT D (12 bits) [6]

7 5. Pin Configurations PWM1 / T2 / P1. ADC1 / T2EX / P1.1 ADC2 / P1.2 ADC3 / P1.3 INT2 / P1.4 INT3 / P1.5 INT4 / P1.6 INT5 / P1.7 RESET RXD / P3. TXD / P3.1 INT / P3.2 INT1 / P3.3 PWM / T / P3.4 T1 / P3.5 WR / P3.6 RD / P3.7 XTAL2 XTAL1 VSS GC87C52A-P4I VDD P. / AD / ADC P.1 / AD1 P.2 / AD2 P.3 / AD3 P.4 / AD4 P.5 / AD5 P.6 / AD6 P.7 / AD7 EA / VPP ALE / PROG PSEN P2.7 / A15 P2.6 / A14 P2.5 / A13 P2.4 / A12 P2.3 / A11 P2.2 / A1 P2.1 / A9 P2. / A8 ADC5 / INT3 / P1.5 ADC6 / INT4 / P1.6 ADC7 / INT5 / P1.7 RESET RXD / P3. MDS_SDA TXD / P3.1 INT / P3.2 INT1 / P3.3 T / P3.4 T1 / P P1.4 / INT2 / ADC4 P1.3 / ADC3 WR / P3.6 RD / P3.7 P1.2 / ADC2 P1.1 / T2EX / ADC1 P1. / T2 / ADC XTAL2 XTAL1 V SS NC NC V DD P. / AD / C1EX P.1 / AD1 / C1EX1 P.2 / AD2 / C1EX2 P.3 / AD3 / C1EX GC89C591A-PL44C CEX / A8 / P2. CEX1 / A9 / P2.1 CEX2 / A1 / P2.2 CEX3 / A11 / P2.3 CEX4 / A12 / P P.4 / AD4 / C1EX4 P.5 / AD5 / C1EX5 P.6 / AD6 / ECI1 P.7 / AD7 / ECI EA MDS_SCK ALE / PROG PSEN P2.7 / A15 / TXD1 P2.6 / A14 / RXD1 P2.5 / A13 / CEX5 [ MiDAS 1. 4-DIP ] [ MiDAS PLCC ] For more detail information, refer to the MCU Brief Manual BM-MiDAS1.-VXX.PPT. For more detail information, refer to the MCU Brief Manual BM-MiDAS2.-VXX.PPT. [7]

8 6. LCD Control Power On Wait for more then 3ms After VDD Rises to 4.5V Condition : Fosc=27KHz RS RW DB7 Function Set DB6 DB5 DB4 DB3 1 1 L DB2 F DB1. DB. N F Line Mode. 2-Line Mode. Display Off Display On Wait for more then 39us RS RW Display ON / OFF Control DB7 DB6 DB5 DB4 DB3 DB2 1 D DB1 C DB B D C 1 1 Display Off Display On Cursor Off Cursor On Wait for more then 39us Blink Off B 1 Blink On Display Clear RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Wait for more then 1.53us RS RW DB7 Entry Mode Set DB6 DB5 DB4 DB3 DB2 1 DB1 I/D DB SH I/D 1 SH 1 Decrement Mode Increment Mode Entire Shift Off Entire Shift On Initialization End. Display Off Display Clear Entry Mode Set [8]

9 7. Address Map : Verilog Source Memory Map User can reconfigure the address map in CPLD using Verilog HDL. 8 hf6xx 8 hf5xx 8 hf3xx Data Memory (8 hfa ~ 8 hfcff) 8 hf2xx 8 hf1xx 8 hfxx Not-defined (8 hc ~ 8 hefff) Data Memory (8 h ~ 8 hbfff) : PORTB : PORTC : PORTA : for Other Control BUS : LCD_RW Setting : LCD_EN Setting : LCD_RS Setting // File Name : HERA_K2.v // Programmed by H. Jee // Programmed Date : Tue., May 13, 23 // Lately Modified Date : Thu., May 15, 23 // Revision :.1 module HERA_K2( P, // input P2, WR_B, RD_B, PSEN_B, ALE, XTAL1, RAM_CS_HIGH_B, // output RAM_CS_LOW_B, ADDRESS_LOW, ROM_CS_B, PSEN_CPLD_B, LCD_CON, PORTA, PORTB, PP_CPLD_D ); // Declaration for Variables // Input Variables input [7:] P; input [7:] P2; input WR_B; input RD_B; input PSEN_B; input ALE; input XTAL1; // Output Variables output RAM_CS_HIGH_B; output RAM_CS_LOW_B; output [7:] ADDRESS_LOW; output ROM_CS_B; output PSEN_CPLD_B; output [2:] LCD_CON; [9]

10 7. Address Map : Verilog Source // External Port A & LCD 1-byte Data output [7:] PORTA; // External Port B & 7-segment 1-byte Control // & Parallel Port Data Bus 1 byte using Jumper output [7:] PORTB; // External Port C, LED 1-byte Control output [7:] PP_CPLD_D; // Declaration for Operations // -ROM Read assign ROM_CS_B = PSEN_B; assign PSEN_CPLD_B = PSEN_B; // -RAM Read & Write // -Address : ~7FFF (Low Byte) assign RAM_CS_LOW_B = P2[7] (WR_B & RD_B); // -Address : 8~BFFF (High Byte) assign RAM_CS_HIGH_B = ~P2[7] P2[6] (WR_B & RD_B); // Low Address Latch using ALE & XTAL1 Signals reg [7:] ADDRESS_LOW; reg [7:] ADDRESS_HIGH; reg [7:] PORTA; reg [7:] PORTB; reg [7:] PP_CPLD_D; reg [2:] LCD_CON; XTAL1) begin if (ALE) begin ADDRESS_LOW = P; // Low Address ADDRESS_HIGH = P2; // for Address Mapping end if (~WR_B) begin if (ADDRESS_HIGH == 8'hF2) //LCD_RW <= P; LCD_CON[] <= P[]; else if (ADDRESS_HIGH == 8'hF1) //LCD_EN <= P; LCD_CON[1] <= P[]; else if (ADDRESS_HIGH == 8'hF) //LCD_RS <= P; LCD_CON[2] <= P[]; else if (ADDRESS_HIGH == 8'hF3) begin PORTA <= P; end else if (ADDRESS_HIGH == 8'hF6) begin PORTB <= P; end else if (ADDRESS_HIGH == 8'hF5) begin PP_CPLD_D <= P; end else if (ADDRESS_HIGH == 8 hf4) begin PP_CPLD_DIR_B <= P[]; PP_CPLD_S <= P[5:1]; end end // The End of Declaration for Operations endmodule [1]

11 8. Memory Interface Refer to Slide 6(Address Map : Verilog Source) /EA of MCU decide whether the internal program memory is used or not /EA = 1 : internal program memory is used /EA = : internal program memory is not used // -ROM Read assign ROM_CS_B = PSEN_B; assign PSEN_CPLD_B = PSEN_B; // -RAM Read and Write // -Address : ~7FFF (Low Byte) assign RAM_CS_LOW_B = P2[7] (WR_B & RD_B); // -Address : 8~BFFF (High Byte) assign RAM_CS_HIGH_B = ~P2[7] P2[6] (WR_B & RD_B); MiDAS 1. P [7:], P2 [7:], /WR, /RD, /PSEN, ALE, XTAL /EA 1 : Internal ROM can use : Internal ROM cannot use P, P2 /WR, /RD /RAM_CS_HIGH ADDRESS_LOW[7:] (32K SRAM) (32K SRAM) /RAM_CS_LOW ADDRESS_LOW[7:] (64K EPROM) /ROM_CS /PSEN_CPLD ADDRESS_LOW[7:] XTAL1) begin if (ALE) begin ADDRESS_LOW = P; // Low Address ADDRESS_HIGH = P2; // for Address Mapping end XC9572 CPLD [11]

12 8. Memory Interface Board Configuration /EA 1 : Internal ROM can use : Internal ROM cannot use P, P2 /WR, /RD (32K SRAM) /EA : External Accessible ON (L) ON (L) OFF (H) OFF (H) : not use the Int. PROM (Only Ext. PROM) : use the Int. PROM (+ Ext. PROM) MiDAS 1. P [7:], P2 [7:], /WR, /RD, /PSEN, ALE, XTAL /RAM_CS_HIGH ADDRESS_LOW[7:] (32K SRAM) /RAM_CS_LOW ADDRESS_LOW[7:] (64K EPROM) /ROM_CS /PSEN_CPLD ADDRESS_LOW[7:] : Jumper Cap XC9572 CPLD [12]

13 9. Serial Port Communication HERA uses the MAX232 device for serial communication. Serial port is controlled by three registers : SBUF, SCON, and PCON. For more detail information, refer to MiDAS family Reference Manual. [PC or Other Board] [HERA Main Board] Serial Port Interface #2 #3 #5 #2 #3 #5 TX, RX MAX232 (RS232) P3[1:] P3. RXD, P3.1 TXD MiDAS 1. DSUB-9 MALE #2 : RX (Receive the Data) #3 : TX (Transmit the Data) #5 : GND DSUB-9 MALE #2 : RX (Receive the Data) #3 : TX (Transmit the Data) #5 : GND [13]

14 1. External Ports and Display Applications PORT A 8-bit control data for 16x4 character LCD display or External port for sub board PORT B 8-bit control signals for 7-segment display or External port for sub board Character LCD 16x4 7-segment Display PORT C 8-bit control signals for LED display or External port for sub board ON/OFF LED Display PORT D 12-bit external port for sub board, or 6-bit external port + 6-bit external /INT[5:] input port Header Pins PORT A (8 bits) PP_CPLD_D[7:] PP_CPLD_S[7:3] XC9572 CPLD LCD_EN, LCD_RS, LCD_RW PORTA[7:] PORTB[6:], PP_CPLD_C2 CONFIG PORTC[7:] PORTD[5:] P3.2 /INT P3.3 /INT1 P1.4 /INT2 P3[3:2] From MCU (See MCU) P1.5 /INT3 P1.6 /INT4 P1.7 /INT5 P1[7:4] PORT B (8 bits) PORT C (8 bits) PORT D (12 bits) [14]

15 1. External Ports and Display Applications Board Configuration Character LCD 16x4 LCD DB ON (PORTA) ON 7-segment Display 7-seg. ON (PORTB) LED Display. ON (PORTC) PORTD PORTC PORTB PORTA ON ON LED Display Header Pins PORT A (8 bits) PORT B (8 bits) : Jumper Cap From MCU (See MCU) P3.2 /INT P3.3 /INT1 P1.4 /INT2 P1.5 /INT3 P1.6 /INT4 P3[3:2] PORT C (8 bits) P1.7 /INT5 P1[7:4] PORT D (12 bits) [15]

16 11. ADC Inputs, PWM Outputs, and Etc. MiDAS Family MCU supports 4-channel ADC Inputs 2-channel PWM Outputs PWM (Pulse Width Modulation) External Output Ports for 2-channel PWM (PWM[1:]) ADC (Analog-to-Digital Converter) External Input Ports for 4-channel ADC (ADC[3:]) Temperature sensor (LM35) supports the analog output for ADC input test (ADC3). PB Input External Input P3.2 /INT P3.3 /INT1 P1.4 /INT2 P1.5 /INT3 P1.6 /INT4 P1.7 /INT5 P. ADC P1.1 ADC1 P1.2 ADC2 P1.3 ADC3 P1. T2 P1.1 T2EX RESET P3[3:2] P1[7:4] RESET P., P1[3:1] ADC[3:] PORT_PWM[2:1] P3.4, P1. P3[3:2] MiDAS 1. External Output P3.4 PWM P1. PWM1 P1[7:4] [16]

17 11. ADC Inputs, PWM Outputs, and Etc. External Input and Output Header Pins External Input Port ADC Input GND Pins GND Pins [17] T2EX (P1.1) T2 (P1.) T1 (P3.5) T (P3.4) RESET /INT5 P1.7) /INT4 (P1.6) /INT3 (P1.5) /INT2 (P1.4) /INT1 (P3.3) /INT (P3.2) ADC3 (P1.3) ADC2 (P1.2) ADC1 (P1.1) ADC (P.) PWM1 (P1.) PWM (P3.4) Reset Input Selector External Reset Input Reset Push Button to MCU Reset Input LM35 Temp. Sensor to MCU ADC Inputs ADC Input On/Off Jumper PWM Output GND Pins from MCU PWM Output to PWM Output PWM Output Selector

18 11. ADC Inputs, PWM Outputs, and Etc. Board Configuration for ADC Inputs ADC3 ADC2 ADC1 ADC Note 1. Please, turn off Pull-up Resistor to use ADC channels. (ex: MOV PSEL, xff) 2. When you use an external (Data or Program) memory, ADC input channel cannot be used. : Jumper Cap Board Configuration for Reset Input External Input Reset Input Selector Reset Push Button External Reset Input to MCU Reset Input P. ADC P1.1 ADC1 P1.2 ADC2 P1.3 ADC3 External Input RESET P., P1[3:1] ADC[3:] Push Button Input RESET MiDAS 1. [18]

19 11. ADC Inputs, PWM Outputs, and Etc. Board Configuration for External PWM Outputs PWM1 PWM PWM Output GND Pins : Jumper Cap PWM1 (P1.) PWM (P3.4) to PWM Output PWM Output Selector from MCU PWM Output External Output P3.4 PWM P1. PWM1 PORT_PWM[1:] MiDAS 1. [19]

20 11. ADC Inputs, PWM Outputs, and Etc. Board Configuration for Optic Receiver Modules (IrDA) : Jumper Cap Optic Receiver Modules P3.2 INT MiDAS 1. [2]