CMOS, Rail-to-Rail, I/O OPERATIONAL AMPLIFIERS

Transcription

1 OPA73 OPA73 OPA73 OPA73 OPA73 OPA273 OPA473 OPA74 OPA274 OPA474 SBOS8A MARCH 2 CMOS, Rail-to-Rail, I/O OPERATIONAL AMPLIFIERS FEATURES RAIL-TO-RAIL INPUT AND OUTPUT WIDE SUPPLY RANGE: Single Supply: 4V to 2V Dual Supplies: ±2 to ±6 LOW QUIESCENT CURRENT: 6µA FULL-SCALE CMRR: 9dB LOW OFFSET: 6µV HIGH SPEED: OPA73: MHz,.6V/µs OPA74: 3MHz, 3V/ µs MicroSIZE PACKAGES: SOT23-5, MSOP-8, TSSOP-4 LOW INPUT BIAS CURRENT: pa APPLICATIONS AUTOMOTIVE APPLICATIONS: Audio, Sensor Applications, Security Systems PORTABLE EQUIPMENT ACTIVE FILTERS TRANSDUCER AMPLIFIER TEST EQUIPMENT NC DATA ACQUISITION Out V +In 2 3 OPA73 OPA74 SOT V+ In Out A In A +In A V OPA273 OPA274 A B In +In V MSOP-8, SO-8, DIP V+ DESCRIPTION The OPA73 and OPA74 series op amps are optimized for applications requiring rail-to-rail input and output swing. Single, dual, and quad versions are offered in a variety of packages. While the quiescent current is less than 2µA per amplifier, the OPA73 still offers excellent dynamic performance (MHz GBW and.6v/µs SR) and unity-gain stability. The OPA74 is optimized for gains of 5 or greater and provides 3MHz GBW and 3V/µs slew rate. The OPA73 and OPA74 series are fully specified and guaranteed over the supply range of ±2V to ±6V. Input swing extends 3mV beyond the rail and the output swings to within 4mV of the rail. The single versions (OPA73 and OPA74) are available in the MicroSIZE SOT23-5 and in the standard SO-8 surfacemount, as well as the DIP-8 packages. Dual versions (OPA273 and OPA274) are available in the MSOP-8, SO-8, and DIP-8 packages. The quad OPA473 and OPA474 are available in the TSSOP-4 and SO-4 packages. All are specified for operation from 4 C to +85 C. OPA73 OPA74 SO-8, DIP-8 Out B In B +In B NC V+ Out NC Out A In A +In A V+ +In B In B Out B A B OPA473 OPA474 D C TSSOP-4, SO Out D In D +In D V +In C In C Out C Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2, Texas Instruments Incorporated

2 ABSOLUTE MAXIMUM RATINGS () Supply Voltage, V+ to V V Signal Input Terminals, Voltage (2)... (V ).3V to (V+) +.3V Current (2)... ma Output Short-Circuit (3)... Continuous Operating Temperature C to +25 C Storage Temperature C to +5 C Junction Temperature C Lead Temperature (soldering, s) C NOTES: () Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) Input terminals are diode-clamped to the power supply rails. Input signals that can swing more than.3v beyond the supply rails should be current-limited to ma or less. (3) Short-circuit to ground, one amplifier per package. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION MINIMUM PACKAGE RECOMMENDED DRAWING PACKAGE ORDERING TRANSPORT PRODUCT DESCRIPTION GAIN PACKAGE NUMBER MARKING NUMBER () MEDIA OPA73NA Single, GBW = MHz SOT A3 OPA73NA/25 Tape and Reel " " " " " " OPA73NA/3K Tape and Reel OPA73UA Single, GBW = MHz SO-8 82 OPA73UA OPA73UA Rails " " " " " " OPA73UA/2K5 Tape and Reel OPA73PA Single, GBW = MHz DIP-8 6 OPA73PA OPA73PA Rails OPA273EA Dual, GBW = MHz MSOP B3 OPA273EA/25 Tape and Reel " " " " " " OPA273EA/2K5 Tape and Reel OPA273UA Dual, GBW = MHz SO-8 82 OPA273UA OPA273UA Rails " " " " " " OPA273UA/2K5 Tape and Reel OPA273PA Dual, GBW = MHz DIP-8 6 OPA273PA OPA273PA Rails OPA473EA Quad, GBW = MHz TSSOP OPA473EA OPA473EA/25 Tape and Reel " " " " " " OPA473EA/2K5 Tape and Reel OPA473UA Quad, GBW = MHz SO OPA473UA OPA473UA Rails " " " " " " OPA473UA/2K5 Tape and Reel OPA74NA Single, GBW = 5MHz 5 SOT A4 OPA74NA/25 Tape and Reel " " " " " " OPA74NA/3K Tape and Reel OPA74UA Single, GBW = 5MHz 5 SO-8 82 OPA74UA OPA74UA Tape and Reel " " " " " " OPA74UA/2K5 Tape and Reel OPA74PA Single, GBW = 5MHz 5 DIP-8 6 OPA74PA OPA74PA Rails OPA274EA Dual, GBW = 5MHz 5 MSOP B4 OPA273EA/25 Tape and Reel " " " " " " OPA273EA/2K5 Tape and Reel OPA274UA Dual, GBW = 5MHz 5 SO-8 82 OPA274UA OPA274UA Rails " " " " " " OPA274UA/2K5 Tape and Reel OPA274PA Dual, GBW = 5MHz 5 DIP-8 6 OPA274PA OPA274PA Rails OPA474EA Quad, GBW = 5MHz 5 TSSOP OPA474EA OPA474EA/25 Tape and Reel " " " " " " OPA474EA/2K5 Tape and Reel OPA474UA Quad, GBW = 5MHz 5 SO OPA474UA OPA474UA Rails " " " " " " OPA474UA/2K5 Tape and Reel NOTE: () Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /3K indicates 3 devices per reel). Ordering 3 pieces of OPA73NA/3K will get a single 3-piece Tape and Reel. 2 OPA73, OPA74 SBOS8A

3 OPA73 ELECTRICAL CHARACTERISTICS: V S = 4V to 2V Boldface limits apply over the specified temperature range, T A = 4 C to +85 C At T A = +25 C, R L = 2kΩ connected to V S / 2 and V OUT = V S / 2, unless otherwise noted. OPA73NA, UA, PA OPA273EA, UA, PA OPA473EA, UA PARAMETER CONDITION MIN TYP MAX UNITS OFFSET VOLTAGE Input Offset Voltage V OS V S = ±5V, V CM = V ±6 ±75 µv Drift dv OS /dt T A = 4 C to +85 C ±4 µv/ C vs Power Supply PSRR V S = ±2V to ±6V, V CM = V 2 µv/v Over Temperature V S = ±2V to ±6V, V CM = V 2 µv/v Channel Separation, dc R L = 2kΩ µv/v f = khz 98 db INPUT VOLTAGE RANGE Common-Mode Voltage Range V CM (V ).3 (V+) +.3 V Common-Mode Rejection Ratio CMRR V S = ±5V, (V ).3V < V CM < (V+) +.3V 7 9 db over Temperature V S = ±5V, (V ) < V CM < (V+) 68 db V S = ±5V, (V ).3V < V CM < (V+) 2V 8 96 db over Temperature V S = ±5V, (V ) < V CM < (V+) 2V 74 db INPUT BIAS CURRENT Input Bias Current I B V S = ±5V, V CM = V ± ± pa Input Offset Current I OS V S = ±5V, V CM = V ±.5 ± pa INPUT IMPEDANCE Differential Ω pf Common-Mode Ω pf NOISE Input Voltage Noise, f =.Hz to Hz V S = ±5V, V CM = V 6 µvp-p Input Voltage Noise Density, f = khz e n V S = ±5V, V CM = V 45 nv/ Hz Current Noise Density, f = khz i n V S = ±5V, V CM = V 2.5 fa/ Hz OPEN-LOOP GAIN Open-Loop Voltage Gain A OL R L = kω, (V )+.V < V O < (V+).V 2 db R L = 2kΩ, (V )+.75V < V O < (V+).75V db over Temperature R L = 2kΩ, (V )+.75V < V O < (V+).75V 96 db R L = 5kΩ, (V )+.5V < V O < (V+).5V db over Temperature R L = 5kΩ, (V )+.5V < V O < (V+).5V 96 db OUTPUT Voltage Output Swing from Rail R L = kω, A OL > 8dB 4 mv R L = 2kΩ, A OL > db 75 mv over Temperature R L = 2kΩ, A OL > 96dB 75 mv R L = 5kΩ, A OL > db 5 mv over Temperature R L = 5kΩ, A OL > 96dB 5 mv Output Current I OUT V S V OUT < V ± ma Short-Circuit Current I SC ±4 ma Capacitive Load Drive C LOAD See Typical Performance Curves FREQUENCY RESPONSE C L = pf Gain-Bandwidth Product GBW G = + MHz Slew Rate SR V S = ±5V, G = +.6 V/µs Settling Time,.% t S V S = ±5V, 5V Step, G = + 5 µs.% V S = ±5V, 5V Step, G = + 2 µs Overload Recovery Time V IN Gain = V S 3 µs Total Harmonic Distortion + Noise THD+N V S = ±5V, V O = 3Vp-p, G = +, f = khz.2 % POWER SUPPLY Specified Voltage Range, Single Supply V S 4 2 V Specified Voltage Range, Dual Supplies V S ±2 ±6 V Operating Voltage Range 3.6 to 2 V Quiescent Current (per amplifier) I Q I O = 6 2 µa over Temperature 3 µa TEMPERATURE RANGE Specified Range 4 85 C Operating Range C Storage Range 65 5 C Thermal Resistance θ JA SOT23-5 Surface-Mount 2 C/W MSOP-8 Surface-Mount 5 C/W TSSOP-4 Surface-Mount C/W SO-8 Surface Mount 5 C/W SO-4 Surface Mount C/W DIP-8 C/W OPA73, OPA74 3 SBOS8A

4 OPA74 ELECTRICAL CHARACTERISTICS: V S = 4V to 2V Boldface limits apply over the specified temperature range, T A = 4 C to +85 C At T A = +25 C, R L = 2kΩ connected to V S / 2 and V OUT = V S / 2, unless otherwise noted. OPA74NA, UA, PA OPA274EA, UA, PA OPA474EA, UA PARAMETER CONDITION MIN TYP MAX UNITS OFFSET VOLTAGE Input Offset Voltage V OS V S = ±5V, V CM = V ±6 ±75 µv Drift dv OS /dt T A = 4 C to +85 C ±4 µv/ C vs Power Supply PSRR V S = ±2V to ±6V, V CM = V 2 µv/v Over Temperature V S = ±2V to ±6V, V CM = V 2 µv/v Channel Separation, dc R L = 2kΩ µv/v f = khz 98 db INPUT VOLTAGE RANGE Common-Mode Voltage Range V CM (V ).3 (V+) +.3 V Common-Mode Rejection Ratio CMRR V S = ±5V, (V ).3V < V CM < (V+) +.3V 7 9 db over Temperature V S = ±5V, (V ) < V CM < (V+) 68 db V S = ±5V, (V ).3V < V CM < (V+) 2V 8 96 db over Temperature V S = ±5V, (V ) < V CM < (V+) 2V 74 db INPUT BIAS CURRENT Input Bias Current I B V S = ±5V, V CM = V ± ± pa Input Offset Current I OS V S = ±5V, V CM = V ±.5 ± pa INPUT IMPEDANCE Differential Ω pf Common-Mode Ω pf NOISE Input Voltage Noise, f =.Hz to Hz V S = ±5V, V CM = V 6 µvp-p Input Voltage Noise Density, f = khz e n V S = ±5V, V CM = V 45 nv/ Hz Current Noise Density, f = khz i n V S = ±5V, V CM = V 2.5 fa/ Hz OPEN-LOOP GAIN Open-Loop Voltage Gain A OL R L = kω, (V )+.V < V O < (V+).V 2 db R L = 2kΩ, (V )+.75V < V O < (V+).75V db over Temperature R L = 2kΩ, (V )+.75V < V O < (V+).75V 96 db R L = 5kΩ, (V )+.5V < V O < (V+).5V db over Temperature R L = 5kΩ, (V )+.5V < V O < (V+).5V 96 db OUTPUT Voltage Output Swing from Rail R L = kω, A OL > 8dB 4 mv R L = 2kΩ, A OL > db 75 mv over Temperature R L = 2kΩ, A OL > 96dB 75 mv R L = 5kΩ, A OL > db 5 mv over Temperature R L = 5kΩ, A OL > 96dB 5 mv Output Current I OUT V S V OUT < V ± ma Short-Circuit Current I SC ±4 ma Capacitive Load Drive C LOAD See Typical Performance Curves FREQUENCY RESPONSE C L = pf Gain-Bandwidth Product GBW G = +5 3 MHz Slew Rate SR V S = ±5V, G = +5 3 V/µs Settling Time,.% t S V S = ±5V, 5V Step, G = +5 8 µs.% V S = ±5V, 5V Step, G = +5 2 µs Overload Recovery Time V IN Gain = V S.6 µs Total Harmonic Distortion + Noise THD+N V S = ±5V, V O = 3Vp-p, G = +5, f = khz.25 % POWER SUPPLY Specified Voltage Range, Single Supply V S 4 2 V Specified Voltage Range, Dual Supplies V S ±2 ±6 V Operating Voltage Range 3.6 to 2 V Quiescent Current (per amplifier) I Q I O = 6 2 µa over Temperature 3 µa TEMPERATURE RANGE Specified Range 4 85 C Operating Range C Storage Range 65 5 C Thermal Resistance θ JA SOT23-5 Surface-Mount 2 C/W MSOP-8 Surface-Mount 5 C/W TSSOP-4 Surface-Mount C/W SO-8 Surface Mount 5 C/W SO-4 Surface Mount C/W DIP-8 C/W 4 OPA73, OPA74 SBOS8A

5 TYPICAL CHARACTERISTICS At T A = +25 C, V S = ±5V, and R L = 2kΩ, unless otherwise noted. 2 OPA73 GAIN AND PHASE vs FREQUENCY 2 2 OPA74 GAIN AND PHASE vs FREQUENCY Gain (db) Phase ( ) Gain (db) Phase ( ) k k k M M 4 4 k k k M M Frequency (Hz) Frequency (Hz) 2 CMRR vs FREQUENCY 4 PSRR vs FREQUENCY CMRR Limited Range 2 8 CMRR (db) 6 4 CMRR Full Scale PSRR (db) k k k M k k k M Frequency (Hz) Frequency (Hz) 7 6 MAXIMUM AMPLITUDE vs FREQUENCY (V+) (V ) = 2V 6 4 CHANNEL SEPARATION vs FREQUENCY Amplitude (V) OPA73 OPA74 Channel Separation (db) k k k M M k k k M Frequency (Hz) Frequency (Hz) OPA73, OPA74 5 SBOS8A

6 TYPICAL CHARACTERISTICS (Cont.) At T A = +25 C, V S = ±5V, and R L = 2kΩ, unless otherwise noted. INPUT CURRENT AND VOLTAGE SPECTRAL NOISE vs FREQUENCY 2 COMMON-MODE REJECTION RATIO vs TEMPERATURE Input Current and Voltage Spectral Noise nv/ Hz Voltage Noise Current Noise Output Current Spectral Noise fa/ Hz CMRR (db) Limited Scale Full Scale... k k k M Frequency (Hz) Temperature ( C) 4 OPEN-LOOP GAIN vs TEMPERATURE INPUT BIAS (I B ) AND OFFSET (I OS ) CURRENT vs TEMPERATURE A OL (db) 3 2 Bias Current (pa). I B I OS Temperature ( C) Temperature ( C) QUIESCENT CURRENT vs TEMPERATURE 2 PSRR vs TEMPERATURE 2 I Q (µa) 5 PSRR (db) Temperature ( C) Temperature ( C) 6 OPA73, OPA74 SBOS8A

7 TYPICAL CHARACTERISTICS (Cont.) At T A = +25 C, V S = ±5V, and R L = 2kΩ, unless otherwise noted.. TOTAL HARMONIC DISTORTION PLUS NOISE (Load = 5kΩ, BW = 8kHz,.Vrms) 5 INPUT BIAS CURRENT (I B ) vs COMMON-MODE VOLTAGE (V CM ) TEMPERATURE = 25C THD (%).. G = +5 OPA74 OPA73 G = + Input Bias Current (pa) 5 5. k k k Frequency (Hz) Common-Mode Voltage, V CM (V) 5 INPUT BIAS CURRENT (I B ) vs COMMON-MODE VOLTAGE (V CM ) TEMPERATURE = 25 C 2 QUIESCENT CURRENT vs SUPPLY VOLTAGE Input Bias Current (na) 5 5 Quiescent Current (µa) Common-Mode Voltage, V CM (V) Supply Voltage (V) Short-Circuit Current (ma) SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE I SC N (Sinking) I SC P (Sourcing) Supply Voltage (V) Output Voltage (V) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT Sourcing Sinking +25 C +25 C +25 C +25 C 55 C 55 C Output Current (±ma) OPA73, OPA74 7 SBOS8A

8 TYPICAL CHARACTERISTICS (Cont.) At T A = +25 C, V S = ±5V, and R L = 2kΩ, unless otherwise noted. 9 8 OPA73 SMALL-SIGNAL OVERSHOOT (%) vs CAPACITIVE LOAD AND GAIN G = OPA74 SMALL-SIGNAL OVERSHOOT (%) vs CAPACITIVE LOAD 7 7 Overshoot (%) G = Overshoot (%) G = +5 2 G = +5 2 k k k k Load Capacitance Value (pf) Capacitance Load (pf) OPA73 SETTLING TIME vs GAIN 5 OPA74 SETTLING TIME vs GAIN Settling Time (µs) %.% Settling Time (µs) %.% Non-Inverting Gain (V/V) Non-Inverting Gain (V/V) 25 V OS PRODUCTION DISTRIBUTION 25 V OS DRIFT PRODUCTION DISTRIBUTION 2 2 Frequency (%) 5 Frequency (%) <. <.5 <.3 <.45 <.6 < < < 3 < 6 < 9 < 2 < 5 < 8 < 2 < 24 < 27 < 3 > 3 Voltage Offset (µv) Voltage Offset (µv/ C) 8 OPA73, OPA74 SBOS8A

9 TYPICAL CHARACTERISTICS (Cont.) At T A = +25 C, V S = ±5V, and R L = 2kΩ, unless otherwise noted. OPA73 SMALL SIGNAL STEP RESPONSE (G = +V/V, R L = 2kΩ, C L = pf) OPA74 SMALL SIGNAL STEP RESPONSE (G = +5V/V, C F = 3pF, R F = kω, C L = pf, R L = 2kΩ,) 5mV/div 5mV/div 5µs/div 5µs/div OPA73 LARGE SIGNAL STEP RESPONSE (G = +V/V, R L = 2kΩ, C L = pf) OPA74 LARGE SIGNAL STEP RESPONSE (G = +5V/V, R L = 2kΩ, C F = 3pF, C L = pf) V/div V/div µs/div 2µs/div OPA73, OPA74 9 SBOS8A

10 APPLICATIONS INFORMATION OPA73 and OPA74 series op amps can operate on 6µA quiescent current from a single (or split) supply in the range of 4V to 2V (±2V to ±6V), making them highly versatile and easy to use. The OPA73 is unity-gain stable and offers MHz bandwidth and.6v/µs slew rate. The OPA74 is optimized for gains of 5 or greater with a 3MHz bandwidth and 3V/µs slew rate. Rail-to-rail input and output swing helps maintain dynamic range, especially in low supply applications. Figure shows the input and output waveforms for the OPA73 in unitygain configuration. Operation is from a ±5V supply with a kω load connected to V S /2. The input is a Vp-p sinusoid. Output voltage is approximately Vp-p. 2.V/div Input Output (inverted on scope) 2µs/div G = +, V S = ±5V Power-supply pins should be bypassed with pf ceramic capacitors in parallel with µf tantalum capacitors. OPERATING VOLTAGE OPA73 and OPA74 series op amps are fully specified and guaranteed from +4V to +2V over a temperature range of 4ºC to +85ºC. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Performance Curves. RAIL-TO-RAIL INPUT The input common-mode voltage range of the OPA73 series extends 3mV beyond the supply rails at room temperature. This is achieved with a complementary input stage an N- channel input differential pair in parallel with a P-channel differential pair, as shown in Figure 2. The N-channel pair is active for input voltages close to the positive rail, typically (V+) 2.V to 3mV above the positive supply, while the P- channel pair is on for inputs from 3mV below the negative supply to approximately (V+).5V. There is a small transition region, typically (V+) 2.V to (V+).5V, in which both pairs are on. This 5mV transition region can vary ±mv with process variation. Thus, the transition region (both stages on) can range from (V+) 2.V to (V+).4V on the low end, up to (V+).9V to (V+).6V on the high end. Within the 5mV transition region PSRR, CMRR, offset voltage, and offset drift, and THD may vary compared to operation outside this region. FIGURE. Rail-to-Rail Input and Output. V+ V O V IN + V IN V FIGURE 2. Simplified Schematic. OPA73, OPA74 SBOS8A

11 INPUT VOLTAGE Device inputs are protected by ESD diodes that will conduct if the input voltages exceed the power supplies by more than approximately 3mV. Momentary voltages greater than 3mV beyond the power supply can be tolerated if the current is limited to ma. This is easily accomplished with an input resistor, as shown in Figure 3. Many input signals are inherently current-limited to less than ma; therefore, a limiting resistor is not always required. The OPA73 features no phase inversion when the inputs extend beyond supplies if the input current is limited, as seen in Figure 4. CAPACITIVE LOAD AND STABILITY The OPA73 and OPA74 series op amps can drive up to pf pure capacitive load. Increasing the gain enhances the amplifier s ability to drive greater capacitive loads (see the typical performance curve Small Signal Overshoot vs Capacitive Load ). One method of improving capacitive load drive in the unitygain configuration is to insert a Ω to 2Ω resistor inside the feedback loop, as shown in Figure 5. This reduces ringing with large capacitive loads while maintaining DC accuracy. I OVERLOAD ma max +V OPA73 V OUT V IN OPA73 R S 2Ω V OUT V IN R V C L R L FIGURE 3. Input Current Protection for Voltages Exceeding the Supply Voltage. 2.V/div 2µs/div V S = ±5.V, V IN = Vp-p FIGURE 4. OPA73 No Phase Inversion with Inputs Greater than the Power-Supply Voltage. RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. This output stage is capable of driving kω loads connected to any point between V+ and ground. For light resistive loads (> kω), the output voltage can swing to 4mV from the supply rail. With moderate resistive loads (2kΩ), the output can swing to within 75mV from the supply rails while maintaining high open-loop gain (see the typical performance curve Output Voltage Swing vs Output Current ). FIGURE 5. Series Resistor in Unity-Gain Buffer Configuration Improves Capacitive Load Drive. APPLICATION CIRCUITS Figure 6 shows a G = 5 non-inverting amplifier implemented with the OPA73 and OPA74 op amps. It demonstrates the increased speed characteristics (bandwidth, slew rate and settling time) that can be achieved with the OPA74 family when used in gains of five or greater. Some optimization of feedback capacitor value may be required to achieve best dynamic response. Circuits with closed-loop gains of less than five should use the OPA73 family for good stability and capacitive load drive. The OPA73 can be used in gains greater than five, but will not provide the increased speed benefits of the OPA74 family. The OPA73 series op amps are optimized for driving medium-speed sampling data converters. The OPA73 op amps buffer the converter s input capacitance and resulting charge injection while providing signal gain. Figure 7 shows the OPA273 in a dual-supply buffered reference configuration for the DAC7644. The DAC7644 is a 6-bit, low-power, quad-voltage output converter. Small size makes the combination ideal for automatic test equipment, data acquisition systems, and other low-power spacelimited applications. OPA73, OPA74 SBOS8A

12 3pF 5kΩ 2kΩ 5kΩ 2kΩ OPA73 OPA74 V IN G = 5 V IN G = 5 LARGE-SIGNAL RESPONSE Demonstrates speed improvement that can be achieved with OPA74 family in applications with G 5. 2V/div OPA73 OPA74 5µs/div FIGURE 6. OPA74 Provides higher Speed in G 5. DAC7644 NC NC NC NC 45 +V V OUT A Sense 44 V OUT A 43 V OUT V V REF L AB Sense V REF L AB V REF H AB pF /2 OPA V Ref Negative Reference V REF H AB Sense 39 V+ V OUT B Sense V OUT B V OUT 5pF /2 OPA V Ref Positive Reference V FIGURE 7. OPA73 as Dual Supply Configuration-Buffered References for the DAC OPA73, OPA74 SBOS8A

13 PACKAGE OPTION ADDENDUM 24-Aug-28 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan OPA273EA/25 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA273EA/25G4 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA273EA/2K5 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA273EA/2K5G4 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA273UA ACTIVE SOIC D 8 75 Green (RoHS OPA273UA/2K5 ACTIVE SOIC D 8 25 Green (RoHS OPA273UA/2K5G4 ACTIVE SOIC D 8 25 Green (RoHS OPA274EA/25 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA274EA/25G4 ACTIVE VSSOP DGK 8 25 Green (RoHS OPA274UA ACTIVE SOIC D 8 75 Green (RoHS OPA274UA/2K5 ACTIVE SOIC D 8 25 Green (RoHS OPA274UA/2K5G4 ACTIVE SOIC D 8 25 Green (RoHS OPA473EA/25 ACTIVE TSSOP PW 4 25 Green (RoHS OPA473EA/25G4 ACTIVE TSSOP PW 4 25 Green (RoHS OPA473EA/2K5 ACTIVE TSSOP PW 4 25 Green (RoHS OPA473EA/2K5G4 ACTIVE TSSOP PW 4 25 Green (RoHS OPA473UA ACTIVE SOIC D 4 5 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B3 CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B3 CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B3 CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B3 CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 273UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 273UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 273UA CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B4 CU NIPDAUAG Level-2-26C- YEAR -4 to 85 B4 CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 274UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 274UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 274UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 473EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 473EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 473EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 473EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA473UA Device Marking (4/5) Samples Addendum-Page

14 PACKAGE OPTION ADDENDUM 24-Aug-28 Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan OPA473UAG4 ACTIVE SOIC D 4 5 Green (RoHS OPA474EA/25 ACTIVE TSSOP PW 4 25 Green (RoHS OPA474EA/25G4 ACTIVE TSSOP PW 4 25 Green (RoHS OPA474EA/2K5 ACTIVE TSSOP PW 4 25 Green (RoHS OPA474UA ACTIVE SOIC D 4 5 Green (RoHS OPA73NA/25 ACTIVE SOT-23 DBV 5 25 Green (RoHS OPA73NA/25G4 ACTIVE SOT-23 DBV 5 25 Green (RoHS OPA73NA/3K ACTIVE SOT-23 DBV 5 3 Green (RoHS OPA73NA/3KG4 ACTIVE SOT-23 DBV 5 3 Green (RoHS OPA73PA ACTIVE PDIP P 8 5 Green (RoHS OPA73UA ACTIVE SOIC D 8 75 Green (RoHS OPA73UA/2K5 ACTIVE SOIC D 8 25 Green (RoHS OPA74NA/25 ACTIVE SOT-23 DBV 5 25 Green (RoHS OPA74NA/25G4 ACTIVE SOT-23 DBV 5 25 Green (RoHS OPA74NA/3K ACTIVE SOT-23 DBV 5 3 Green (RoHS OPA74NA/3KG4 ACTIVE SOT-23 DBV 5 3 Green (RoHS OPA74UA ACTIVE SOIC D 8 75 Green (RoHS OPA74UA/2K5 ACTIVE SOIC D 8 25 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA473UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 474EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 474EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 474EA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA474UA CU NIPDAU Level-2-26C- YEAR -4 to 85 A3 CU NIPDAU Level-2-26C- YEAR -4 to 85 A3 CU NIPDAU Level-2-26C- YEAR -4 to 85 A3 CU NIPDAU Level-2-26C- YEAR -4 to 85 A3 CU NIPDAU Call TI N / A for Pkg Type -4 to 85 OPA73PA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 73UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 73UA CU NIPDAU Level-2-26C- YEAR -4 to 85 A4 CU NIPDAU Level-2-26C- YEAR -4 to 85 A4 CU NIPDAU Level-2-26C- YEAR -4 to 85 A4 CU NIPDAU Level-2-26C- YEAR -4 to 85 A4 CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 74UA CU NIPDAU Level-2-26C- YEAR -4 to 85 OPA 74UA Device Marking (4/5) Samples Addendum-Page 2

15 PACKAGE OPTION ADDENDUM 24-Aug-28 () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all RoHS substances, including the requirement that RoHS substance do not exceed.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS79B low halogen requirements of <=ppm threshold. Antimony trioxide based flame retardants must also meet the <=ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

16 PACKAGE MATERIALS INFORMATION 2-Sep-25 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W (mm) A (mm) B (mm) K (mm) P (mm) W (mm) Pin Quadrant OPA273EA/25 VSSOP DGK Q OPA273EA/2K5 VSSOP DGK Q OPA273UA/2K5 SOIC D Q OPA274EA/25 VSSOP DGK Q OPA274UA/2K5 SOIC D Q OPA473EA/25 TSSOP PW Q OPA473EA/2K5 TSSOP PW Q OPA474EA/25 TSSOP PW Q OPA474EA/2K5 TSSOP PW Q OPA73NA/25 SOT-23 DBV Q3 OPA73NA/3K SOT-23 DBV Q3 OPA73UA/2K5 SOIC D Q OPA74NA/25 SOT-23 DBV Q3 OPA74NA/3K SOT-23 DBV Q3 OPA74UA/2K5 SOIC D Q Pack Materials-Page

17 PACKAGE MATERIALS INFORMATION 2-Sep-25 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA273EA/25 VSSOP DGK OPA273EA/2K5 VSSOP DGK OPA273UA/2K5 SOIC D OPA274EA/25 VSSOP DGK OPA274UA/2K5 SOIC D OPA473EA/25 TSSOP PW OPA473EA/2K5 TSSOP PW OPA474EA/25 TSSOP PW OPA474EA/2K5 TSSOP PW OPA73NA/25 SOT-23 DBV OPA73NA/3K SOT-23 DBV OPA73UA/2K5 SOIC D OPA74NA/25 SOT-23 DBV OPA74NA/3K SOT-23 DBV OPA74UA/2K5 SOIC D Pack Materials-Page 2

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19 SCALE 4. PACKAGE OUTLINE DBV5A SOT mm max height SMALL OUTLINE TRANSISTOR C C PIN INDEX AREA B A.45 MAX 5.9 2X X C A B 4 (.).5 TYP..25 GAGE PLANE.22 TYP.8 8 TYP.6 TYP.3 SEATING PLANE /C 4/27 NOTES:. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y4.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-78.

20 DBV5A EXAMPLE BOARD LAYOUT SOT mm max height SMALL OUTLINE TRANSISTOR 5X (.) PKG 5X (.6) 5 2 SYMM (.9) 2X (.95) 3 4 (R.5) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:5X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL.7 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED).7 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS /C 4/27 NOTES: (continued) 4. Publication IPC-735 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

21 DBV5A EXAMPLE STENCIL DESIGN SOT mm max height SMALL OUTLINE TRANSISTOR 5X (.6) 5X (.) PKG 5 2X(.95) 2 SYMM (.9) 3 4 (R.5) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON.25 mm THICK STENCIL SCALE:5X /C 4/27 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design.

22 SCALE 4. PACKAGE OUTLINE DBV5A SOT mm max height SMALL OUTLINE TRANSISTOR C C PIN INDEX AREA B A.45 MAX 5.9 2X X C A B 4 (.).5 TYP..25 GAGE PLANE.22 TYP.8 8 TYP.6 TYP.3 SEATING PLANE /C 4/27 NOTES:. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y4.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-78.

23 DBV5A EXAMPLE BOARD LAYOUT SOT mm max height SMALL OUTLINE TRANSISTOR 5X (.) PKG 5X (.6) 5 2 SYMM (.9) 2X (.95) 3 4 (R.5) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:5X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL.7 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED).7 MIN ARROUND SOLDER MASK DEFINED SOLDER MASK DETAILS /C 4/27 NOTES: (continued) 4. Publication IPC-735 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

24 DBV5A EXAMPLE STENCIL DESIGN SOT mm max height SMALL OUTLINE TRANSISTOR 5X (.6) 5X (.) PKG 5 2X(.95) 2 SYMM (.9) 3 4 (R.5) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON.25 mm THICK STENCIL SCALE:5X /C 4/27 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design.

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