Current Mirrors & Current steering Circuits:

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Denis Arnold
5 years ago
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1 Current Mirrors & Current steering Circuits: MOS Current Steering Circuits: Once a constant current is generated, it can be replicated to provide DC bias currents for the various amplifier stages in the IC. Current mirrors can obviously be used to implement this current steering function. Figure 8 shows a simple current steering circuit To ensure operation in the saturation region, the voltages at the drains of Q2 and Q3 are constrained as follows: where Vov1 is the overdrive voltage at which Q1, Q2, and Q3 are operating. In other words, the drains of Q2 and (Q3 will have to remain higher than - Vss by at least the overdrive voltage, which is usually a few tenths of a volt. Continuing our discussion of the circuit in Fig. 8, we see that current I3 is fed to the input side of a current mirror formed by PMOS transistors Q4 and Qs. This mirror provides

2 where V0V5 is the overdrive voltage at which Q5 is operating. Finally, an important point to note is that while Q2 pulls its current I2 from a load (not shown in Fig. 8), Q5 pushes its current I5 into a load (not shown in Fig. 8). Thus Q5 is appropriately called a current source, whereas Q2 should more properly be called a current sink. In an IC, both current sources and current sinks are usually needed. BJT Circuits: The basic BJT current mirror is shown in Fig. 9. It works in a fashion very similar to that of the MOS mirror. However, there are two important differences: First, the nonzero base current of the BJT (or, equivalently, the finite β) causes an error in the current transfer ratio of the bipolar mirror. Second, the current transfer ratio is determined by the relative areas of the emitter-base junctions of Q1, and Q2. Let us first consider the case when β is sufficiently high so that we can neglect the base currents. The reference current IRFF is passed through the diode-connected transistor Q1 and thus establishes a corresponding voltage VBE, which in turn is applied between base and emitter of Q2. Now, if Q2 is matched to Q1 or, more specifically, if the EBJ area of Q2 is the same as that of Q1 and thus Q2 has the same scale current Is as Q1, then the collector current of Q2 will be equal to that of Q1; that is, Io = IREF. (19) For this to happen, however, Q2 must be operating in the active mode, which in turn is achieved so long as the collector voltage V0 is 0.3 V or so higher than that of the emitter. To obtain a current transfer ratio other than unity, say m, we simply arrange that the area of the EBJ of Q2 is m times that of Q1. In this case, Io = m IREF. (20)

3 Figure : 10 Analysis of the current mirror taking into account the finite β of the BJTs In general, the current transfer ratio is given by Alternatively, if the area ratio m is an integer, one can think of Q2 as equivalent to m transistors, each matched to Q1 and connected in parallel. Next we consider the effect of finite transistor β on the current transfer ratio. The analysis for the case in which the current transfer ratio is nominally unity that is, for the case in which Q2 is matched to Q1 is illustrated in Fig. 10. The key point here is that since Q1 and Q2 are matched and have the same VBE, their collector currents will be equal. The rest of the analysis is straightforward. A node equation at the collector of Q1

4 Note that as β approaches, IREF approaches the nominal value of unity. For typical values of β, however, the error in the current transfer ratio can be significant. For instance, β = 100 results in a 2% error in the current transfer ratio. Furthermore, the error due to the finite β increases as the nominal current transfer ratio is increased. It can be shown that for a mirror with a nominal current transfer ratio m that is, one in which IS2=mIS1 the actual current transfer ratio is given by Where VA2 and ro2 are the Early voltage and the output resistance, respectively, of Q2. Thus even if we neglect the error due to finite β, the output current I0 will be at its nominal value only when Q2 has the same VCE as Q1, namely at V0 = VBE. As V0 is increased, I0 will correspondingly increase. Taking both the finite β and the finite R0 into account, we can express the output current of a BJT mirror with a nominal current transfer ratio m as We may observe, the error term due to the Early effect reduces to zero for V0 = VBE. EXERCISE Consider a BJT current mirror with a nominal current transfer ratio of unity. Let the transistors have Is = A, β = 100, and VA = 100 V. For IREF = 1 ma, find I0 when V0 = 5V. Also, find the output resistance. Ans ma: 100 k A Simple Current Source Just in the same way as MOS, the basic BJT current mirror can be used to implement a simple current source, as shown in Fig. 11. Here the reference current is

5 Current Steering: The current-steering approach described for MOS circuits can be applied in the bipolar case, which can be used to generate bias currents for amplifier stages in an IC. As an example, consider the circuit shown in Fig. 12. The diode-connected transistor Q1, resistor R, and the diode-connected transistor Q2, generate the required Iref We assume, for the sake of simplicity that all the transistors have high β and thus that the base currents are very much negligible. The Early effect is also neglected. The diode connected transistor Q1 and Q3 form a current mirror. So, Q3 will supply a constant current I1 equal to IREF. Transistor Q3 can supply this current to any load as long as the voltage that develops at the collector does not exceed (Vcc-0.3V); If it exceeds, Q3 enters the saturation region.

6 To generate a dc current twice the value of IREF, TWO transistors, Q5 and Q6, each of which is matched to Q1, are connected in parallel, and the combination forms a mirror with Q1. Thus I3 = 2IREF. The parallel combination of Q5 and Q6 is equivalent to a transistor with an EBJ area double of Q1 which is actually done when this circuit is fabricated in IC form. Q4 forms a mirror with Q2; so Q4 provides a constant current I2, which equals IREF. If Q3 sources its current to parts of the circuit whose voltage should not exceed Vcc - 0.3V. Q4 sinks its current from parts of the circuit whose voltage should not decrease below, -VEE V. To generate a current three times IREF. Three transistors, Q7, Q8 and Q9 each of which is matched to Q2, are connected in parallel, and the combination is placed in a mirror arrangement with Q2. Again, in an IC implementation, Q7, Q8, and Q9 shall be replaced with a transistor having a EBJ area three times that of Q2.

Current Mirrors. Basic BJT Current Mirror. Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror.

Current Mirrors. Basic BJT Current Mirror. Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror. Current Mirrors Basic BJT Current Mirror Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror. For its analysis, we assume identical transistors and neglect