Nanophotonics for low latency optical integrated circuits
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1 Nanophotonics for low latency optical integrated circuits Akihiko Shinya NTT Basic Research Labs., Nanophotonics Center, NTT Corporation MPSoC 17, Annecy, France Outline Low latency optical circuit BDD based optical circuit Cascaded BDD Optical matrix multiplication Photonic crystal technology Small capacitance optical devices optical gate, light source, receiver 1
2 Computing at light speed! Target Light speed processor Eliminating latency bottleneck New optical computing technology Approach Replacement of critical path with photonic devices. Calculation simply by propagating the light through the electrically controlled optical pass gates. Nanophotonics for shortening the critical path X Y Electrically controlled optical pass gates (critical path) Simultaneous gate control by parallelized input signals F1 F2 F1 F2 F1 F2 Ans.1 Ans.2 Ans.3 光化された経路最短化されたクリティカルパス Critical path = signal route determining calculation time 2 RC delay in CMOS circuit Delay [ps] Generation [nm] SIA, National technology roadmap for semiconductors, 1997 edition Sum of Delay Interconnect Delay Gate delay Limited around 1 ps As CMOS gets smaller, Gate delay decreases, Interconnect delay increases 3
3 BDD based optical circuit BDD (Binary Decision Diagram) x 1 x 2 x 3 Output Merits (1) Instantaneous construction of output path via simultaneous gate control [ps] (2) Calculation simply by propagating the light through the pathway. (3) Calculation with light propagation speed! Optical signal is not affected by RC! The shorter the gate, the faster the calculation. 4 Optical parallel adder Mach Zehnder interferometer Proposed by Dr. Ishihara, Kyoto Univ. y i x i L = 1 m (pass delay = 1ps) C = 2 ff Gating time = 25 ps ~ 1 um One digit calculation Photonics: 1ps/digit CMOS: ~ 22 ps/digit The shorter the gate, the faster the calculation. 5
4 Cascaded BDD N (Total inputs) OE OE Merits (1) Multi input logic gate with very large number of input (S > 4) is available. (2) Cascading of multi input gate dramatically reduces the calculation step from N to log S (N). S input logic gate OE N S CMOS (S=2) Multi input function via serially connected gates (S>4) is available! = Delay [5ps/div] No cascading Cascading (S=1) 1 Copyright 217 Input NTT corp. N 1 1 All Rights Reserved. 6 Optical matrix multiplication Oxford Univ., W. R. Clements et al., Optica 3, 146 (216) Multiport interferometer Activation Multiport interferometer f Y j Multiport interferometer {X 1 } {X 2 } {X n } Y w j i ij X i Activation Nonliner Productsum Productsum Z w Y j i ij i. 7
5 Building blocks for on chip optical circuit Electrically driven ultrashort gate P 1P 2 Serially connected gates (S ~ 1 2 ) Fast Multi input logic functionality. No CR limitation for propagating light. Cascading of serially connected gates Reduction of cal. step from N to log s (N) Requirements Very short optical gate High efficiency EO/OE convertor (light source, receiver) Ultralow threshold laser S input logic gate High efficiency O/E conversion w/o electrical amplifier 8 Toward low capacitance optical device 1 af 1 af 1 ff 1 ff 1 ff 1 pf (high loss) Plasmonics Photonics Electronics Single electron (~1 af) Size (C) Latency (RC) Energy (CV 2 ) CMOS gate (~ ff) Photonic crystal (<1 ff) Plasmonic modulator (5 ff) Si photonics Ge receiver (4 5 ff) Conventional InGaAs receiver (2 ff) 9
6 Photonic Crystal Photonic crystal An artificial dielectric made by using nanotechnology 1 What is photonic crystal? Natural Photonic Crystal Butterfly Artificial Photonic Crystal Photonic crystal on Si wafer Opal 11
7 Analogy between Electronic and Photonic Crystal Electronic crystal Photonic crystal Ex. Si Period ~.1nm = electronic wavelength Various electrical properties Conductor Semi conductor Insulator Period ~ 1 nm = optical wavelength New optical properties Optical insulator Slow light Negative refraction 12 2D Photonic Crystal Electron beam lithography & Dry etching SOI Si Si K SiO 2 Radius: 1 nm Si sub. Transmittance (db) -1-2 Photonic band gap Wavelength (nm) 13
8 Why photonic crystal? Metal mirror absorption Fiber bending loss Photonic crystal strong confinement sharp bending Optical absorption Leakage at bending Light is completely confined Large scale photonic integration 14 What can photonic crystals do? Toroid cavity Micro-disk Micro-post Photonic Crystal V = >1( /n) 3 Q=1 8 V =6( /n) 3 V =5( /n) 3 V = ( /n) 3 Q= Q=1 3 Q= ( /n): light wavelength in cavity Ultrasmall high-q cavity Small footprint (~ m 2 ) Strong light matter interaction fj/bit & Mbit photonics 15
9 High efficiency light to voltage conversion w/o amplifier InGaAs Air 5 nm NTT, K. Nozaki et al., Optica 3, 483 (216) InP Air 1.7 m 4 kv/w Best candidate for amplifier free photodetector Ctheory =.3~.5 ff f3db = 28.5 GHz Typical amp. = 4 fj 16 Bias free operation Electrode NTT, K. Nozaki et al., CLEO, STh4N.1 (217) n-inp p-inp light iinp Electrode Length = 35 m IPD PD R Vout 4 Gbit/s 2 Gbit/s Vbias 17
10 Ultralow threshold laser p-inp Lateral p i n structure n-inp 1 4 NTT, K. Takeda et al., Nature Photon. 7, 569 (213) Trench Output waveguide p-inp: Zn diffusion Embedded active region m 3 n-inp: Si ion implantation World's lowest threshold for any type of laser diode Energy cost (fj/bit) fj/bit VCSEL Datacom Active region area ( m 2 ) DFB laser Telecom Nanocavity laser Computercom 18 Bit Error Rate Measurement w/o 5 termination & optical amplifier Bit error rate Gbit/s NRZ signal: A 1 A 15 A 2 A 25 A APD received power (dbm) Energy cost (fj/bit) Off chip BER<1 9 BER 1 5 ~ 1 6 On chip Bias current ( A) BER < 2&25 µa Limited by coupling loss Energy cost < 5 fj/bit 19
11 Ultra short pass/block gate EAM: electrical amplitude modulator NTT, K. Nozaki et al., APL Photonics 2, 5615 (217) i-inp 1.55 m light n-inp Electrode C theory = 13 ff Energy = 1.8 Electrode p-inp InGaAsP InP Air bridge Pass delay ~ 1 ps/1 m 5 nm 4 Gbit/s 56 Gbit/s ER ~ 6.7 V pp = 2 V Input 2 Extinction vs Voltage EAM length L EAM = 15 um Extinction vs Voltage V = +.5 V L EAM = 15 um 7 um Normalized by spectrum of +.5V Voltage [V] um 21
12 Ultracompact O E O convertor Direct combination of PD and EAM NTT, K. Nozaki, IPC, TuD3.1 (215) Photodetector Optica l Input Optical output Intensity [a.u.] Optical input to PD (1 Gbit/s) Time [ns] Optical carrier Modulator Intensity [a.u.] Optical output form EAM Time [ns] 22 Summary Computation at light speed BDD based circuits and their cascading enable very low latency calculation. If optical pass gate is 1 1 m long, 1 1 times faster than CMOS (potentially). Requirements for photonic device Short optical pass gates Highly effective E/O, O/E and O/E/O conversion Nanophotonic device technology This work was supported by CREST, JST. 23
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