MODIFIED CASCADED MULTILEVEL INVERTER WITH GA TO REDUCE LINE TO LINE VOLTAGE THD
|
|
- Nathaniel Fitzgerald
- 6 years ago
- Views:
Transcription
1 INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14) ISSN (Print) ISSN (Online) Volume 5, Issue 12, December (2014), pp IAEME: Journal Impact Factor (2014): (Calculated by GISI) IJEET I A E M E MODIFIED CASCADED MULTILEVEL INVERTER WITH GA TO REDUCE LINE TO LINE VOLTAGE THD JULYMOL JOSEPH 1, ARYA PRAKASH 2 1,2 EEE Department, Sree Narayana Gurukulam College of Engineering, Kadayiruppu,India, ABSTRACT The major problems associated with multilevel inverters are the harmonic content present at the output of the inverter and the requirements of large number of switches, which will increase the switching losses, thereby reduce the efficiency and overall cost of the inverter is increased. In this paper, an H-bridge inverter topology with reduced switch count technique is introduced. This technique reduces the number of controlled switches used in conventional multilevel inverter. To establish a single phase system, the proposed multilevel inverter requires one H-bridge and a multi conversion cell. A multi conversion cell consists of three equal voltage sources with three controlled switches and three diodes. This paper is based on 7-level inverter and the line voltage THD minimization can be achieved by using Genetic Algorithm (GA) optimization technique. Keywords: Multilevel inverter, Cascaded Multilevel Inverter, H-bridge Inverter, Genetic algorithm (GA), Line-voltage total harmonic distortion (THD), THD minimization. I. INTRODUCTION An inerter is a power electronic device, which is used to convert DC power to AC power at desired output voltage and frequency [1], [2]. A two-level inverter has demerits like less efficiency, high cost and high switching losses. To overcome these demerits, multilevel inverters are proposed. The concept of multi level inverter has been introduced since 1975 began with 3- level inverter [3]. The different multilevel inverter topologies are diode clamped, flying capacitor and cascaded multilevel inverter [4]. By comparing these topologies we can found that cascaded multilevel inverter with separate DC sources is more efficient than other structures. The separate DC sources, which may be obtained from batteries, fuel cells or solar cells. Multilevel inverter output voltage produces a staircase waveform, this waveform looks like a sinusoidal waveform. The multilevel inverter output voltage having less number of harmonics compared to the conventional bipolar inverter output voltage. If the multilevel inverter output increases to N-level, the harmonics reduced to zero. In this paper harmonic reduction in 7 level inverter is discussed. The THD minimization is achieved by using Genetic Algorithm (GA) optimization technique. GA is an efficient method, by which the switching angles are determined so as to minimize the waveform THD while the desired fundamental component is generated. Phase voltage has a simple and unique waveform, and its THD can be easily formulated [5], compared to the line - to- line voltage which changes the form as switching angles vary. Therefore, in THD minimization of a multilevel inverter s output, it is quite common to apply the minimization algorithm on the phase voltage [6], [7]. In three-phase three-wire applications, however, the inverter lineto-line voltage is of the main concern, since it determines the load-voltage harmonic contents. 32
2 The rest of this paper is organized as follows. Section II discuss about cascaded multilevel inverter. In Section III, is devoted to describing briefly about modified cascaded multilevel inverter. In Section IV the stepped waveform of a multilevel inverter s output voltage and its harmonic components are described. In Section V the THD minimization strategy is explained, and then, it is applied to the phase voltage and line voltage of the inverter in Section VI, followed by discussion and comparison of the results in Section VII. Finally, there is a conclusion in Section VIII. II. CASCADED MULTILEVEL INVERTER (CMLI) The output voltage of cascaded multilevel inverter is equal to sum of the output voltages of the individual bridges and can be controlled to produce a staircase waveform. The general structure of cascaded multilevel inverter for a single phase system is shown in Figure 1. Each separate voltage source Vdc1, Vdc2, Vdc3 is connected in cascade with other sources via a special H-bridge circuit associated with it. Each H-bridge circuit consists of four active switching elements that can make the output voltage either positive or negative polarity; or it can also be simply zero volts which depends on the switching condition of switches in the circuit. This multilevel inverter topology employs three voltage sources of unequal magnitudes. It is fairly easy to generalize the number of distinct levels [8],[9]. The S number of sources or stages and the associated number of output level can be written as follows, N=2S+1...(1) (a) (b) Fig 1: conventional cascaded multilevel inverter, (a) single phase, (b) 3 phase 33
3 Fig 2: typical output waveform for cascaded multilevel inverter Figure 2 shows the typical output voltage waveform of a seven level cascaded multilevel inverter with three separate DC sources. III. MODIFIED MULTILEVEL INVERTER This inverter consists of a multi conversion cell and an H bridge. A multi conversion cell consists of three separate voltage sources (Vdc1, Vdc2, Vdc3), each source connected in cascade with other sources via a circuit consists of one active switching element and one diode that can make the output voltage source only in positive polarity with several levels[10]. Only one H-bridge is connected with multi conversion cell to acquire both positive and negative polarity. By turning on controlled switches S1 (S2 and S3 turn off) the output voltage +1Vdc (first level) is obtained. Similarly turning on of switches S1, S2 (S3 turn off) +2Vdc (second level) output is produced across the load. Similarly +3Vdc levels can be achieved by turning on S1, S2, S3 switches as shown in Table I. The S number of DC sources or stages and the associated number of output level can be calculated by using the equation as follows, N=2S+1... (2) Fig 3: Topology for modified cascaded multilevel inverter (single phase) 34
4 Conventional 7 level cascaded H bridge inverter using 12 switches per phase, but proposed modified cascaded multilevel inverter using only seven switches per phase. This is the main advantage of modified cascaded multilevel inverter. TABLE 1: Basic Operation of Proposed Multilevel Inverter SI.NO: Multi-conversion Cell H-Bridge Voltage level ON switches OFF switches ON switches OFF switches 1 S1,S2,S3 D1,D2,D3 Q1,Q2 Q3,Q4 +1Vdc 2 S1,S2,D3 S3,D1,D2 Q1,Q2 Q3,Q4 +2Vdc 3 S1,D2,D3 S2,S3,D1 Q1,Q2 Q3,Q4 +3Vdc 4 D1,D2,D3 S1,S2,S3 Q1,Q2 Q3,Q4 0 5 S1,D2,D3 S2,S3,D1 Q3,Q4 Q1,Q2-1Vdc 6 S1,S2,D3 S3,D1,D2 Q3,Q4 Q1,Q2-2Vdc 7 S1,S2,S3 D1,D2,D3 Q3,Q4 Q1,Q2-3Vdc The switching table for modified cascaded multilevel inverter is shown in Table I. It depicts that for each voltage level; only one of the switches is in ON condition among the paralleled switches. Multi conversion cell converts DC voltage into a stepped DC voltage, which is outputted as a stepped or approximately sinusoidal AC waveform by the H-bridge inverter. In this H-bridge, for positive half cycle, switches Q1 and Q2 will be turned on, similarly for negative half cycle switches Q3 and Q4 must be in ON condition. Figure 2 shows the typical output voltage waveform of a seven level cascaded multilevel inverter with three separate DC sources. Fig 4: Typical output voltage waveform of a modified cascaded multilevel inverter Table II shows that the modified cascaded multilevel inverter involves only seven switches whereas conventional inverter comprises twelve switches, but in both cases input voltage at each stage and output level are same. Therefore the proposed modified cascaded multilevel inverter has less switching losses, simple control circuit and less complexity than conventional cascaded multilevel inverter. 35
5 TABLE II: Comparison of Conventional and Modified Cascaded Multilevel Inverter SI NO: Name of topology Total number of DC input(s) Number of phase voltage level(n) Number of line voltage level Number of switches used Number of switches for 7 level 1 2 Cascaded multilevel inverter Modified cascaded multilevel inverter 3 2S+1=7 2N-1=13 4S S+1=7 2N-1=13 S+4 7 IV.MULTILEVEL INVERTER S OUTPUT VOLTAGE Fig. 5 shows a half cycle of a typical stepped waveform of the phase voltage of a seven-level inverter. The other half cycle is the same but in the opposite direction. Assuming a symmetrical waveform, only three angles α1,α2, and α3 are required to determine the whole cycle of the waveform[11], where α1, α2, and α3 are the switching angles of the three H-bridges in cascaded multilevel inverter as well as the switching angles of multi-conversion cell in modified cascaded multilevel inverter, forming the seven-level inverter. Fig 5: half cycle of the phase voltage waveform of 7 level inverter Fourier analysis of such a waveform yields the following expression for the rms value of fundamental and harmonic components of the phase voltage;...(3) Because of quarter-wave symmetry in the waveform, it contains odd-order harmonics only. The fundamental voltage at n=1; The rms value of phase voltage as;...(4)...(5) 36
6 The line voltage Vab is obtained by subtracting Vb from Va. Because of symmetry, the fundamental components of the phase voltages Va and Vb have the same amplitude and 120 o phase difference. Therefore, the rms value of the line-voltage fundamental component is 3 times that of the fundamental component of the phase voltage V.THD MINIMIZATION VL1= 3V1 THD minimization is achieved by reducing the harmonic component at the inverter s output voltage. The aim is to determine the optimum switching angles that generate an output voltage with the required fundamental component and the possible minimum THD. This is a problem to be solved by an optimization algorithm. Conventional method using Newton-Raphson method. This method is derivative dependant and it needs good initial guess [12] and no guarantee to be optimum. Providing a good guess is very difficult in most cases. It has computational burden and is time consuming. More than one solution is possible with different modulation indices. The limitations of the Newton Raphson method is eliminated by using Genetic algorithm based optimization technique. Genetic algorithm optimization technique is applied to MLI to determine optimum switching angles. VI. GENETIC ALGORITHM One of the most important problems of power inverter is finding the desired harmonic frequency for representing the transmitted signal with low power consuming, so, to eliminate specific order harmonics, the switching angles must be calculated. Genetic Algorithm (GA) is a method used for solving both constrained and unconstrained optimization problems based on natural selection, the process that drives biological evolution. GA has been introduced since 1960 by John Holland & David Goldberg. GA is used which is a simple, powerful, and evolutionary technique, inspired from the laws of natural selection and genetics. It is a general-purpose stochastic global search algorithm, with no need of functional derivative information to search for the solutions that minimize (or maximize) a given objective function. GA reduces the computational burden and search time, while solving complex objective functions [13]. Algorithm 1. Find the no: of variables specific to the problem, this will be the no: of genes in a chromosome. 2. Set the population size & initialize the population with random angles between 0 & (π/2). 3. If α1< α2< α3<... αm<(π/2) for getting quarter wave symmetry, then go to next step otherwise repeat above. 4. Computation of fitness function F(α). 5. Pick the best individuals. 6. Create new set of values using crossover & mutation process. 7. When solution is converged, and then finds the switching angles, otherwise repeat for next generation. Fitness function = ( V V 7 2 )...(6) This fitness function is used to minimize the lower order harmonics (ie; 5 th & 7 th ). In three phase application the effect of third order harmonics and their multiples (ie,9,15,21 etc) are negligible. This is the reason for selecting 5 th and 7 th harmonic component for THD minimization. VII. SIMULATION RESULTS Simulation done on both conventional and proposed topologies of cascaded multilevel inverter. Without applying any optimization techniques the switching angles are calculated by trial and error method. In this method the switching pulses for each switch can be varied manually in each simulation and they are tabulated. From the table we can found that the output waveform THD is varies with the variation of switching pulses or we can say that the output voltage THD is a function of switching angles. After applying GA, with appropriate fitness function the optimum switching angles for minimum THD can be calculated. GA Result Number of iterations = 200 Optimum firing angles are α1 = rad =7.816 o α2 = rad = o α3 = 0.65 rad =37.24 o V1=607.3(peak), 429.4(rms) THD=7.33% 37
7 Fig 6: simulation model Fig 7: switching pattern 38
8 Fig 8: phase voltage waveform Fig 9: line voltage waveform Fig 10: FFT analysis without THD minimization 39
9 In FFT analysis without THD minimization the switching angles are calculated randomly. Fig 11: FFT analysis with THD minimization By applying switching angles obtained from GA in Fourier analysis, we can found that the lower order harmonics have lesser magnitude as well as higher order harmonics have higher magnitude. Again the higher order harmonics can be effectively reduced by proper filter design. GA Result α1= =7.816 o rad TABLE III: FFT Analysis with THD Minimization Measured fundamental Measured component Magnitude of harmonic component (% of fundamental) V1 V5 V7 V11 V13 V α2 = rad = o Calculated fundamental component V1 Calculated Magnitude of harmonic component (% of fundamental) V5 V7 V11 V13 V17 α3 = 0.65 rad =37.24 o VIII. CONCLUSION This paper revealed that proposed modified multilevel inverter topology with reduced number of switches can be implemented for industrial drive applications. This multilevel inverter structure and its basic operations have been discussed elaborately. A detailed procedure for calculating required voltage level on each stage has been conversed. As conventional seven level inverter involves twelve switches, it increases switching losses, cost and circuit complexity The proposed inverter engages only seven switches with three diodes, which reduces switching losses, cost and circuit complexity. Moreover it effectively diminishes lower order harmonics. Therefore effective reduction of total harmonics distortion is achieved. This thesis work concentrate on the reduction of usage of number of switches and THD minimization of 7 level inverter. This work can be extended to 9 level or higher levels, because as the number of levels increases the THD value reduced to zero. Also we can improve the circuit with minimum number of switches, as the number of switches reduces the switching losses will be reduced thereby the efficiency can be improved. 40
10 REFERENCES 1. K. Sivakumar, A. Das, R. Ramchand, C. Patel, and K. Gopakumar, A five-level inverter scheme for a four-pole induction motor drive by feeding the identical voltage-profile windings from both sides, IEEE Trans. Ind.Electron., vol. 57, no. 8, pp , Aug F. Khoucha, S. M. Lagoun, K. Marouani, A. Kheloui, and M. El Hachemi Benbouzid, Hybrid cascaded H- Bridge multilevel-inverter inductionmotor- drive direct torque control for automotive applications, IEEE Trans. Ind. Electron., vol. 57, no. 3, pp , Mar R. H. Baker and L. H. Bannister, Electric Power Converter, U.S. Patent , Feb Jose Rodriguez, Jin-Sheng Lai and Fang Zheng, Multilevel Inverters: A survey of topologies, Control applications, IEEE transactions on Industrial Electronics, Vol.49, No. 4, pp ,August L. A. Tolbert, F. Z. Peng, T. Cunnyngham, and J. N. Chiasson, Charge balance control schemes for cascademultilevel converter in hybrid electric vehicles, IEEE Trans. Ind. Electron., vol. 49, no. 5, pp , Oct Y. Sahali and M. K. Fellah, Comparison between optimal minimization of total harmonic distortion and harmonic elimination with voltage control candidates for Y. Sahali and M. K. Fellah, Comparison between optimal minimization of total harmonic distortion and harmonic elimination with voltage control candidates for multilevel inverters, J. Elect. Syst., vol. 1, no. 3, pp , Sep Y. Sahali and M. K. Fellah, Application of the optimal minimization of the THD technique to the multilevel symmetrical inverters and study of its performance in comparison with the selective harmonic elimination technique, in Proc. IEEE Int. SPEEDAM, May 23 26, 2006, pp K.A.Corzine, M.W. Wielebski, F.Z Peng, and J.Wang, Control of cascaded multilevel inverters, IEEE Trans. Power Electron., Vol.19, No.3, pp , May K.A. Corzine, F.A.Hardick, and Y.L.Familiant, A cascaded multilevel inverter H-Bridge inverter utilizing capacitor voltage source, Proceeding of the IASTED International Conference, Power and Energy Systems, pp , Feb.24-26, J.Rodriguez, J.S.Lai and F.Z.Peng, Multilevel inverters: Survey of topologies, controls, and applications, IEEE Trans. Ind.Appl. Vol.49, No.4, pp , Aug H.S. Patel and R.G. Hoft, Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part I Harmonic Elimination, IEEE Trans. Ind.Appl., 3, pp , J.Sun and H.Grotstollen, Solving Nonlinear equations for Selective harmonic eliminated PWM using predicted initial values, in Proc.Int.Conf.Industrial Electronics, Control, Instrumentation, Automation, 1992, pp K. El-Naggar and T. H. Abdelhamid, Selective harmonic elimination of new family of multilevel inverters using genetic algorithms, Energy Convers. Manage., vol. 49, no. 1, pp , Jan N. Veeramuthulingam, S. Santhoshma and Thebinaa Venugopal, Hopfield Neural Network Based Selective Harmonic Elimination For H-Bridge Inverter International Journal of Electrical Engineering & Technology (IJEET), Volume 4, Issue 4, 2013, pp , ISSN Print : , ISSN Online:
Harmonic Reduction in Induction Motor: Multilevel Inverter
International Journal of Multidisciplinary and Current Research Research Article ISSN: 2321-3124 Available at: http://ijmcr.com Harmonic Reduction in Induction Motor: Multilevel Inverter D. Suganyadevi,
More informationDWINDLING OF HARMONICS IN CML INVERTER USING GENETIC ALGORITHM OPTIMIZATION
Volume 117 No. 16 2017, 757-76 ISSN: 1311-8080 (printed version); ISSN: 131-3395 (on-line version) url: http://www.ijpam.eu ijpam.eu DWINDLING OF HARMONICS IN CML INVERTER USING GENETIC ALGORITHM OPTIMIZATION
More informationHarmonic Minimization for Cascade Multilevel Inverter based on Genetic Algorithm
Harmonic Minimization for Cascade Multilevel Inverter based on Genetic Algorithm Ranjhitha.G 1, Padmanaban.K 2 PG Scholar, Department of EEE, Gnanamani College of Engineering, Namakkal, India 1 Assistant
More informationCHAPTER 5 PERFORMANCE EVALUATION OF SYMMETRIC H- BRIDGE MLI FED THREE PHASE INDUCTION MOTOR
85 CHAPTER 5 PERFORMANCE EVALUATION OF SYMMETRIC H- BRIDGE MLI FED THREE PHASE INDUCTION MOTOR 5.1 INTRODUCTION The topological structure of multilevel inverter must have lower switching frequency for
More informationKeywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.
A Simplified Topology for Seven Level Modified Multilevel Inverter with Reduced Switch Count Technique G.Arunkumar*, A.Prakash**, R.Subramanian*** *Department of Electrical and Electronics Engineering,
More informationTHD Minimization in Single Phase Symmetrical Cascaded Multilevel Inverter Using Programmed PWM Technique
THD Minimization in Single Phase Symmetrical Cascaded Multilevel Using Programmed PWM Technique M.Mythili, N.Kayalvizhi Abstract Harmonic minimization in multilevel inverters is a complex optimization
More informationAnalysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI
Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI Srinivas Reddy Chalamalla 1, S. Tara Kalyani 2 M.Tech, Department of EEE, JNTU, Hyderabad, Andhra Pradesh, India 1 Professor,
More informationLow Order Harmonic Reduction of Three Phase Multilevel Inverter
Journal of Scientific & Industrial Research Vol. 73, March 014, pp. 168-17 Low Order Harmonic Reduction of Three Phase Multilevel Inverter A. Maheswari 1 and I. Gnanambal 1 Department of EEE, K.S.R College
More informationCARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS
CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS 1 S.LEELA, 2 S.S.DASH 1 Assistant Professor, Dept.of Electrical & Electronics Engg., Sastra University, Tamilnadu, India
More informationReduced PWM Harmonic Distortion for a New Topology of Multilevel Inverters
Asian Power Electronics Journal, Vol. 1, No. 1, Aug 7 Reduced PWM Harmonic Distortion for a New Topology of Multi Inverters Tamer H. Abdelhamid Abstract Harmonic elimination problem using iterative methods
More informationThe Selective Harmonic Elimination Technique for Harmonic Reduction of Multilevel Inverter Using PSO Algorithm
The Selective Harmonic Elimination Technique for Harmonic Reduction of Multilevel Inverter Using PSO Algorithm Maruthupandiyan. R 1, Brindha. R 2 1,2. Student, M.E Power Electronics and Drives, Sri Shakthi
More informationSPECIFIC HARMONIC ELIMINATION SCHEME FOR NINELEVEL CASCADED H- BRIDGE INVERTER FED THREE PHASE INDUCTION MOTOR DRIVE
SPECIFIC HARMONIC ELIMINATION SCHEME FOR NINELEVEL CASCADED H- BRIDGE INVERTER FED THREE PHASE INDUCTION MOTOR DRIVE A. Maheswari, Dr. I. Gnanambal Department of EEE, K.S.R College of Engineering, Tiruchengode,
More informationModified Hybrid Multilevel Inverter for Induction Motor Using Solar energy
Modified Hybrid Multilevel Inverter for Induction Motor Using Solar energy Satheeswaran.K PG Scholar/Dept of EEE K.S.Rangasamy College of Technology, Tiruchengode, Namakkal, India raajsathees@gmail.com
More informationANALYSIS AND SIMULATION OF CASCADED FIVE AND SEVEN LEVEL INVERTER FED INDUCTION MOTOR
ANALYSIS AND SIMULATION OF CASCADED FIVE AND SEVEN LEVEL INVERTER FED INDUCTION MOTOR MANOJ KUMAR.N 1, KALIAPPAN.E 2, CHELLAMUTHU.C 3 1 Assistant Professor, Department of EEE, R.M.K Engineering College,
More informationCOMPARATIVE ANALYSIS OF SELECTIVE HARMONIC ELIMINATION OF MULTILEVEL INVERTER USING GENETIC ALGORITHM
COMPARATIVE ANALYSIS OF SELECTIVE HARMONIC ELIMINATION OF MULTILEVEL INVERTER USING GENETIC ALGORITHM S.Saha 1, C.Sarkar 2, P.K. Saha 3 & G.K. Panda 4 1&2 PG Scholar, Department of Electrical Engineering,
More informationTotal Harmonic Distortion Minimization of Multilevel Converters Using Genetic Algorithms
Applied Mathematics, 013, 4, 103-107 http://dx.doi.org/10.436/am.013.47139 Published Online July 013 (http://www.scirp.org/journal/am) Total Harmonic Distortion Minimization of Multilevel Converters Using
More informationKeywords Asymmetric MLI, Fixed frequency phase shift PWM (FFPSPWM), variable frequency phase shift PWM (VFPSPWM), Total Harmonic Distortion (THD).
Radha Sree. K, Sivapathi.K, 1 Vardhaman.V, Dr.R.Seyezhai / International Journal of Vol. 2, Issue4, July-August 212, pp.22-23 A Comparative Study of Fixed Frequency and Variable Frequency Phase Shift PWM
More informationAnalysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor
Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor Nayna Bhargava Dept. of Electrical Engineering SATI, Vidisha Madhya Pradesh, India Sanjeev Gupta
More informationCOMPARISON STUDY OF THREE PHASE CASCADED H-BRIDGE MULTI LEVEL INVERTER BY USING DTC INDUCTION MOTOR DRIVES
International Journal of Science, Engineering and Technology Research (IJSETR), Volume 3, Issue 5, May 214 COMPARISON STUDY OF THREE PHASE CASCADED H-BRIDGE MULTI LEVEL INVERTER BY USING DTC INDUCTION
More informationAustralian Journal of Basic and Applied Sciences. Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives
AENSI Journals Australian Journal of Basic and Applied Sciences ISSN:1991-8178 Journal home page: www.ajbasweb.com Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives 1
More informationAn Implementation of 9-Level MLI using IPD-Topology for Harmonic Reduction
Volume-6, Issue-4, July-August 2016 International Journal of Engineering and Management Research Page Number: 456-460 An Implementation of 9-Level MLI using IPD-Topology for Harmonic Reduction Harish Tata
More informationII. WORKING PRINCIPLE The block diagram depicting the working principle of the proposed topology is as given below in Fig.2.
PIC Based Seven-Level Cascaded H-Bridge Multilevel Inverter R.M.Sekar, Baladhandapani.R Abstract- This paper presents a multilevel inverter topology in which a low switching frequency is made use taking
More informationKeywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion.
Analysis Of Total Harmonic Distortion Using Multicarrier Pulse Width Modulation M.S.Sivagamasundari *, Dr.P.Melba Mary ** *(Assistant Professor, Department of EEE,V V College of Engineering,Tisaiyanvilai)
More informationSimulation of Cascade H-Bridge Multilevel Inverter With Equal DC Voltage Source
Simulation of Cascade H-Bridge Multilevel Inverter With Equal DC Voltage Source Ramakant Shukla 1, Rahul Agrawal 2 PG Student [Power electronics], Dept. of EEE, VITS, Indore, Madhya pradesh, India 1 Assistant
More informationGA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches
Proceedings of the World Congress on Engineering and Computer Science 215 Vol I GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches Hulusi Karaca, Enes Bektaş
More informationA Novel Cascaded Multilevel Inverter Using A Single DC Source
A Novel Cascaded Multilevel Inverter Using A Single DC Source Nimmy Charles 1, Femy P.H 2 P.G. Student, Department of EEE, KMEA Engineering College, Cochin, Kerala, India 1 Associate Professor, Department
More informationSpeed Control of Induction Motor using Multilevel Inverter
Speed Control of Induction Motor using Multilevel Inverter 1 Arya Shibu, 2 Haritha S, 3 Renu Rajan 1, 2, 3 Amrita School of Engineering, EEE Department, Amritapuri, Kollam, India Abstract: Multilevel converters
More informationTHD Minimization of 3-Phase Voltage in Five Level Cascaded H- Bridge Inverter
IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE) e-issn: 2278-676,p-ISSN: 2320-333, Volume, Issue 2 Ver. I (Mar. Apr. 206), PP 86-9 www.iosrjournals.org THD Minimization of 3-Phase Voltage
More informationSimulation and Experimental Results of 7-Level Inverter System
Research Journal of Applied Sciences, Engineering and Technology 3(): 88-95, 0 ISSN: 040-7467 Maxwell Scientific Organization, 0 Received: November 3, 00 Accepted: January 0, 0 Published: February 0, 0
More informationA New Multilevel Inverter Topology with Reduced Number of Power Switches
A New Multilevel Inverter Topology with Reduced Number of Power Switches L. M. A.Beigi 1, N. A. Azli 2, F. Khosravi 3, E. Najafi 4, and A. Kaykhosravi 5 Faculty of Electrical Engineering, Universiti Teknologi
More informationInternational Journal of Advance Engineering and Research Development
Scientific Journal of Impact Factor(SJIF): 3.134 e-issn(o): 2348-4470 p-issn(p): 2348-6406 International Journal of Advance Engineering and Research Development Volume 2,Issue 4, April -2015 Reduction
More informationLiterature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches
Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches P.Bhagya [1], M.Thangadurai [2], V.Mohamed Ibrahim [3] PG Scholar [1],, Assistant Professor [2],
More informationStudy of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor
Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor Pinky Arathe 1, Prof. Sunil Kumar Bhatt 2 1Research scholar, Central India Institute of Technology, Indore, (M. P.),
More informationSwitching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive
pp 36 40 Krishi Sanskriti Publications http://www.krishisanskriti.org/areee.html Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive Ms. Preeti 1, Prof. Ravi Gupta 2 1 Electrical
More informationComparison of GA and PSO Algorithms in Cascaded Multilevel Inverter Using Selective Harmonic Elimination PWM Technique
ISSN (Print) : 30 3765 ISSN (Online): 78 8875 (An ISO 397: 007 Certified Organization) Vol. 3, Issue 4, April 014 Comparison of GA and PSO Algorithms in Cascaded Multilevel Inverter Using Selective Harmonic
More informationReduction of Power Electronic Devices with a New Basic Unit for a Cascaded Multilevel Inverter fed Induction Motor
International Journal for Modern Trends in Science and Technology Volume: 03, Issue No: 05, May 2017 ISSN: 2455-3778 http://www.ijmtst.com Reduction of Power Electronic Devices with a New Basic Unit for
More informationA New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications
I J C T A, 9(15), 2016, pp. 6983-6992 International Science Press A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications M. Arun Noyal Doss*, K. Harsha**, K. Mohanraj*
More informationCASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES
CASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES A.Venkadesan 1, Priyatosh Panda 2, Priti Agrawal 3, Varun Puli 4 1 Asst Professor, Electrical and Electronics Engineering, SRM University,
More informationMultilevel Inverter for Single Phase System with Reduced Number of Switches
IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE) e-issn: 2278-1676 Volume 4, Issue 3 (Jan. - Feb. 2013), PP 49-57 Multilevel Inverter for Single Phase System with Reduced Number of Switches
More informationINTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET)
INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the 2 nd International Conference on Current Trends in Engineering and Management ICCTEM -2014 ISSN 0976 6545(Print)
More information15-LEVEL CASCADE MULTILEVEL INVERTER USING A SINGLE DC SOURCE ABSTRACT
ISSN 225 48 Special Issue SP 216 Issue 1 P. No 49 to 55 15-LEVEL CASCADE MULTILEVEL INVERTER USING A SINGLE DC SOURCE HASSAN MANAFI *, FATTAH MOOSAZADEH AND YOOSOF POUREBRAHIM Department of Engineering,
More informationHybrid Cascaded H-bridges Multilevel Motor Drive Control for Electric Vehicles
Hybrid Cascaded H-bridges Multilevel Motor Drive Control for Electric Vehicles Zhong Du, Leon M. Tolbert,, John N. Chiasson, Burak Ozpineci, Hui Li 4, Alex Q. Huang Semiconductor Power Electronics Center
More informationCOMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION
COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION Mahtab Alam 1, Mr. Jitendra Kumar Garg 2 1 Student, M.Tech, 2 Associate Prof., Department of Electrical & Electronics
More informationSymmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network
International Journal of Engineering Research and Development e-issn: 2278-067X, p-issn: 2278-800X, www.ijerd.com Volume 12, Issue 10 (October 2016), PP.70-74 Symmetrical Multilevel Inverter with Reduced
More informationSIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs.
SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER Atulkumar Verma, Prof. Mrs. Preeti Khatri Assistant Professor pursuing M.E. Electrical Power Systems in PVG s College
More informationAnalysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid
Analysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid Mr.D.Santhosh Kumar Yadav, Mr.T.Manidhar, Mr.K.S.Mann ABSTRACT Multilevel inverter is recognized as an important
More informationAN INVERTED SINE PWM SCHEME FOR NEW ELEVEN LEVEL INVERTER TOPOLOGY
AN INVERTED SINE PWM SCHEME FOR NEW ELEVEN LEVEL INVERTER TOPOLOGY Surya Suresh Kota and M. Vishnu Prasad Muddineni Sri Vasavi Institute of Engineering and Technology, EEE Department, Nandamuru, AP, India
More informationSELECTIVE HARMONIC ELIMINATION ON A MULTILEVEL INVERTER USING ANN AND GE- NETIC ALGORITHM OPTIMIZATION
International Journal of Scientific & Engineering Research, Volume 7, Issue 5, May-2016 143 SELECTIVE HARMONIC ELIMINATION ON A MULTILEVEL INVERTER USING ANN AND GE- NETIC ALGORITHM OPTIMIZATION SINDHU
More informationNEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER
NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER 1 C.R.BALAMURUGAN, 2 S.P.NATARAJAN. 3 M.ARUMUGAM 1 Arunai Engineering College, Department of EEE, Tiruvannamalai,
More informationADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS
Volume 120 No. 6 2018, 7795-7807 ISSN: 1314-3395 (on-line version) url: http://www.acadpubl.eu/hub/ http://www.acadpubl.eu/hub/ ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS Devineni
More informationImplementation of Novel Low Cost Multilevel DC-Link Inverter with Harmonic Profile Improvement
Implementation of Novel Low Cost Multilevel DC-Lin Inverter with Harmonic Profile Improvement R. Kavitha 1 P. Dhanalashmi 2 Rani Thottungal 3 Abstract Harmonics is one of the most important criteria that
More informationA COMPARITIVE STUDY OF THREE LEVEL INVERTER USING VARIOUS TOPOLOGIES
A COMPARITIVE STUDY OF THREE LEVEL INVERTER USING VARIOUS TOPOLOGIES Swathy C S 1, Jincy Mariam James 2 and Sherin Rachel chacko 3 1 Assistant Professor, Dept. of EEE, Sree Buddha College of Engineering
More informationPerformance Evaluation of a Cascaded Multilevel Inverter with a Single DC Source using ISCPWM
International Journal of Electrical Engineering. ISSN 0974-2158 Volume 5, Number 1 (2012), pp. 49-60 International Research Publication House http://www.irphouse.com Performance Evaluation of a Cascaded
More informationADVANCES in NATURAL and APPLIED SCIENCES
ADVANCES in NATURAL and APPLIED SCIENCES ISSN: 1995-0772 Published BY AENSI Publication EISSN: 1998-1090 http://www.aensiweb.com/anas 2016 March 10(3): pages 152-160 Open Access Journal Development of
More informationThree Phase 11-Level Single Switch Cascaded Multilevel Inverter
The International Journal Of Engineering And Science (IJES) Volume 3 Issue 3 Pages 19-25 2014 ISSN(e): 2319 1813 ISSN(p): 2319 1805 Three Phase 11-Level Single Switch Cascaded Multilevel Inverter Rajmadhan.D
More informationSINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION
SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION T.Ramachandran 1, P. Ebby Darney 2 and T. Sreedhar 3 1 Assistant Professor, Dept of EEE, U.P, Subharti Institute of Technology
More informationPERFORMANCE ENHANCEMENT OF EMBEDDED SYSTEM BASED MULTILEVEL INVERTER USING GENETIC ALGORITHM
Journal of ELECTRICAL ENGINEERING, VOL. 62, NO. 4, 2011, 190 198 PERFORMANCE ENHANCEMENT OF EMBEDDED SYSTEM BASED MULTILEVEL INVERTER USING GENETIC ALGORITHM Maruthu Pandi PERUMAL Devarajan NANJUDAPAN
More informationCascaded Connection of Single-Phase & Three-Phase Multilevel Bridge Type Inverter
Cascaded Connection of Single-Phase & Three-Phase Multilevel Bridge Type Inverter Mukesh Kumar Sharma 1 Ram Swaroop 2 Mukesh Kumar Kuldeep 3 1 PG Scholar 2 Assistant Professor 3 PG Scholar SIET, SIKAR
More informationHybrid 5-level inverter fed induction motor drive
ISSN 1 746-7233, England, UK World Journal of Modelling and Simulation Vol. 10 (2014) No. 3, pp. 224-230 Hybrid 5-level inverter fed induction motor drive Dr. P.V.V. Rama Rao, P. Devi Kiran, A. Phani Kumar
More informationThree Phase 15 Level Cascaded H-Bridges Multilevel Inverter for Motor Drives
American-Eurasian Journal of Scientific Research 11 (1): 21-27, 2016 ISSN 1818-6785 IDOSI Publications, 2016 DOI: 10.5829/idosi.aejsr.2016.11.1.22817 Three Phase 15 Level Cascaded H-Bridges Multilevel
More informationInternational Journal Of Engineering And Computer Science ISSN: Volume 2 Issue 12 December, 2013 Page No Abstract
www.ijecs.in International Journal Of Engineering And Computer Science ISSN:2319-7242 Volume 2 Issue 12 December, 2013 Page No. 3566-3571 Modelling & Simulation of Three-phase Induction Motor Fed by an
More informationHARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES USING GENETIC ALGORITHMS
HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES USING GENETIC ALGORITHMS C. Udhaya Shankar 1, J.Thamizharasi 1, Rani Thottungal 1, N. Nithyadevi 2 1 Department of EEE,
More informationNon-Carrier based Digital Switching Angle Method for 81-level Trinary Cascaded Hybrid Multi-level Inverter using VHDL Coding
Non-Carrier based Digital Switching Angle Method for 81-level Trinary Cascaded Hybrid Multi-level Inverter using VHDL Coding Joseph Anthony Prathap 1, Dr.T.S.Anandhi 2 Research Scholar, Dept. of EIE, Annamalai
More informationISSN Vol.05,Issue.05, May-2017, Pages:
WWW.IJITECH.ORG ISSN 2321-8665 Vol.05,Issue.05, May-2017, Pages:0777-0781 Implementation of A Multi-Level Inverter with Reduced Number of Switches Using Different PWM Techniques T. RANGA 1, P. JANARDHAN
More informationIMPLEMENTATION OF MULTILEVEL INVERTER WITH MINIMUM NUMBER OF SWITCHES FOR DIFFERENT PWM TECHNIQUES
IMPLEMENTATION OF MULTILEVEL INVERTER WITH MINIMUM NUMBER OF SWITCHES FOR DIFFERENT PWM TECHNIQUES 1 P.Rajan * R.Vijayakumar, **Dr.Alamelu Nachiappan, **Professor of Electrical and Electronics Engineering
More informationSeries Parallel Switched Multilevel DC Link Inverter Fed Induction Motor
Advance in Electronic and Electric Engineering. ISSN 2231-1297, Volume 4, Number 4 (2014), pp. 327-332 Research India Publications http://www.ripublication.com/aeee.htm Series Parallel Switched Multilevel
More informationA New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity
A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity Prakash Singh, Dept. of Electrical & Electronics Engineering Oriental Institute of Science & Technology Bhopal,
More informationSimulation of Single Phase Multilevel Inverters with Simple Control Strategy Using MATLAB
Simulation of Single Phase Multi Inverters with Simple Control Strategy Using MATLAB Rajesh Kr Ahuja 1, Lalit Aggarwal 2, Pankaj Kumar 3 Department of Electrical Engineering, YMCA University of Science
More informationOptimal PWM Method based on Harmonics Injection and Equal Area Criteria
Optimal PWM Method based on Harmonics Injection and Equal Area Criteria Jin Wang Member, IEEE 205 Dreese Labs; 2015 Neil Avenue wang@ece.osu.edu Damoun Ahmadi Student Member, IEEE Dreese Labs; 2015 Neil
More informationMATLAB Implementation of a Various Topologies of Multilevel Inverter with Improved THD
2016 IJSRSET Volume 2 Issue 3 Print ISSN : 2395-1990 Online ISSN : 2394-4099 Themed Section: Engineering and Technology MATLAB Implementation of a Various Topologies of Multilevel Inverter with Improved
More informationCASCADED SWITCHED-DIODE TOPOLOGY USING TWENTY FIVE LEVEL SINGLE PHASE INVERTER WITH MINIMUM NUMBER OF POWER ELECTRONIC COMPONENTS
CASCADED SWITCHED-DIODE TOPOLOGY USING TWENTY FIVE LEVEL SINGLE PHASE INVERTER WITH MINIMUM NUMBER OF POWER ELECTRONIC COMPONENTS K.Tamilarasan 1,M.Balamurugan 2, P.Soubulakshmi 3, 1 PG Scholar, Power
More informationACTIVE POWER ELECTRONIC TRANSFORMER A STANDARD BUILDING BLOCK FOR SMART GRID
INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14) ISSN 0976 6545(Print) ISSN 0976
More informationISSN: International Journal of Science, Engineering and Technology Research (IJSETR) Volume 1, Issue 5, November 2012
Modified Approach for Harmonic Reduction in Multilevel Inverter Nandita Venugopal, Saipriya Ramesh, N.Shanmugavadivu Department of Electrical and Electronics Engineering Sri Venkateswara College of Engineering,
More informationReduction of THD in Thirteen-Level Hybrid PV Inverter with Less Number of Switches
Circuits and Systems, 2016, 7, 3403-3414 Published Online August 2016 in SciRes. http://www.scirp.org/journal/cs http://dx.doi.org/10.4236/cs.2016.710290 Reduction of THD in Thirteen-Level Hybrid PV Inverter
More informationCHAPTER 3 CASCADED H-BRIDGE MULTILEVEL INVERTER
39 CHAPTER 3 CASCADED H-BRIDGE MULTILEVEL INVERTER The cascaded H-bridge inverter has drawn tremendous interest due to the greater demand of medium-voltage high-power inverters. It is composed of multiple
More informationVERY HIGH VOLTAGE BOOST CONVERTER BASED ON BOOT STRAP CAPACITORS AND BOOST INDUCTORS USED FOR PHOTOVOLTAIC APPLICATION USING MPPT
INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14) ISSN 0976 6545(Print) ISSN 0976
More informationDESIGN 3-PHASE 5-LEVELS DIODE CLAMPED MULTILEVEL INVERTER USING MATLAB SIMULINK
DESIGN 3-PHASE 5-LEVELS DIODE CLAMPED MULTILEVEL INVERTER USING MATLAB SIMULINK Ryanuargo 1 Setiyono 2 1,2 Jurusan Teknik Elektro, Fakultas Tekonologi Industri, Universitas Gunadarma 1 argozein@gmail.com
More informationHybrid Five-Level Inverter using Switched Capacitor Unit
IJIRST International Journal for Innovative Research in Science & Technology Volume 3 Issue 04 September 2016 ISSN (online): 2349-6010 Hybrid Five-Level Inverter using Switched Capacitor Unit Minu M Sageer
More informationBhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.
Performance Analysis of Three Phase Five-Level Inverters Using Multi-Carrier PWM Technique Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.
More informationTHREE PHASE SEVENTEEN LEVEL SINGLE SWITCH CASCADED MULTILEVEL INVERTER FED INDUCTION MOTOR
International Journal of Advanced Research in Engineering and Technology (IJARET) Volume 7, Issue 4, July-August 2016, pp. 72 78, Article ID: IJARET_07_04_010 Available online at http://www.iaeme.com/ijaret/issues.asp?jtype=ijaret&vtype=7&itype=4
More informationA NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE
A NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE G.Kumara Swamy 1, R.Pradeepa 2 1 Associate professor, Dept of EEE, Rajeev Gandhi Memorial College, Nandyal, A.P, India 2 PG Student
More informationHarmonic Analysis & Filter Design for a Novel Multilevel Inverter
Harmonic Analysis & Filter Design for a Novel Multilevel Inverter Rashmy Deepak 1, Sandeep M P 2 RNS Institute of Technology, VTU, Bangalore, India rashmydeepak@gmail.com 1, sandeepmp44@gmail.com 2 Abstract
More informationPerformance and Analysis of Hybrid Multilevel Inverter fed Induction Motor Drive
Vol.2, Issue.2, Mar-Apr 2012 pp-346-353 ISSN: 2249-6645 Performance and Analysis of Hybrid Multilevel Inverter fed Induction Motor Drive CHEKKA G K AYYAPPA KUMAR 1, V. ANJANI BABU 1, K.R.N.V.SUBBA RAO
More informationA Five Level DSTATCOM for Compensation of Reactive Power and Harmonics
International Journal of Engineering Research and Development ISSN: 2278-067X, Volume 1, Issue 11 (July 2012), PP. 23-29 www.ijerd.com A Five Level DSTATCOM for Compensation of Reactive Power and Harmonics
More informationA New Cascaded Multilevel Inverter Fed Permanent Magnet Synchronous Motor By Using Sinusoidal Pulse Width Modulation
A New Cascaded Multilevel Inverter Fed Permanent Magnet Synchronous Motor By Using Sinusoidal Pulse Width Modulation Sravan Kumar Thappeta 1, Ranga.J 2 M. Tech student, Department of EEE, Sree Datta Institute
More informationSimulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System
Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System 1 G.Balasundaram, 2 Dr.S.Arumugam, 3 C.Dinakaran 1 Research Scholar - Department of EEE, St.
More informationLevel Shifted Pulse Width Modulation in Three Phase Multilevel Inverter for Power Quality Improvement
Level Shifted Pulse Width Modulation in Three Phase Multilevel Inverter for Power Quality Improvement S. B. Sakunde 1, V. D. Bavdhane 2 1 PG Student, Department of Electrical Engineering, Zeal education
More informationPhase Shift Modulation of a Single Dc Source Cascaded H-Bridge Multilevel Inverter for Capacitor Voltage Regulation with Equal Power Distribution
Phase Shift Modulation of a Single Dc Source Cascaded H-Bridge Multilevel Inverter for Capacitor Voltage Regulation with Equal Power Distribution K.Srilatha 1, Prof. V.Bugga Rao 2 M.Tech Student, Department
More informationA COMPARATIVE STUDY OF HARMONIC ELIMINATION OF CASCADE MULTILEVEL INVERTER WITH EQUAL DC SOURCES USING PSO AND BFOA TECHNIQUES
ISSN: -138 (Online) A COMPARATIVE STUDY OF HARMONIC ELIMINATION OF CASCADE MULTILEVEL INVERTER WITH EQUAL DC SOURCES USING PSO AND BFOA TECHNIQUES RUPALI MOHANTY a1, GOPINATH SENGUPTA b AND SUDHANSU BHUSANA
More informationPower Quality Improvement Using Cascaded Multilevel Statcom with Dc Voltage Control
RESEARCH ARTICLE OPEN ACCESS Power Quality Improvement Using Cascaded Multilevel Statcom with Dc Voltage Control * M.R.Sreelakshmi, ** V.Prasannalakshmi, *** B.Divya 1,2,3 Asst. Prof., *(Department of
More informationComparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods
International Journal of Engineering Research and Applications (IJERA) IN: 2248-9622 Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods Ch.Anil Kumar 1, K.Veeresham
More informationReal-Time Selective Harmonic Minimization in Cascaded Multilevel Inverters with Varying DC Sources
Real-Time Selective Harmonic Minimization in Cascaded Multilevel Inverters with arying Sources F. J. T. Filho *, T. H. A. Mateus **, H. Z. Maia **, B. Ozpineci ***, J. O. P. Pinto ** and L. M. Tolbert
More informationDesign and Analysis of a Novel Multilevel Inverter Topology Suitable for Renewable Energy Sources Interfacing to AC Grid for High Power Applications
International Journal of Scientific and Research Publications, Volume 3, Issue 5, May 2013 1 Design and Analysis of a Novel Multilevel Inverter Topology Suitable for Renewable Energy Sources Interfacing
More informationMultilevel Inverter for Grid-Connected PV SystemEmploying MPPT and PI Controller
Multilevel Inverter for Grid-Connected PV SystemEmploying MPPT and PI Controller Seena M Varghese P. G. Student, Department of Electrical and Electronics Engineering, Saintgits College of Engineering,
More informationSimulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink
International Journal of Electrical Engineering. ISSN 0974-2158 Volume 7, Number 3 (2014), pp. 367-376 International Research Publication House http://www.irphouse.com Simulation of Five-Level Inverter
More informationSingle Phase Multi- Level Inverter using Single DC Source and Reduced Switches
DOI: 10.7763/IPEDR. 2014. V75. 12 Single Phase Multi- Level Inverter using Single DC Source and Reduced Switches Varsha Singh 1 +, Santosh Kumar Sappati 2 1 Assistant Professor, Department of EE, NIT Raipur
More information29 Level H- Bridge VSC for HVDC Application
29 Level H- Bridge VSC for HVDC Application Syamdev.C.S 1, Asha Anu Kurian 2 PG Scholar, SAINTGITS College of Engineering, Kottayam, Kerala, India 1 Assistant Professor, SAINTGITS College of Engineering,
More informationPerformance Metric of Z Source CHB Multilevel Inverter FED IM for Selective Harmonic Elimination and THD Reduction
Circuits and Systems, 2016, 7, 3794-3806 http://www.scirp.org/journal/cs ISSN Online: 2153-1293 ISSN Print: 2153-1285 Performance Metric of Z Source CHB Multilevel Inverter FED IM for Selective Harmonic
More informationCAPACITOR VOLTAGE BALANCING IN SINGLE PHASE SEVEN-LEVEL PWM INVERTER
Journal of Research in Engineering and Applied Sciences CAPACITOR VOLTAGE BALANCING IN SINGLE PHASE SEVEN-LEVEL PWM INVERTER Midhun G, 2Aleena T Mathew Assistant Professor, Department of EEE, PG Student
More informationCascaded Hybrid Seven Level Inverter with Different Modulation Techniques for Asynchronous Motor
International Journal of Science, Engineering and Technology Research (IJSETR), Volume 3, Issue 11, November 214 Cascaded Hybrid Seven Level Inverter with Different Modulation Techniques for Asynchronous
More information