Small Signal Amplifier Design and Measurement

Transcription

1 undamentals of Circuit Design with ow Noise Oscillators. Jeremy Everard Copyright John Wiley & ons td IBNs: (Hardback); (Electronic) 3 mall ignal Amplifier Design and Measurement 3. Introduction o far device models and the parameter sets have been presented. It is now important to develop the major buildg blocks of modern circuits and this chapter will cover amplifier design. The amplifier is usually required to provide low noise ga with low distortion at both small and large signal levels. It should also be stable, i.e. not generate unwanted spurious signals, and the performance should rema constant with time. A further requirement is that the amplifier should provide good reverse isolation to prevent, for example, O breakthrough from re-radiatg via the aerial. The put and output match are also important when, for example, filters are used as these require accurate termations to offer the correct performance. If the amplifier is beg connected directly to the aerial it may be mimum noise that is required and therefore the match may not be so critical. It is usually the case that mimum noise and optimum match do not occur at the same pot and a circuit technique for achievg low noise and optimum match simultaneously will be described. or an amplifier we therefore require:. Maximum/specified ga through correct matchg and feedback.. ow noise. 3. ow distortion. 4. table operation.

2 98 undamentals of Circuit Design 5. ilterg of unwanted signals. 6. Time dependent operation through accurate and stable biasg which takes to account device to device variation and drift effects caused by variations temperature and ageg. It has been mentioned that parameter manipulation is a great aid to circuit design and this chapter we will concentrate on the use of y and parameters for amplifier design. Both will therefore be described. 3. Amplifier Design Usg Admittance Parameters A y parameter representation of a two port network is shown igure 3.. Usg these parameters, the put and output impedances/admittances can be calculated terms of the y parameters and arbitrary source and load admittances. tability, ga, matchg and noise performance will then be discussed. igure 3. y parameter representation of an amplifier The basic y parameter equations for a two port network are: I yv y V (3.) I y V y V (3.) rom equation (3.):

3 mall ignal Amplifier Design and Measurement 99 I Y y V y (3.3) V V Calculate V from equation 3.: V I y y V (3.4) ubstitutg (3.4) (3.3): Y I y V y y (3.5) V I yv Dividg top and bottom by V : Y I V y y y y y y y y (3.6) y y imilarly for Y out : Y out y Y y y (3.7) y Y can therefore be seen to be dependent on the load admittance Y. imilarly Y out is dependent on the source admittance Y. The effect is reduced if y (the reverse transfer admittance) is low. If y is zero, Y becomes equal to y and Y out becomes equal to y. This is called the unilateral assumption. 3.. tability When the real part e(y ) and/or e(y out ) are negative the device is producg a negative resistance and is therefore likely to be unstable causg potential oscillation. If equations (3.6) and (3.7) are examed it can be seen that any of the parameters could cause stability. However, if y is large, this part of the put impedance is lower and the device is more likely to be stable. In fact placg a resistor across (or sometimes series with) the put or output or both is a

4 undamentals of Circuit Design common method to ensure stability. This degrades the noise performance and it is often preferable to place a resistor only across the output. Note that as y tends to zero this also helps as long as the real part of y is positive. The device is unconditionally stable if for all positive g s and g the real part of Y is greater than zero and the real part of Y out is greater than zero. The imagary part can of course be positive or negative. In other words the real put and output impedance is always positive for all source and loads which are not negative resistances. Note that when an amplifier is designed the stability should be checked at all frequencies as the impedance of the matchg network changes with frequency. An example of a simple stability calculation showg the value of resistor required for stability is shown the equivalent section on parameters later this chapter. John vill [3] from tanford developed the vill stability parameter: C y y g g e( y y ) (3.8) where g is the real part of y. The device is unconditionally stable if C is positive and less than one. tern [4] developed another parameter: k ( g G) y y e ( g G) ( y y ) (3.9) which is stable if k >. This is different from the vill [3] factor that the tern [4] factor cludes source and load admittances. The tern factor is less strgent as it only guarantees stability for the specified loads. Care needs to be taken when usg the stability factors software packages as a large K is sometimes used to defe the verse of the vill or tern criteria ummary for tability To mata stability the e(y ) and the e(y out ) for all the loads presented to the amplifier over the whole frequency range. The device is unconditionally stable when the above applies for all e(y ) and all e(y ). Note that the imagary part of the source and load can be any value.

5 mall ignal Amplifier Design and Measurement 3.. Amplifier Ga Now exame the ga of the amplifier. The ga is dependent on the ternal ga of the device and the closeness of the match that the device presents to the source and load. As long as the device is stable maximum ga is obtaed for best match. It is therefore important to defe the ga. There are a number of ga defitions which clude the available power ga and transducer ga. The most commonly used ga is the transducer ga and this is defed here: P P Power delivered to the load Power available from the source G T (3.) AV To calculate this, the output voltage is required terms of the put current. Usg the block diagram igure 3.. V V Y I Y Y y I y y Y y (3.) I ( Y y ) (3.) ( Y y)( Y y ) y y To calculate V remember that: I y V y V (3.) Takg (3.) therefore: V I y y V (3.3) As V is also equal to I /Y then I -V Y and: V V Y y V (3.4) y

6 undamentals of Circuit Design V Y y yv (3.5) y V V yv y Y y y y V Y (3.6) (3.7) ubstitutg equation (3.) equation (3.7): V I ( Y y )( Y y ) y y y (3.8) As P V G where G is the real part of Y : P I G y (3.9) ( ys y)( Y y) y y The power available from the source is the power available when matched so: P AV I (3.) G Therefore the transducer ga is: P 4GG y GT (3.) P AV ( Y y)( Y y) y y

7 mall ignal Amplifier Design and Measurement 3 or maximum ga we require a match at the put and the output; therefore Y Y * and Y Y out *, where * is the complex conjugate. emember, however, that as the load is changed so is the put impedance. With considerable manipulation it is possible to demonstrate full conjugate matchg on both the put and output as long as the device is stable. The source and load admittances for perfect match are therefore as given Gonzalez []: G g [( g g e( y y )) y y ] ( y y ) Im B b g (3.) (3.3) G G g g ( y y ) Im B b g (3.4) (3.5) Y G jb Y G jb (3.6) The actual transducer ga for full match requires substitution of equations (3.) to (3.6) the G T equation (3.) Unilateral Assumption A common assumption to ease analysis is to assume that y, i.e. assume that the device has zero feedback. This is the unilateral assumption where * Y y and Y y *. As: G T P P AV 4G G ( Y y)( Y y) y y y (3.7)

8 4 undamentals of Circuit Design y G T (3.8) 4g g This is the maximum unilateral ga often defed as GUM or MUG and is another figure of merit of use amplifier design. This enables fairly easy calculation of the ga achievable from an amplifier as long as y is small and this approximation is regularly used durg amplifier design. 3.3 Tapped C Matchg Circuits Usg the formation obtaed so far it is now possible to design the matchg circuits to obta maximum ga from an amplifier. A number of matchg circuits usg tapped parallel resonant circuits are shown igure 3.. The aim of these matchg circuits is to transform the source and load impedances to the put and output impedances and all of the circuits presented here use reactive components to achieve this. The circuits presented here use ductors and capacitors. igure 3. Tapped parallel resonant matchg circuits

9 mall ignal Amplifier Design and Measurement 5 A tuned amplifier matchg network usg a tapped C matchg circuits will be presented. This is effectively a capacitively tapped parallel resonant circuit. Both tapped C and tapped can be used and operate similar ways. These circuits have the capability to transform the impedance up to the maximum loss resistance of the parallel tuned circuit. The effect of losses will be discussed later. Two component reactive matchg circuits, the form of an network, will be described the section on amplifier design usg parameters and the mith Chart. A tapped C matchg circuit is shown igure 3.a. The aim is to design the component values to produce the required put impedance, e.g. 5Ω for the put impedance of the device which can be any impedance above 5Ω. To analyse the tapped C circuit it is easier to look at the circuit from the high impedance pot as shown igure 3.3. Y C C igure 3.3 Tapped C circuit for analysis The imagary part is then cancelled usg the ductor. Often a tunable capacitor is placed parallel with the ductor to aid tung. Y is therefore required: Y eal Imagary parts G jb (3.9) Initially we calculate Z : / sc Z sc sc (3.3) and with algebra:

10 6 undamentals of Circuit Design Y s CC sc sc sc The real part of Y is therefore: C ω Y ω C ( C ) (3.3) (3.3) The shunt resistive part of Y is therefore : ( C C ) ω ω C If we assume (or ensure) that ω (C C ) greater than, then: (3.33) >, which occurs for loaded Qs C C (3.34) The imagary part of Y is: sω C C ( C C ) ( C ) Y ( imag ) ω C sc (3.35) Makg the same assumption as above and assumg that C is smaller than ω C C (C C ) then: C C C C T C (3.36) This is equivalent to the two capacitors beg added series.

11 mall ignal Amplifier Design and Measurement 7 In conclusion the two important equations are: C C (3.34) and C C C C T C (3.36) These can be further simplified: C C (3.37) Therefore: C C (3.38) As: C T C C C C (3.39) dividg through by C gives:

12 8 undamentals of Circuit Design C C T (3.4) Therefore: C C T (3.4) and: T C C (3.4) as: C C (3.38) T C C (3.43)

13 mall ignal Amplifier Design and Measurement Tapped C Design Example et us match a 5Ω source to a 5K resistor parallel with p at MHz. A block diagram is shown igure 3.4. A 3dB bandwidth of 5 MHz is required. This is typical of the older dual gate MOET. This is an tegrated four termal device which consists of a Cascode of two MOET. A special feature of Cascodes is the low feedback C when gate is decoupled. C feedback for most dual gate MOETs is around to 5f. An extra feature is that varyg the DC bias on gate varies the ga experienced by signals on gate by up to 5dB. This can be used for AGC and mixg. igure 3.4 Tapped C design example To obta the 3dB bandwidth the loaded Q, Q is required: Q ω total f 3dB BW 5 (3.44) total is the total resistance across. This cludes the transformed up source impedance parallel with the put impedance which for a match is equal to 5K/. ωq total k5.. π. 8 nh (3.45) Therefore to obta C T f π C (3.46)

14 undamentals of Circuit Design so: C ( πf ) (3.47) As nh at MHz C res.67p (3.48) C T C res - pf.67p (3.49) 5 C 5 C (3.5) Therefore: C C Thus: 9 (3.5) C 9C (3.5) and: CT CC C C 9CC 9C C (3.53) CT 9 C (3.54) C 9 CT (3.55) C.86pf (3.56) C 9C (or C T ) 6.7Pf (3.57)

15 mall ignal Amplifier Design and Measurement The approximations can be checked to confirm the correct use of the equations if the loaded Q is less than. ω (C C ) should be much greater than one for the approximations to hold. Also ensure that C << ω C C (C C ) for the approximations to hold. 3.4 electivity and Insertion oss of the Matchg Network It is important to consider the effect of component losses on the performance of the circuit. This is because the highest selectivity can only be achieved by makg the loaded Q approach the unloaded Q. However, as shown below, the sertion loss tends towards fity as the loaded Q tends towards the unloaded Q. This is most easily illustrated by lookg at a series resonant circuit as shown igure 3.5. This consists of an C circuit driven by a source and load of Z. The resistor series with the C circuit is used to model losses the ductor/capacitor. igure 3.5 C model for loss resonant circuits Usg the parameters to calculate the transducer ga (remember that V out if the source is volts and the source and load impedances are both the same): V out Z O Z jω ωc (3.58) At resonance: Z Z O (3.59)

16 undamentals of Circuit Design As: Q ω O (3.6) ω Q O (3.6) As: Q O ω Z (3.6) O Z ω Q (3.63) Therefore at resonance: Q ω Q Q ω (3.64) givg: Q Q (3.65) Also note that for df < f : df Q Q jq df ± f o (3.66)

17 mall ignal Amplifier Design and Measurement 3 This can be used to calculate the frequency response further from the centre frequency. emember that: G T P P AV (3.67) P AV (3.68) P ( V ) out (3.69) Therefore as long as : G P ( V ) T out PAV (3.7) As Vout for V source voltage: G T Q Q (3.7) where: Q ω TOTA O ω Z (3.6) Q ω (3.6) loss It is terestg to vestigate the effect of sertion loss on this put matchg network. or a bandwidth of 5 MHz, Q. If we assume that Q, G T (.9) -.9dB loss. The variation sertion loss versus Q /Q is shown igure 3.6 for four different values of Q /Q. or fite Q, Q can be creased towards Q however, the sertion loss (G T ) will tend to fity.

18 4 undamentals of Circuit Design igure 3.6 Variation sertion loss for Q /Q (a). (top) (b).5 (c) /3 (d).9 (bottom) It is therefore possible to trade selectivity for sertion loss. If low noise is required the put matchg network may be set to a low Q to obta low Q /Q as the sertion loss of the matchg circuit will directly add to the noise figure. Note that for lower transformation ratios this is often not a problem. A plot of agast Q /Q is shown igure 3.7 showg that as the sertion loss tends to fity tends to zero and Q tends to Q. igure 3.7 vs Q /Q Measurements of vs Q offer a way of obtag Q. The tersection on the Y axis beg Q. Q o for open coils is typically 3; for open prted coils this reduces to to 5.

19 mall ignal Amplifier Design and Measurement Dual Gate MOET Amplifiers The tapped C matchg circuit can be used for matchg dual gate MOETs. These are tegrated devices which consist of two MOETs cascode. A typical amplifier circuit usg a dual gate MOET is shown igure 3.8. The feedback capacitance is reduced to around 5f as long as gate is decoupled. urther the bias on gate can be varied to obta a ga variation of up to 5dB. or an N channel depletion mode ET, 4 to 5 volts bias on gate (V G ) gives maximum ga. igure 3.8 Dual gate MOET amplifier As an example it is terestg to vestigate the stability of the B98. Takg the vill [3] stability factor: C y y ( ) g g e y y (3.67) where the device is unconditionally stable when C is positive and less than one. We apply this to the device at MHz usg the y parameters from the data sheets: y 3 ( 9.89 ). 3 6 j (3.68)

20 6 undamentals of Circuit Design y j f (3.69) g g kω kω (3.7) (3.7) Therefore the vill [3] stability factor predicts: C 3 j ( 9.89 j) ( 4.5 ) ( 6 ) 3 (3.7) The device is therefore not unconditionally stable as C is greater than one. This is because the feedback capacitance (f) although low, still presents an impedance of similar value to the put and output impedances. To ensure stability it is necessary to crease the put and output admittances effectively by lowerg the resistance across the put and output. This is achieved by designg the matchg network to present a much lower resistance across the put and output. hunt resistors can also be used but these degrade the noise performance if used at the put. Therefore we look at tern [4] stability factor which cludes source and load impedances, where stability occurs for k >. k y ( g G)( g G ) y y e( y y ) 9 y 6 (3.73) (3.74) e 9 ( y y ) 6 (3.75) As the device is stable for k > it is possible to ensure stability by makg (g G ) (g G ) > 34 x -9. One method to ensure stability is to place equal admittances on the I/P and O/P. To achieve this the total put admittance and output admittance are each i.e..9kω. This of course just places the device on the border of stability and therefore lower values should be used. The source and load impedances could therefore be transformed up from, say, 5Ω to kω. The match will also be poor unless resistors are also placed across the put and output of the device. The maximum available ga is also reduced but this is

21 mall ignal Amplifier Design and Measurement 7 usually not a problem as the trsic matched ga is very high at these frequencies. It is also necessary to calculate the stability factors at all other frequencies as the impedances presented across the device by the matchg networks will vary considerably with frequency. It will be shown the next section that the noise performance is also dependent on the source impedance and fact for this device the real part of the optimum source impedance for mimum noise is kω. 3.6 Noise The major noise sources a transistor are:. Thermal noise caused by the random movement of charges.. hot noise. 3. licker noise. The noise generated an amplifier is quantified a number of ways. The noise factor and the noise figure. Both parameters describe the same effect where the noise figure is log(noise factor). This shows the degradation caused by the amplifier where an ideal amplifier has a noise factor of and a noise figure of db. The noise factor is defed as: Total available output noise power Pno (3.76) N Available noise output arisg from the thermal noise the source G P A ni Where G A is the available power ga and P ni is the noise available from the source. The noise power available from a resistor at temperature T is ktb, where k is Boltzmann constant, T is the temperature and B is the bandwidth. rom this the equivalent noise voltage or noise current for a resistor can be derived. et us assume that the put impedance consists of a noiseless resistor driven by a conventional resistor. The conventional resistor can then be represented either as a noiseless resistor parallel with a noise current or as a noiseless resistor series with a noise voltage as shown igures 3.9 and 3. where: i 4 n and: ktb (3.77) e n 4kTB (3.78)

22 8 undamentals of Circuit Design igure 3.9 Equivalent current noise source. igure 3. Equivalent voltage noise source Note that there is often confusion about the noise developed the put impedance of an active device. This is because this impedance is a dynamic AC impedance not a conventional resistor. In other words, r e was dependent on dv/di rather than V/I. or example, if you were to assume that the put impedance was made up of standard resistance then the mimum achievable noise figure would be 3dB. In fact the noise bipolar transistors is caused largely by conventional resistors such as the base spreadg resistance r bb, the emitter contact resistance and shot noise components. In active devices the noise can most easily be described by referrg all the noise sources with the device back to the put. A noisy two port device is often modelled as a noiseless two port device with all the noises with the device transformed to the put as a series noise voltage and a shunt noise current as shown igure 3.. en A en noiseless port igure 3. epresentation of noise a two port

23 mall ignal Amplifier Design and Measurement 9 It is now worth calculatg the optimum source resistance, O, for mimum noise figure. The noise factor for the put circuit is obtaed by calculatg the ratio of the total noise at node A to the noise caused only by the source impedance. N n 4kTB e 4kTB ( i ) n (3.79) Therefore: N n ( i ) e n 4kTB (3.8) Differentiatg the noise factor with respect to : dn d e 4kTB n i n (3.8) Equatg this to zero means that: n e i n (3.8) Therefore the optimum source impedance for mimum noise is: O e i n n (3.83) The mimum noise figure, m, for uncorrelated sources is therefore obtaed by substitutg equation (3.83) (3.8). N e n en i n en 4kTB i n n e 4kTBe n (3.84)

24 undamentals of Circuit Design Therefore: m en ktb (3.85) There is therefore an optimum source impedance for mimum noise. This effect can be shown to produce a set of noise circles. An example of the noise circles for the B98 dual gate MOET is shown igure 3. where the optimum source impedance for mimum noise at MHz can be seen to be at the centre of the circle where: G.5-3 and B -j -3. This is equivalent to an optimum source impedance represented as a kω resistor parallel with an ductor of.6µh (at MHz). Note that these values are far away from the put impedance which this device can be modelled as a kω resistor parallel with pf. This illustrates the fact that impedance match and optimum noise match are often at different positions. In fact this effect is unusually exaggerated dual gate MOETs operatg the VH band due to the high put impedance. or optimum sensitivity it is therefore more important to noise match than to impedance match even though maximum power ga occurs for best impedance match. If the amplifier is to be connected directly to an aerial then optimum noise match is important. In this case that would mean that the aerial impedance should be transformed to present K parallel with.6uh at the put of the device which for low loss transformers would produce a noise figure for this device of around.6db. osses the transformers would be dependent on the ratio of loaded Q to unloaded Q. Note that the loss resistors presented across the tuned circuit would not now be half the transformed impedance (k) as impedance match does not occur, but kω parallel with kω. There is a further important pot when considerg matchg and that is the termation impedance presented to the precedg device. or example if there was a filter between the aerial and the amplifier, the filter would only work correctly when termated the design impedances. This is because a filter is a frequency dependent potential divider and changg impedances would change the response and loss.

25 mall ignal Amplifier Design and Measurement igure 3. Noise circles for the B98. eproduced with permission from Philips usg data book C7 on mall ignal ield Effect Transistors It should be noted that at higher frequencies the noise sources are often partially correlated and then the noise figure is given by [] and []: r Y n m Y g s (3.86) where r n is the normalised noise resistance: r n Z N (3.87) Note that the equivalent noise resistances are concept resistors which can be used to represent voltage or current noise sources. This is the value of resistor havg a thermal noise equal to the noise of the generator at a defed temperature.

26 undamentals of Circuit Design Therefore: ne ni en 4kTB 4 ktb i n (3.88) (3.89) Y g s jb s represents the source admittance (3.9) Y g o jb o represents the source admittance which results mimum noise figure. These parameters can be converted to reflection coefficients for the source and load admittances: Y Y Γ Γ Γ Γ s s (3.9) (3.9) m 4 r n Γ Γ ( Γ ) Γ (3.93) These parameters are often quoted parameter files. An example of the typical parameters for a BG55 bipolar transistor is shown Table. The parameters versus frequency are shown at the top of the file and the noise parameters at the bottom. The noise parameters are from left to right: frequency, m, Γ opt terms of the magnitude and angle and r n.

27 mall ignal Amplifier Design and Measurement 3 Table 3. Typical parameter and noise data for the BG55 transistor operatg at 3Vand.5mA. eproduced with permission from Philips, usg the wideband transistors product selection, discrete semiconductors CD.! ilename: BG55C.P Version: 3.! Philips part #: BG55 Date: eb 99! Bias condition: Vce3V, Ic.5mA! IN INE PINNING: same data as with cross emitter png. # MHz MA 5! req!gum [db] ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! 8.7! Noise data:! req. m Gamma-opt rn As mentioned earlier, it is important to note that maximum ga, optimum match and mimum noise very rarely occur at the same pot with an active device. or mimum noise, the match is not critical, but if the termation of the put filter is important then simultaneous noise and impedance match are important.

28 4 undamentals of Circuit Design A circuit technique that can be used to improve this situation bipolar transistors is the addition of an emitter ductor. This is illustrated by lookg at the progression of the hybrid π model to a T model which corporates a complex ga as shown igure 3.3. This is similar to the analysis described Hayward [] although the itial approximations are different. b c c b c βi b ( β)re b Cπ Y ( β)re βi b e e e (a) (b) (c) c c b β β j β f T ' C bc b β β j β f T ' r e r e e (d) (e) e e igure 3.3 Evolution of the Hybrid π model usg complex ga The simple low frequency π model is shown igure 3.3.a. and this is directly equivalent to the T model shown igure 3.3.b. Now add the put capacitance as shown igure 3.3c. This is now equivalent to the model shown igure 3.3d. where a complex ga is used to corporate the effect of the put capacitance. This produces a roll-off which is described by f T. f T is a modified f T

29 mall ignal Amplifier Design and Measurement 5 because the value of f T is measured to a /C and therefore already corporates the feedback capacitor parallel with Cπ. f C C π bc T ' ft (3.94) Cπ The feedback capacitor can then be added to the T model to produce the complex T model shown igure 3.3.e. Note that for ease, the unilateral assumption can be made and the feedback capacitor completely ignored and then f T can be assumed to be f T. This is assumed the calculations performed here. Take as an example the fourth generation bipolar transistor BG55 which has an f T of 6.5 GHz at.5 ma and 3V bias for which Philips provides a design usg simulation and measurement. We will show here that a simple analysis can provide accurate results. Usg the parameter table for the BG55, the optimum source impedance at 9MHz is Γopt.583 angle 9 degrees which is 5(3..5j) 6Ω 75jΩ. Usg the simple scalar model, assume the device is unilateral and take the equations for complex β as shown if igure 3.3; then Z (β )Z e. If (β ) is represented as (A jb) and Z e is(r e jω) then the put impedance is Z (A jb)(r e jω). It can therefore be seen that the real part of the put impedance can be creased significantly by the addition of the emitter ductor. Takg equations for β at 9 MHz and assumg that the f T is 6.5 GHz and β is then β (.43-7.j), (β ) (.43-7.j). At.5 ma r e 5/.5 Ω. Z (β )Z e (.43-7.j)( jω). To obta a 6Ω real part then 7.j.jω should equal (6-4) 46. This gives a value for of 3.6nH. This is very close to the design, simulation and measurement of a 9 MHz amplifier described the Philips CD on wideband transistors entitled Product election Discrete Transistors, Application note (C4), and illustrates how simple models can be used to give a good sight to design Noise Temperature Amplifier noise can also be modelled usg the concept of noise temperature. The amplifier is modelled as an ideal amplifier with a summg junction at the put. The put to this summg junction consists of the source noise, kt B, where T is the ambient temperature of the source, and an equivalent noise source of value kt e B which represents the degradation caused by the amplifier as shown igure 3.4. Note therefore that the noise temperature of a perfect amplifier is zero kelv.

30 6 undamentals of Circuit Design igure 3.4 Amplifier representation of noise temperature The noise factor terms of the noise temperature is: N ( ) G kt B kt B A kt BG e T T A e (3.95) It can be seen that the noise temperature is dependent of the temperature of the source resistance unlike the noise factor, however, it is dependent on the value of source resistance and the temperature of the amplifier Noise Measurement ystem Modern noise measurement systems utilise a noise source which can be switched between two discrete values of noise power connected to the put of the device under test (DUT). The output noise power of the DUT is then measured and the change output noise power measured when the put noise power is switched. If for example an amplifier had zero noise figure and therefore contributed no noise then the change output power would be the same as the change put power. If the amplifier had a high noise figure (i.e. it produced a significant amount of excess noise) then the change output noise power would be much smaller due to the maskg effect of the amplifier noise. The system presented here is based on absolute temperature and offers a very simple measurement technique. The system is shown igure 3.5.

31 mall ignal Amplifier Design and Measurement 7 igure 3.5 Noise Measurement ystem The system consists of two 5Ω sources one at room temperature and one placed liquid nitrogen at 77K. The room temperature and cold resistors are connected sequentially to the amplifier under test and the output of the DUT is applied to a low noise amplifier and spectrum analyser. The change noise power is measured. This change noise power P can be used to calculate the noise temperature directly from the followg equation by takg the ratio of the sum of the noise sources at the two source temperatures: Te T T T e Te 9K T 77K e P (3.96) T e is the noise temperature of the amplifier at the operatg temperature. T is the higher temperature of the source this case room temperature and T is the temperature of liquid nitrogen. The noise factor can be obtaed directly: Te T N e T 9K (3.97) or an amplifier which contributes no noise (the noise temperature T e, the noise factor is, and the noise figure is db) the change power can be seen to be:

32 8 undamentals of Circuit Design P dB 77 (3.98) o as the noise figure creases this change power is reduced. To calculate T e terms of P : T T e e T T P (3.99) T T T P ( T ) e e T e ( P ) P. T T (3.) (3.) T e ( P T ) T 9 ( P 77) P P (3.) Plots of P vs noise temperature, P vs noise factor and P vs noise figure are shown igures 3.6, 3.7 and 3.8 respectively. dbratio n t n igure 3.6 Noise power ratio P (db) vs noise temperature

33 mall ignal Amplifier Design and Measurement 9 dbratio n n igure 3.7 Noise power ratio P vs noise factor dbratio n db n igure 3.8 Noise power ratio P vs noise figure Take an example of a measured change output noise power of 3.8dB when the source resistors are switched from cold to hot. Usg igure 3.8, this would predict a noise figure of db. Note that to obta accurate measurements the device under test should be mounted a screened box (possibly with battery power). If the detector consisted of a spectrum analyser then a low noise amplifier would be required at the analyser put as most spectrum analysers have noise figures of to 3dB. The effect of detector noise figure can be deduced from the noise figure of cascaded amplifiers. The losses the cables connected to the resistors and the switch should be kept low.

34 3 undamentals of Circuit Design 3.7 Amplifier Design Usg Parameters and the mith Chart or amplifier design at higher frequencies the device characteristics are usually provided usg parameters. urther, most modern measurements, taken above 5 MHz, are made usg parameter network analysers. It is therefore important to understand the equivalent y parameter equations but now usg parameters. This section will cover:. The mith Chart calculator.. Input and output reflection coefficients/stability and ga. 3. Matchg usg mith Charts. 4. Broadband Amplifiers. 5. DC biasg of bipolar transistors and GaAs ETs. 6. parameter measurements and error correction The mith Chart It can be seen that the amplifier design techniques shown so far have used parameter sets which deal voltages and currents. It was also mentioned that most measurements use parameter network analysers which use travellg waves to characterise the amplifiers. These travellg waves enable reasonable termatg impedances to be used as it is easy to manufacture coaxial cable with characteristic impedances around 5 to 75Ω. This also enables easy terconnection and error correction. It is important to be able to convert easily from impedance or admittance to reflection coefficient and therefore a graphical calculator was developed. To help this conversion P.H. mith, while workg at Bell Telephone aboratories, developed a transmission le calculator (Electronic Vol., pp.9-3) published 939. This is also described the book by Philip H mith entitled Electronic Applications of the mith Chart []. This chart consists of a polar/cartesian plot of reflection coefficient onto which is overlaid circles of constant real and constant imagary impedance. The standard chart is plotted for ρ. The impedance MITH is a registered trademark of the Analog Instrument Co, Box 95, New Providence, N.J. 7975, UA.

35 mall ignal Amplifier Design and Measurement 3 les form part circles for constant real and imagary parts. The derivations for the equations are shown here and consist of representg both ρ and impedance, z, terms of their real and imagary parts. Usg algebraic manipulation it is shown that constant real parts of the impedance form circles on the ρ plot and that the imagary parts of the impedance form a different set of circles. et: ρ u jv (3.3) z r jx (3.4) as: ρ z ρ (3.5) r u jv jx u jv u v jv ( u) v (3.6) The followg equations are labeled (3.7a/b) to (3.3a/b) where (a) is on the H and (b) is on the H. eal Part of Z r r u v ( u) v ru ru rv u v ( r ) u ru ( r ) v r Imagary part of Z x v ( u) v x ux u x v x v xu xu xv v x ru r v u v u u v r r x add: r /(r ) to both sides add /x to both sides

36 3 undamentals of Circuit Design u ru r r r ( r ) r r ( r) v u x u v r x x u r v r ( u ) v ( r) x x Therefore two sets of circles are produced with the followg radii and centres. eal part of Z adius Centre r r r : Imagary part of Z adius x Centre : x (3.4a/b) (3.5a/b) The circles of constant real impedance are shown igure 3.9a and the circles of constant imagary impedance are shown igure 3.9b. A mith Chart is shown igure 3.. The parameters can be directly overlaid onto this and the impedance deduced and vice versa. This will be illustrated under amplifier matchg usg parameters. Increasg ductive reactance the Z doma Increasg capacitive susceptance the Y doma (a) (b) igure 3.9 Circles of (a) constant real and (b) constant imagary impedance

37 mall ignal Amplifier Design and Measurement 33 igure 3. mith Chart. This chart is reproduced with the courtesy of the Analog Instrument Co., Box 95, New Providence, NJ 7974, UA

38 34 undamentals of Circuit Design 3.7. Input and Output Impedance Most measurements above 5 MHz are now performed usg parameter network analysers and therefore amplifier design usg parameters will be discussed. In the amplifier it is important to obta the put and output impedance/reflection coefficient. An parameter model of an amplifier is shown igure 3.. Here impedances will be expressed terms of reflection coefficients normalised to an impedance Z. These are Γ, Γ out, Γ and Γ. a a Z Z b Γ b Γ out Γ Γ igure 3. Two port parameter model Takg the parameter two port matrix the put and output reflection coefficients can be derived which offers significant sight to stability and error correction. b b Therefore: a a (3.6) b a a and b a a (3.7) b a Γ (3.8) a a as:

39 mall ignal Amplifier Design and Measurement 35 b a a (3.9) Γ b a a (3.) dividg by b : Γ Γ Γ (3.) imilarly the reflection coefficient from the other port is: Γ out b a Γ Γ (3.) It can be seen, the same way as for the y parameters, that the put reflection coefficient is dependent on the load and that the output reflection coefficient is dependent on the source. These equations are extremely useful for the calculation of stability where the dependence of put and output reflection coefficient with load and source impedance respectively is analysed. imilarly these equations are also used to calculate error correction by modellg the terconnectg cable as a two port network. Note that Γ and Γout become and respectively when the load and source impedances are Z. This also occurs when the case of no feedback tability or stability it is required that the magnitude of the put and output reflection coefficient does not exceed one. In other words, the power reflected is always lower than the cident power. or unconditional stability the magnitude of the put and output reflection coefficients are less than one for all source and loads whose magnitude of reflection coefficients are also less than one. or unconditional stability it is therefore required that: Γ < (3.3)

40 36 undamentals of Circuit Design Γout < (3.4) for all Γs < and for all G <. Examg, for example, the equation for put reflection coefficient it is possible to make some general comments about what could cause stability such that Γ <. If the product of is large then there is a strong possibility that certa load impedances Γ could cause stability. As is usually the required ga it is therefore important to have good reverse isolation such that is low. If the put match is poor such that is large then the effect of the second term is therefore even more important. This also illustrates how a circuit can be forced to be unconditionally stable by restrictg the maximum value of Γ. This is most easily achieved by placg a resistor straight across the output. In fact both shunt and series resistors can be used. It is also very easy to calculate the value of the resistor directly from the parameters and the equation for Γ and Γ out. Take, for example, a simple stability calculation for a device with the followg parameters. or convenience parameters with no phase angle will be chosen. Assume that.7, 5,. and.. Calculatg Γ : Γ Γ Γ.7.5.Γ (3.5) Γ It can be seen that if: Γ.Γ >.6 (3.6) then the equation for Γ predicts stability as Γ exceeds one. This occurs when Γ (.).6, therefore Γ.536. Therefore the resistor value is: Z ρ Z 65Ω ρ (3.7) This means that if a shunt resistor of 65Ω or less was placed across the output then the put reflection coefficient could never exceed one even if the circuit was connected to an open circuit load.

41 mall ignal Amplifier Design and Measurement 37 Note also that the same checks must be done for the output reflection coefficient Γ out. It is therefore left to the reader to check whether there are any requirements for the source impedance to ensure stability. It should be noted that it is usually preferable to place resistive components across the output rather than the put as loss at the put degrades the noise figure. It is also essential to calculate stability at all usable frequencies cludg those outside the band of operation as the source and load impedances are often unpredictable. This is usually done usg CAD tools. A number of factors have therefore been developed. or unconditional stability the ollett stability factor is stated as: K > (3.8) The tern factor [4] is /K and also (3.9) < tability can also be demonstrated usg the mith Chart by plottg the loci of pots of the load and source reflection coefficients (Γ and Γ ) which produce Γ and Γout. These loci [] consist of circles with a centre C and radius r as shown the followg equations and igure 3.. Γ values for Γ Γ values for Γ out (output stability circle) (put stability circle) r radius r radius (3.3a/b) C ( ) * * centre C ( ) * * centre (3.3a/b) where: (3.)

42 38 undamentals of Circuit Design igure 3. tability Circles It is necessary to check which part of the circle is the stable region. This is achieved by lettg Z Z causg Γ to be zero and Γ to be. imilarly by lettg Z Z, this causes Γ to be zero and Γout to be. These pots (Z Z ) are the centre of the mith Chart. If the device is stable with source and load impedances equal to Z (i.e. < ) then the centre of the mith Chart is a stable pot. This is most easily illustrated by lookg at igure 3.3. The devices are unconditionally stable when the circles do not overlap (igure 3.3b). When Γ is zero but > then the device is unstable even when termated Z, the device cannot be unconditionally stable. However, it can be conditionally stable where the two circles overlap with the mith Chart as shown ig 3.3c. The ga of the amplifier can now be considered terms of the source and load impedances and the device parameters.

43 mall ignal Amplifier Design and Measurement 39 igure 3.3 tability Circles demonstratg the stable regions Ga As for y parameters, let us vestigate the transducer ga, G T, terms of parameters: G T P P AV Γ Γ Γ Γ Γ (3.3) Note that:

44 4 undamentals of Circuit Design Γ a a (3.4) If is assumed to be zero, by makg the unilateral assumption, then Γ and therefore: G TU Γ Γ Γ Γ (3.5) The maximum unilateral ga, MUG or GUM, occurs when: Γ * and Γ * where the asterisk is the complex conjugate. The equation for MUG is therefore: MUG (3.6) This can be most easily understood by realisg that when the put is not matched P is: P (3.7) The put power when matched would then be creased by the reciprocal of P : - (3.8) The same argument applies to the output Other Gas The power ga is: G P P P (3.9)

45 mall ignal Amplifier Design and Measurement 4 P a b a ( Γ ) (3.3) G P Γ Γ Γ (3.3) The available power ga is: P G A P AVN AV (3.3) G A Γ Γ Γ out (3.33) imultaneous Conjugate Match When is not equal to zero or is rather large the unilateral assumption cannot be made and the put and output reflection coefficients are given by: Γ Γ out Γ Γ Γ Γ (3.34) (3.35) The conditions required to obta maximum transducer ga then require that both the put and output should be matched simultaneously. Therefore: Γ Γ (3.36) and Γ Γ out (3.37)

46 4 undamentals of Circuit Design Therefore: Γ and: Γ Γ Γ Γ Γ (3.38) (3.39) It should be noted that the output matchg network and load impedance affects the put impedance and the put matchg network and source impedance affects the output impedance. It is, however, possible with considerable manipulation to derive equations for this simultaneous match condition as long as the device is stable. These are shown below []: Γ Γ opt opt B B ± ± ( B 4 C ) C / ( B 4C ) C / (3.4) (3.4) B (3.4) B (3.43) C * (3.44) C * (3.45) (3.46) Now that the put and output impedances and the ga equations are known the amplifier matchg networks can be designed usg the mith Chart. or these

47 mall ignal Amplifier Design and Measurement 43 calculations will be assumed to be zero and therefore the put reflection coefficient is and the output reflection coefficient is Narrow Band Matchg Usg the mith Chart for Unilateral Amplifier Design Matchg the put and output of the device uses the same procedure. The followg rules should be followed.. Normalise the characteristic impedance of the mith Chart to Z. Note that the centre pot of the mith Chart is. When workg the impedance doma, divide by Z to place the pot on the chart and multiply the data when removg from the chart. or example, place the impedance (8 j) on a 5Ω mith Chart. As this is 5(.6.4j) place the pot.6.4j on the chart. In the admittance doma multiply by Z to place on the chart and divide by Z to remove from the chart.. Plot the device impedance Z on the mith Chart either directly if known as impedance or as or. If the impedance is parameters note that is a reflection coefficient which is the polar form of the mith Chart. The outer circle of the mith Chart has a reflection coefficient of (ρ ) and the centre of the mith Chart has ρ. The magnitude of ρ varies learly between and along a radius,, of the chart. 3. Usg a ruler measure the radius () between the centre and the outer circumference of the mith Chart and then draw a circle, from the centre, of radius of ρ. or example, if the radius of the circle is cm and the magnitude of ρ.3, draw a circle with a radius of 3cm. Usg the angles on the mith Chart draw a le origatg from the centre of the chart through the circle tersectg the angle. The angle is zero at the H of the mith Chart and creases positively an anti-clockwise direction. It is now necessary, by the use of series and parallel components, to transform the put or output impedance of the device to Z by movg towards the generator. Note that the observer is always lookg towards the device and while movg through the matchg network moves to the middle of the mith Chart to produce a match. A block diagram of an amplifier consistg of the device and the matchg components is shown igure 3.4

48 44 undamentals of Circuit Design igure 3.4 Block diagram of amplifier matchg C Matchg Networks The mith Chart will be used here to design a two reactive element, type, matchg network which consist of a series and shunt reactance as shown igure 3.5. The operation of matchg, by the use of series and shunt components, can be illustrated generically. When an impedance a jb is to be matched to a real impedance D usg a series impedance and shunt reactance, the series component is added to produce a jb jc such that the admittance of this (verse of the impedance) provides the correct real part of /D. This is because the fal shunt component can only change the imagary part of the admittance as it is a pure reactance. The imagary part is then cancelled by the addition of a shunt component of opposite reactance. The matchg network can have either the shunt component first or the series component first. The mith Chart can be represented as an admittance chart by flippg around a vertical le through the centre to produce a mirror image. It is possible to obta charts with curves for constant real and imagary admittance overlaid on the same chart but these can become very confusg. Therefore a better way to convert from impedances to admittances and vice versa is obtaed by drawg a le from the known impedance/admittance through the centre of the chart and extendg equally to the other side. This can also be helped by addg Z and Y circles as illustrated the followg examples. When series impedances are added, the mith Chart is operated as an impedance chart as impedances just add, and when a shunt impedance/admittance is beg added the mith Chart is operated the admittance doma as the admittances just add. It is,

49 mall ignal Amplifier Design and Measurement 45 however, important to remember which doma you are workg at any one time. igure 3.5 C matchg networks

50 46 undamentals of Circuit Design Transmission e Matchg Networks When a series transmission le, with the same normalised characteristic impedance of the mith Chart, is added, this causes the impedance to move a circle around the mith Chart as the magnitude of the reflection coefficient remas constant for a lossless le. This would typically be moved until it meets the unity admittance le. or shunt stubs the value of susceptance required is obtaed and then an open or short circuit length of le is used which is measured as a length of le with ρ. This is most easily illustrated by four examples mith Chart Design Examples Example a and b demonstrate matchg to the same impedance usg ductor capacitor, C, (a) and transmission le (b) impedance transformers. Example a and b illustrate a second example aga for C and transmission le networks.

51 / $ ' é $ */ ( ) 5()/ (&7, &()),&,(7, '(*5((6 mall ignal Amplifier Design and Measurement 47 Example a: Usg the mith Chart shown igure 3.6 match an impedance with put reflection coefficient ρ.4 angle 36 to 5Ω usg C matchg networks. 5Ω é!: $ 9 ( / (*7 6 ± 7 : $ 5' *( (5$ 7 5 é! $ */ ( ) 7 5 $ 6, 66, &()),&,( 7, '(*5((6 7 : $ 5' é : $ 9 ( / (*7 6 ρ ,'8 &7, 9 ( 5( $& 7 $&(. &3( 7 M; 5 &$3$&, 7, 9( 686&(37$&( M%< &3 ( 7 M; 5, '8 &7,9 ( 68 6&(37 $&( M% < B A 5(6,67$&( &3(7 5 5 &'8&7$&( &3(7 *<, 9 ( 5 ($ &7 $ &( &$ 3$ &, 7 C igure 3.6 Example a: Match ρ.4 angle 36 degrees to 5Ω

52 48 undamentals of Circuit Design Example.a: Usg the mith Chart shown igure 3.6 match an impedance with put reflection coefficient ρ.4 angle 36 to 5Ω usg C matchg networks.. Measure the radius () of the mith Chart.. Plot the magnitude.ρ on the mith Chart at A. Note that many charts have a scale for ρ below the chart. This varies learly from to over one radius of the chart and can therefore be used with the aid of a compass. 3. Draw a circle on the mith Chart which is the mirror image about a central vertical le of the Z circle. (This enables the impedance to be converted to admittance at the correct pot.) 4. Add ductive reactance to move A to this circle (pot B). Measure the change reactance. 5. This is jx. As Z jx jω therefore Z X/ω. 6. Convert to admittance (C) and add shunt capacitive susceptance to brg to the middle of the chart: X.Y jωc and jx/z jωc. Note that if A was outside the circle (the mirror image of the Z circle) then the first component would need to be a series capacitor.

53 / $ ' é mall ignal Amplifier Design and Measurement 49 Example b: Usg the mith Chart shown igure 3.7 match an impedance with put reflection coefficient ρ.4 angle 36 to 5Ω usg transmission le matchg networks. 5Ω é!: $ 9( / ( *7 6 ± 7 : $ 5' *((5 $ 7 5 é! $ */ ( ) 7 5 $ 6, 66, &()),&,(7, '(*5((6 7 : $ 5' é : $ 9 (/ (*7 6,'8&7 ρ.4 36, 9 ( 5($& 7 $&( &3(7 M; 5 &$3$&,7,9( 686&(37$&( M%< B A 5(6,67$&( &3(7 5 5 &'8&7$&( &3(7 *<, 9 ( 5($&7 $ &( & 3(7 M; 5,'8&7,9(686&(37$&( M% < &$3 $&, 7 C $ */ ( ) 5()/ (&7, &()),&, ( 7, '(*5((6 igure 3.7 Example b: Match ρ.4 angle 36 to 5Ω