Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance

Transcription

1 Smulaton Methodology for Analyss of Substrate Nose Impact on Analog / RF Crcuts Includng Interconnect Resstance C. Soens (1,2), G. Van der Plas (1), P. Wambacq (1,3), S. Donnay (1) (1) IMEC (2) also Ph.D. student at ETRO-ELEC, Vrje Unverstet Brussel, Belgum (3) also lecturer at Vrje Unverstet Brussel, Belgum Abstract Ths paper reports a novel smulaton methodology for analyss and predcton of substrate nose mpact on analog / RF crcuts takng nto account the role of the parastc resstance of the on-chp nterconnect n the mpact mechansm. Ths methodology allows nvestgaton of the role of the separate devces (also parastc devces) n the analog / RF crcut n the overall mpact. Ths way s revealed whch devces have to be taken care of (sheldng, topology change) to protect the crcut aganst substrate nose. The developed methodology s used to analyze mpact of substrate nose on a 3 GHz LC-tank Voltage Controlled Oscllator (VCO) desgned n a hgh-ohmc 0.18 µm 1PM6 CMOS technology. For ths VCO (n the nvestgated frequency range from DC to 15 MHz) mpact s manly caused by resstve couplng of nose from the substrate to the non-deal on-chp ground nterconnect, resultng n analog ground bounce and frequency modulaton. Hence, the presented test-case reveals the mportant role of the onchp nterconnect n the phenomenon of substrate nose mpact. 1. Introducton The contnuous downscalng of CMOS technology has stmulated the trend to ntegrate RF crcuts and dgtal base-band processng crcuts onto one sngle chp. Ths has enabled a cost reducton and therefore a prolferaton of mxed-mode desgns durng the past years. However, ths sngle chp soluton s facng the problem of analog performance degradaton due to mpact of dgtal swtchng nose, also called substrate nose. The problem of substrate nose couplng s n general dvded nto three man felds of study [1]: generaton, propagaton and mpact of substrate nose. Actual smulaton methods contan an RC- of the substrate and a package [2,3,4]. These are used to smulate substrate nose couplng from a dgtal crcut to any locaton on the substrate (e.g. under a senstve analog crcu. These smulaton methods are extended wth macro-ng technques to effcently smulate the substrate nose generaton of large dgtal crcuts [5,6]. For the analyss of substrate nose mpact on the senstve analog / RF crcuts up to now no satsfyng smulaton method exsts. The substrate nose smulaton methodology presented n [3] for nstance, only s the substrate nose waveforms up to the senstve nodes at the nterface of the substrate and the analog / RF crcut. A comprehensve smulaton approach takng all the mportant effects nto account to the mpact of these waveforms remans elusve. Interconnect, for nstance, s so far studed as a source of substrate nose [7] (capactve couplng of nose from nose source nterconnect nto substrate) or as a path for substrate nose couplng (capactve couplng of nose from substrate nto nterconnect of analog vctm) [8]. However, the role n the mpact mechansm (couplng of nose from substrate nto nterconnect of the analog crcut resultng n a voltage drop n the crcu s not yet taken nto account. Ths work reports a smulaton methodology for analyss and predcton of the mpact of substrate nose on an analog / RF crcut. The method takes nterconnect parastcs nto account n addton to all prevously known effects. The waveforms, resultng from substrate nose mpact, can be predcted by smulaton for all the nodes at the nterface between the substrate and the crcut as well as wthn the crcut (ncludng the crcut output node). Ths allows detaled analyss of the mpact mechansm. The presented method s valdated by comparson of smulaton results wth measurements on an LC-tank VCO. A smulaton accuracy of 2 db s obtaned. The analyss of the test chp reveals that the on-chp ground wre parastcs have an mportant nfluence on the level of substrate nose mpact. Based on ths, a for mpact of substrate nose on an LC-tank VCO was developed [9]. The presented mpact smulaton methodology when combned wth a generaton ng methodology [10] would permt mxed-sgnal chp verfcaton and sgn-off of substrate nose couplng ssues. Secton 2 brefly descrbes the phenomenon of substrate nose mpact on an analog / RF crcut. In Secton 3 the mpact smulaton methodology s explaned and valdated by applyng t to a smple one-transstor crcut. In secton 4 the VCO used for further valdaton of the smulaton methodology s descrbed. Secton 5 explans the mechansms behnd couplng and mpact of substrate nose on an LC-tank VCO. Secton 6 resumes the expermental and smulaton results on the 0.18 µm VCO. Fnally conclusons are drawn n secton /05 $ IEEE

2 2. Substrate nose couplng and mpact Fgure 1 llustrates the problem of the mpact of substrate nose on an analog / RF crcut as well as the parastc contrbutons nfluencng ths mpact. A substrate nose sgnal generated at a dstant locaton from ts analog vctm wll frst travel trough the substrate (Fgure 1 (a)) up to the dfferent senstve nodes at the nterface between the substrate and the crcut (Fgure 1 (b)), for nstance an NMOS back-gate. The substrate sgnal wll then couple nto the crcut va ths back-gate (Fgure 1 (I)) and propagate through the crcut to fnally mpact ts output. It s thus necessary to extract a good for the substrate, the crcut but as well the nterface between both. In addton, supply network parastcs (Fgure 1 (c)) can nfluence the substrate nose couplng and mpact. Last but not least, the parastcs of the on-chp nterconnect play an mportant role. (c) for smulaton of the mpact of substrate nose on analog / RF crcuts. 3. Impact smulaton methodology Analyss starts from the layout of the analog / RF crcut (Fgure 2). Process technology nformaton s fed to the substrate er, the crcut extractor and the nterconnect er to extract an RC- for the substrate, an analog / RF crcut and an nterconnect respectvely. To these s a package s added to obtan a smulaton for the entre system. Ths complete s fed to the mpact smulator together wth the substrate nose waveforms. Fnally, waveforms resultng from substrate nose mpact can be predcted for the nodes at the nterface between the substrate and the analog / RF crcut, as well as all the nodes wthn the crcut, ncludng the crcut output node. Process technology Substrate extractor layout Crcut extractor Interconnect extractor (a) I II (b) Package Substrate nose waveform Substrate RF crcut Substrate nose mpact smulator Interconnect Waveforms resultng from mpact on all RF crcut nodes Fgure 1 The presented smulaton method allows the analyss of mpact of substrate nose through the dfferent senstve components n the analog / RF crcut. For a VCO mportant entres nto the crcut are the nterconnect, the NMOS back-gate and the nductors. A substrate nose sgnal can couple resstvely (va e.g. substrate contacts connectng the on-chp metal ground lnes wth the substrate, Fgure 1 (II)) or capactvely to the crcut nterconnect causng a voltage drop n ths nterconnect and resultng n a voltage varaton n the crcut. Ths voltage varaton wll then further propagate through the crcut to ts output node. Ths nterconnect related mpact can serously harm the analog / RF performance. Hence a good of the on-chp nterconnect s mandatory for predcton of substrate nose mpact. Therefore, unlke the classcal smulaton methodologes [2,3,4,7,8], the proposed methodology (Fgure 2) employs a of the nterconnect parastcs Fgure 2 Substrate nose mpact smulaton methodology. For more detaled substrate nose mpact nvestgatons, mpact through the dfferent senstve (parastc) devces of the crcut (mportant devces for a VCO are llustrated n Fgure 1) can be analyzed separately. It provdes an analog desgner wth crucal nformaton on whch devces n the crcut have to be carefully shelded or whch topology changes can be made to ncrease the substrate nose mmunty of the crcut. As an example, ths paragraph wll compare measurement and smulaton of the mpact of a substrate sgnal on an NMOS. The NMOS back-gate s the node n an analog crcut that s commonly suggested as the path va whch substrate nose s lkely to enter the crcut. In Fgure 3 measurements of the transfer from the substrate to the NMOS output are compared to smulatons. The couplng from the substrate to the crcut va the NMOS back-gate s ed takng nto account the nfluence of the

3 nterconnect resstance. The resstance from the ground rng of the NMOS to the off-chp ground ncreases the voltage dvson from the substrate nose source to the back-gate voltage v bs by almost a factor two. Ths s suffcent to explan the mpact on the crcut wthn a maxmal error of 1 db. back-gate together wth the resstance n the ground nterconnect play the domnant role n ths mpact problem. Moreover, the good agreement obtaned between measurement, smulaton and hand calculaton valdates the s of mpact va an NMOS back-gate and of the nfluence of nterconnect parastcs, contaned n our smulaton. Couplng va the small source-bulk and dran-bulk juncton capactors (C dbj = 120 ff, C sbj = 200 ff) s neglgble for the studed frequency range. Impact va the source-bulk and dran-bulk juncton capactors becomes comparable to mpact va the back-gate at frequences between 5 GHz and 19 GHz for bas voltages from 0.5 V to 1.6 V ( f = gmb 2π ( C + C ) ). 3dB dbj xbj Fgure 3 Measured transfer of a snusodal sgnal n the substrate to the NMOS output agrees well wth smulatons. Ths reveals that the NMOS backgate n combnaton wth the parastc resstance n the ground nterconnect s the domnant path va whch substrate nose mpacts the NMOS. The followng paragraph wll descrbe more n detal the s for the substrate, the NMOS and the nterconnect extracted wth Substratestorm [11] and DIVA [12] and smulated wth Spectre RF [13]. Fgure 4 (a) shows the layout of the studed RF NMOS surrounded by a rng of contacts (here called NMOS Ground Rng (MOS GR)) connectng the substrate to the ground. Fgure 4 (b) shows the layout of the NMOS measurement structure. Four NMOS transstors are connected n parallel to realze a hgh enough back-gate transconductance (g mb ) for suffcent measurement accuracy. Fgure 4 (c) shows a smplfed vew of the NMOS measurement structure wth the locatons on the substrate of the four mportant nodes of the problem: the contact va whch a sgnal s njected nto the substrate (SUB) the NMOS back-gates (Back-gate), the NMOS ground rng (MOS GR) and the ground rng surroundng the complete measurement structure (GR). Fgure 4 shows the extracted macro- of the substrate and nterconnect (d), connected to the back-gate of the RF NMOS (e). From the macro- of the substrate the voltage dvson from the substrate contact (SUB) to the voltage at the NMOS back-gate (v bs ) equals 1/652. The transfer of nose from substrate to NMOS output (measured and smulated n Fgure 3), can be computed by multplyng ths factor wth the back-gate transconductance (g mb ) and the output mpedance of the NMOS (g ds ). G mb equals 10 ms to 38 ms and gds 2.8 ms to 22 ms for a bas voltage of 500 mv to 1.6 V. Hence the total transfer ( v _ v ) g r ), computed from these values, equals ( back gate sub mb ds approxmately -45 db to -52 db and s thus very close to the smulated values shown n Fgure 3. Ths confrms that the Metal resstance Fgure 4 Overvew of (a) the NMOS measurement structure, (b) the RF NMOS layout, (c) a smplfed vew of the measurement structure, (d) the extracted substrate and nterconnect and (e) the RF NMOS. 4. Test chp Ths secton brefly descrbes the test chp and the experment used to valdate the smulaton methodology descrbed n secton 3. A VCO desgned n a hgh-ohmc (20 ohm cm) twn-well 1P6M 0.18 µm CMOS technology (schematc shown n Fgure 5 and mcrophotograph shown n Fgure 6) s used as a substrate nose vctm. It uses an NMOS / PMOS cross-coupled par and an LC-tank formed by an on-chp nductor and an accumulaton mode NMOS varactor. It operates around 3 GHz and has a phase nose of -100 dbc / 100 khz wth a current consumpton of 5 ma (VCO core) and a supply voltage of 1.8 V.

4 V out V back-gate V GND Fgure 5 Schematc of the 0.18 µm CMOS LC-tank VCO: two entres to the crcut for substrate nose are ndcated: the on-chp ground (V GND ) and the NMOS back-gate (V back-gate ). VDD Vtune OUT Fgure 6 Mcrophotograph of the VCO: Vtune pad, V DD pad, output pads, and pad to substrate contact for nose njecton (SUB). A 5 dbm snusodal sgnal s njected nto the substrate n the vcnty of the crcut (Fgure 6 SUB). The mpact of ths substrate sgnal s measured and smulated. The crcut s powered wth RF probes and ts output s measured sngle ended wth a spectrum analyzer (HP 8565E). The references (ground) for on one hand the snusodal sgnal njected nto the substrate and, on the other hand the VCO nput and output sgnals are connected on-chp. Z SUB ncreasng wth the nose frequency. All these effects are taken nto account n the proposed methodology. When a substrate nose sgnal couples nto the VCO, t wll modulate the oscllator sgnal both n ampltude and frequency. The output voltage of the VCO, V out, can be expressed as follows (n = number of entres for substrate nose n VCO): n n v out( = Ac 1+ G AM hsub( vnose( cos2π ( fct + K hsub( vnose( d wth v ( = A cos (2π f (1) nose nose nose Wth h sub the attenuaton by the substrate from the nose source to a senstve component n the crcut (NMOS back-gate etc), A nose the nose ampltude, f nose the nose frequency, A c the local oscllator ampltude, and f c the local oscllator frequency. Further, K (Hz / V) represents the senstvty of the oscllator frequency to a voltage varaton on component, and G AM (V -1 ) the AM gan assocated to a component. Snce the substrate nose power s typcally small compared to the local oscllator power, narrow-band frequency modulaton (FM) can be assumed. Moreover superposton can be used to calculate the overall mpact from the contrbutons of the separate components n the VCO. At the VCO output spurs appear at both sdes of the local oscllator (Fgure 7) at frequences f c ±f nose. After some calculatons the FM spur ampltude can be wrtten as: n FM Ac Hsub( f ) Anose K V out ( fc ± fnose) = (2) 2 fnose Snce a VCO s often used n front of a lmtng crcut (e.g. a swtchng mxer), FM s the most relevant mechansm. 5. Substrate nose mpact mechansm for an LC-tank VCO Substrate nose can couple nto an LC-tank VCO (LC-tank consstng of an accumulaton mode NMOS varactor and an on-chp nductor) through several senstve components of the crcuts: resstvely and capactvely to the non-deal metal ground nterconnect; resstvely to the NMOS transstor back-gates; capactvely through the n-well to the PMOS transstor back-gates; capactvely to the nductors; capactvely through the n-well of the accumulaton mode NMOS varactor, to ts back-gate node; capactvely to the on-chp power supply nterconnect; Resstve couplng to the VCO s ndependent of the nose frequency whle capactve couplng s proportonally Fgure 7 Power spectrum at the VCO output n presence of a -5 dbm 10 MHz substrate sgnal: spurs appear at both sdes of the local oscllator. The ampltude modulaton (AM) spurs can be wrtten as: n AM Ac Hsub( f ) Anose GAM V out ( fc ± fnose) = (3) 2 From equatons (2) and (3) t s clear that n case of resstve couplng (H sub ndependent of frequency) followed by pure FM the spur voltage s nversely proportonal to the nose frequency whle for AM t s ndependent of frequency. These relatons wll be used n secton 6 to nvestgate the

5 domnant mechansm behnd substrate nose mpact on the 0.18 µm CMOS VCO. 6. Expermental and smulaton analyss of substrate nose mpact on the VCO In ths secton, the smulaton methodology descrbed n secton 3 s valdated wth measurements. It s used to nvestgate the domnant path and mechansm for mpact of substrate nose on the 0.18 µm VCO. Models for the substrate, the VCO crcut and the nterconnect are extracted wth Substratestorm and DIVA. The resultng mpact s smulated usng Spectre RF. As mentoned earler n ths paper, the waveform resultng from mpact of substrate nose on the analog / RF vctm can be obtaned for any node at the nterface of substrate and crcut and wthn the crcut. Ths allows one to fnd out what devce(s) n the crcut play(s) a domnant role n the overall mpact of substrate nose on the crcut performance. It s verfed wth smulatons, that for the studed VCO the non-deal on-chp ground nterconnect (due to the nevtable resstance n ths nterconnec s the domnant path for substrate nose mpact. Impact va the NMOS transstor back-gate wll be shown to be of lesser mportance. The mpact of a substrate nose sgnal wth a frequency up to 15 MHz s analyzed. Substrate nose sgnals havng these frequences gve rse to spurs close to the local oscllator frequency where dsturbng sgnals are the most harmful. Moreover, the spurs resultng from FM (as wll be proven further to be domnant compared to AM) are the largest for ths frequency range. and rght sde of the local oscllator (f c ±f nose ) agree wth measurements wth a maxmal error of 2 db, valdatng the presented methodology. Resstve couplng followed by FM s clearly the domnant mechansm behnd mpact of substrate nose snce the spur power s proportonal to the logarthm of the nose frequency. A small dfference between left and rght spur s observed caused by neglgble AM of the local oscllator. In case of resstve couplng followed by AM the spur power would have been ndependent of the nose frequency. In case of capactve couplng followed by FM or AM t would have been respectvely ndependent or ncreasng wth frequency. Snce capactve couplng s neglgble, t can be concluded that mpact va PMOS, nductor and NMOS varactor s neglgble as well. The resstve couplng can occur only va the NMOS back-gate or the nterconnect parastc resstance. It wll be proven wth smulatons that the latter s the domnant path va whch substrate nose mpacts the crcut. NMOS nductor MEASUREMENTS * o SIMULATIONS Fgure 8 The total spur power at f c ±f nose at the VCO output caused by mpact of a -5 dbm snusodal substrate sgnal: a lnear relaton between the power and the logarthm of f nose s observed. Fgure 8 shows the comparson between measured and smulated spur power at f c ±f nose (for dfferent tunng voltages, Vtune) when a 5 dbm snusodal sgnal s njected nto the substrate n the vcnty of the VCO (va SUB n Fgure 6). Smulatons of the spur power at left Fgure 9 Smulaton of the contrbutons of the separate devces n the VCO to the overall mpact (at f c ±f nose, Vtune = 0V, Pnose = - 5dBm). The ground nterconnect s the domnant path for substrate nose mpact. Fgure 9 shows the contrbuton n the overall mpact of the separate components (relevant for the nvestgated frequency range) n the VCO n terms of spur power n functon of nose frequency. The domnant contrbuton s clearly comng from the parastc resstance n the on-chp ground nterconnect. The nversely proportonal relaton between spur ampltude and the substrate nose frequency proves that ths mpact s resultng from a resstve couplng followed by frequency modulaton. More precsely substrate nose couples resstvely to the ground nterconnect, resultng n a voltage drop over ts parastc resstance and causng the voltage over the varable crcut capactances (NMOS and PMOS capactances, accumulaton mode NMOS varactor capactance) to vary, whch results n modulaton of the local oscllator frequency. Impact va the nductor s sgnfcantly lower because t results from capactve couplng (C nd =120 ff per nductor) whch s

6 neglgble for the studed substrate nose frequences. It s nterestng to note that ths mpact s constant wth frequency provng hat the capactve couplng s followed by frequency modulaton. Impact va the NMOS back-gate s as well nversely proportonal to the nose frequency but low compared to the mpact va the non-deal ground nterconnect. For our test case a dfference of approxmately 20 db, s obtaned from smulaton n Fgure 9. Further, mpact through the PMOS transstors and the varactor (both n an n-well) s less mportant than the nductor mpact because of the even lower capactance between the substrate and the n-well they are located n. Startng from these observatons a desgner could mprove the nose mmunty of hs crcut by lowerng the resstance n the on-chp ground nterconnect. A reducton by half of ths resstance wll lead to a reducton of approxmately 6dB n the mpact. To test ths, a second extracton was done after enlargng where possble the ground nterconnect lnes n the VCO layout by a factor of two. Ths yelds a predcton of a 4.5 db lower mpact (Fgure 10). Fgure 10 Smulaton of mpact (at f c ±f nose ) of a -5 dbm substrate nose sgnal (1) on the real VCO, (2) a VCO layout wth ground nterconnect resstance reduced by half. For these results smulaton requres approxmately 35 mnutes run tme on an HP-UX L2000/4 (4 540MHz) server (extracton tme 20 mnutes, smulaton tme 15 mnutes for results n fgure 10). 7. Conclusons Ths paper reports a novel smulaton methodology for analyss and predcton of substrate nose mpact on analog / RF crcuts takng nto account the parastc resstance of on-chp nterconnect. Ths methodology allows nvestgaton of the contrbutons of the separate devces (also parastc devces) n the analog / RF crcut n the overall mpact. Ths way s revealed whch devces have to be taken care of (sheldng, topology change) to protect the crcut aganst substrate nose. The smulaton s valdated by comparng measurements to smulatons on a 3 GHz VCO desgned n a 0.18 µm hgh-ohmc 1PM6 CMOS technology. Smulatons show, that takng the (nevtable) resstance n the on-chp nterconnect nto account s crucal for accurate predcton of mpact of substrate nose on an analog / RF crcut. Ths methodology has revealed that layout detals such as on-chp ground lne parastc resstance can make an analog/rf crcut very senstve to substrate nose. 8. Acknowledgements The authors wsh to tank the IWT Flanders for ts fnancal support and D. Lnten for desgnng the VCO. 9. References [1] S. Donnay, G. Gelen, edtors, Substrate nose couplng n mxed-sgnal IC s, Kluwer Academc Publshers, [2] F. J. R. Clement, E. Zysman, M. Kayal, and M. Declercq, LAYIN: Toward a global soluton for parastc couplng ng and vsualzaton, n IEEE Proceedngs. of Custom Integrated Crcuts Conf., pp , [3] W. Chu, N. Verghese, H-J Cho, K. Shmazak, H. Tsujkawa, S. Hrano, S. Doushoh, M. Nagata, A. Iwata, T. Ohmoto, A Substrate Nose Analyss Methodology for Large-Scale Mxed- Sgnal ICs, n IEEE Proceedngs Of Custom Integrated Crcuts Conference, pp , [4] R. Sngh, A revew of substrate couplng ssues and ng strateges, Proceedngs of the IEEE Custom Integrated Crcuts, May 1999, pp [5] P. Mlozz, L. Carlon, E. Charbon, and A. Sangovann- Vncentell, SUBWAVE: a methodology for ng dgtal substrate nose njecton n mxed-sgnal ICs, n IEEE Proc. of Custom Integrated Crcuts Conf., pp , May [6] M. van Hejnngen, M. Badaroglu, S. Donnay, M. Engels, and I. Bolsens, Hgh-Level smulaton of substrate nose generaton ncludng power supply nose couplng, n IEEE/ACM Proc. of Desgn Automaton Conf., pp , June [7] E. Schrk, A. van Genderen, N.P. van der Mejs, Coherent nterconnect / substrate ng usng SPACE an expermental study. Conf. on European Sold-State Devce Research, pp , September [8] F. Martorell, D. Mateo, X. Aragones, Modelng and evaluaton of substrate nose nduced by nterconnects, n Proc. Of Desgn, Automaton and Test n Europe Conference and Exhbton, pp , March [9] C. Soens, G. Van der Plas, P. Wambacq, S. Donnay, Performance degradaton of an LC-tank VCO by mpact of dgtal swtchng nose, accepted for ESSCIRC [10] M. Badaroglu, M. van Hejnngen, V. Gravot, S. Donnay, H. De Man, G. Gelen, M. Engels, and I. Bolsens, Hgh-level smulaton of substrate nose generaton from large dgtal crcuts wth multple supples," n Proc. of Desgn, Automaton and Test n Europe Conf., pp , March 2001 [11] SubstrateStorm: [12] DIVA, [13] Spectre RF,