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1 M34 REMTE CNTRL TRANSMITTER FEATURES SUMMARY FLASHED R MDULATED TRANSMISSIN 7 SUB-SYSTEM ADDRESSES UP T 64 CMMANDS PER SUB-SYSTEM ADDRESS HIGH-CURRENT REMTE UTPUT AT V DD = 6V ( I H = 8mA) LW NUMBER F ADDITINAL CMPNENTS KEY RELEASE DETECTIN BY TGGLE BITS VERY LW STAND-BY CURRENT (< 2µA) PERATINAL CURRENT < ma AT 6V SUPPLY SUPPLY VLTAGE RANGE 2 T 6.5V CERAMIC RESNATR CNTRLLED FREQUENCY (typ. 45kHz) DESCRIPTIN The M34LD transmitter IC is designed for infrared remote control systems. It has a total of 448 commands which are divided into 7 sub-system groups with 64 commands each. The sub-system code may be selected by a press button, a slider switch or hard wired. The M34LD generates the pattern for driving the output stage. These patterns are pulse distance coded. The pulses are infrared flashes or modulated. The transmission mode is defined in conjunction with the sub-system address. Modulated pulses allow receivers with narrow-band preamplifiers for improved noise rejection to be used. Flashed pulses require a wide-band preamplifier within the receiver. Figure. Package S2 (Plastic Package) Figure 2. Pin Connection REM SEN 6N SEN 5N SEN 4N SEN 3N SEN 2N SEN N SEN N ADRM V SS V DD DRV 6N DRV 6N DRV 6N DRV 6N DRV 6N DRV 6N DRV 6N SC UT SC IN bsolete Product(s) - bsolete Product(s) June 24 REV. 2 /4

2 M34 Figure 3. Block Diagram DRV UTPUTS N N 2N 3N 4N 5N 6N S E N I N P U T S N N 2N 3N 4N 5N 6N KEYBARD SCAN PULSE DISTANCE MDULATR REM UTPUT V DD V SS ADRM SCILLATR SCI SC INPUTS AND UTPUTS Key matrix inputs and outputs (DRVN to DRV6N and SENN to SEN6N) The transmitter keyboard is arranged as a scanned matrix. The matrix consists of 7 driver outputs and 7 sense inputs as shown in Figure 4. The driver outputs DRVN to DRV6N are open drain N-channel transistors and they are conductive in the stand-by mode. The 7 sense inputs (SENN to SEN6N) enable the generation of 56 command codes. With 2 external diodes all 64 commands are addressable. The sense inputs have P-channel pull-up transistors so that they are HIGH until they are pulled LW by connecting them to an output via a key depression to initiate a code transmission. ADDRESS MDE INPUT (ADRM) The sub-system address and the transmission mode are defined by connecting the ADRM input to one or more driver outputs (DRVN to DRV6N) of the key matrix. If more than one driver is connected to ADRM, they must be decoupled by diodes. This allows the definition of seven subsystem addresses as shown in Table 3. If driver DRV6N is connected to ADRM, the data output CNTRL LGIC format of REM is modulated or if not connected, flashed. The ADRM input has switched pull-up and pulldown loads. In the stand-by mode only the pulldown device is active. Whether ADRM is open (sub-system address, flashed mode) or connected to the driver outputs, this input is LW and will not cause unwanted dissipation. When the transmitter becomes active by pressing a key, the pulldown device is switched off and the pull-up device is switched on, so that the applied driver signals are sensed for the decoding of the sub-system address and the mode of transmission. The arrangement of the sub-system address coding is such that only the driver DRVnM with the highest number (n) defines the sub-system address, e.g. if drivers DRV2N and DRV4N are connected to ADRM, only DRV4N will define the subsystem address. This option can be used in systems requiring more than one sub-system address. The transmitter may be hard-wired for subsystem address 2 by connecting DRVN to ADRM. If now DRV3N is added to ADRM by a key or a switch, the transmitted sub-system address changes to 4. A change of the sub-system address will not start a transmission. bsolete Product(s) - bsolete Product(s) 2/4

3 M34 REMTE CNTRL SIGNAL UTPUT (REM) The REM signal output stage is a push-pull type. In the HIGH state, a bipolar emitter-follower allows a high output current. The timing of the data output format is listed in Table and 2. The information is defined by the distance tb between the leading edges of the flashed pulses or the first edge of the modulated pulses (see Figure 6). The format of the output data is given in Figure 5 and 6. The data word starts with two toggle bits T and T, followed by three bits for defining the sub-system address S2, S and S, and six bits F, E, D, C, Band A which are defined by the selected key. In the modulated transmission mode the first toggle bit is replaced by a constant reference time bit (REF). This can be used as a reference time for the decoding sequence. The toggle bits function is an indication for the decoder that the next instruction has to be considered as a new command. The codes for the sub-system address and the selected key are given in Table 3 and 4. The REM output is protected against Lock-up, i.e. the length of an output pulse is limited to <ms, even if the oscillator stops during an output pulse. This avoids the rapid discharge of the battery that would otherwise be caused by the continuous activation of the LED. SCILLATR INPUT / UTPUT (SCI and SC) The external components must be connected to these pins when using an oscillator with a ceramic resonator. The oscillator frequency may vary between 35kHz and 6kHz as defined by the resonator. FUNCTINAL DESCRIPTIN Keyboard operation In the stand-by mode all drivers (DRVN to DRV6N) are on (low impedance to V SS ). When ever a key is pressed, one or more of the sense inputs (SENnN) are tied to ground. This will start the power-up sequence. First the oscillator is activated and after the debounce time t DB (see Figure 7) the output drivers (DRVN to DRV6N) become active successively. Within the first scan cycle the transmission mode, the applied sub-system address and the selected command code are sensed and loaded into an internal data latch. In contrast to the command code, the sub-system is sensed only within the first scan cycle. If the applied sub-system address is changed while the command key is pressed, the transmitted sub-system address is not altered. In a multiple key stroke sequence (see Figure 8) the command code is always altered in accordance with the sensed key. MULTIPLE KEY-STRKE PRTECTIN The keyboard is protected against multiple keystrokes. If more than one key is pressed at the same time, the circuit will not generate a new output at REM (see Figure 8). In case of a multiple key-stroke, the scan repetition rate is increased to detect the release of a key as soon as possible. There are two restrictions caused by the special structure of the keyboard matrix: The keys switching to ground (code numbers 7, 5, 23, 3, 39, 47, 55 and 63) and the keys connectedto SEN5N and SEN6N are not covered completely by the multiple key protection. If one sense input is switched to ground,further keys on the same sense line are ignored, i.e. the command code corresponding to key to ground is transmitted. SEN5N and SEN6N are not protected against multiple keystroke on the same driver line, because this condition has been used for the definition of additional codes (code number 56 to 63). UTPUT SEQUENCE (data format) The output operation will start when the selected code is found. A burst of pulses, including the latched address and command codes, is generated at the output REM as long as a key is pressed. The format of the output pulse train is given in Figure 5 and 6. The operation is terminated by releasing the key or if more than one key is pressed at the same time. nce a sequence is started, the transmitted data words will always be completed after the key is released. The toggle bits T and T are incremented if the key is released for a minimum time t REL (see Figure 7). The toggle bits remain unchanged within a multiple key-stroke sequence. bsolete Product(s) - bsolete Product(s) 3/4

4 M34 Table. Pulse Train Timing Mode T (ms) t P (µs) t M (µs) t ML (µs) t MH (µs) t W (ms) Flashed Modulated f SC 455kHz t SC = 2.2ms t P 4 x t SC Flashed Pulse Width t M 2 x t SC Modulation Period t ML 8 x t SC Modulation Period Low t MH 4 x t SC Modulation Period High t W x t SC Word Distance T 52 x t SCb Basic Unit of Pulse Distance Note: The following number of pulses may be selected by Metal option: N= 8, 2, 6. The different dividing ratio for T and t W between flash mode and carrier mode is obtained by changing the modulo of a particular divider from divide by 3 during flash mode to divide by 4 during carrier mode. This allows the use of a 6kHz ceramic resonator during carrier mode to obtain a better noise immunity for the receiver without a significant change in T and t W. For first samples, the correct divider ration is obtained by a metal mask option. For final parts, this is automatically done together with the selection of flash-/carrier mode. Table 2. Pulse Train Separation (t b ) Code Logic Logic Toggle Bit Time Reference Time bsolete Product(s) - bsolete Product(s) t b 2 x T 3 x T 2 x T or 3 x T 3 x T 4/4

5 M34 Table 3. Transmission Mode and Sub-system Adress Selection Mode F L A S H E D M D U L A T E D Note: = connected to ADRM blank = not connected to ADRM = don t care Table 4. Key codes Sub-system Address Driver DRVnN for n = # S2 S S Matrix Drive DRVN DRVN DRV2N DRV3N DRV4N DRV5N DRV6N VSS Note Note Note Note Note Note Note Matrix Sense SENN SENN SENN SENN SENN SENN SENN SENN SENN SEN2N SEN3N SEN4N SEN5N SEN6N SEN5N and SEN6N Note:. The complete matrix drive as shown above for SENN is also applicable for the matrix sense inputs SENN to SEN6N and the combined SEN5/SEN6N. 2. The C, B and A codes are identical to SENN as given above. bsolete Product(s) - bsolete Product(s) Code F E D C B A Note 2 Note 2 Note 2 Note 2 Note 2 Note Note 2 Matrix Position to 5 6 to to 3 32 to 39 4 to to to 63 5/4

6 M34 Table 5. Absolute Maximum Ratings (T case = 25 C) Symbol Parameter Value Unit V DD Supply Voltage Range.3 to +7 V V I Input Voltage Range.3 to (V DD +.3) V V utput Voltage Range.3 to (V DD +.3) V ± I D.C. Current into Any Input or utput Max ma I (REM) M Peak REM utput Current during µs, Duty Factor = % Max 3 ma P TT Power Dissipation per Package for T A = 2 to +7 C Max 2 mw T STG Storage Temperature Range 55 to +25 C T A perating Ambient Temperature Range 2 to +7 C Note: Stresses in excess of those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions in excess of those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. bsolete Product(s) - bsolete Product(s) 6/4

7 M34 ELECTRICAL CHARACTERISTICS V SS = V, T A = 25 C (unless otherwise specified) Table 6. Symbol Parameter Test Conditions Min Typ Max Unit V DD Supply Voltage T A = to +7 C V I DD Supply Current Active f SC = 455kHz REM, utput unload V DD = 3V V DD = 6V ma ma Inactive (stand-by mode) V DD = 6V 2 µa f SC scill. Frequency V DD = 2 to 6.5V (cer resonator) 35 6 khz KEYBARD MATRI - Inputs SEN to SEN6N V IL Input Voltage Low V DD = 2 to 6.5V.3 x V DD V V IH Input Voltage High V DD = 2 to 6.5V.7 x V DD V I I Input Current V DD = 2V, V I = V V DD = 6.5V, V I = V 5 5 I I Input Leakage Current V DD = 6.5V, V I = V DD µa KEYBARD MATRI - utputs DRVN to DRV6N V L utput Voltage N V DD = 2V, I =.ma V DD = 6.5V, I = 2.5mA.3.6 V V I utput Current FF V DD = 6.5V, V = V µa CNTRL INPUT ADRM V IL Input Voltage Low.3 x V DD V V IH Input Voltage High.7 x V DD V I IL Input Current Low Pull-up Act. per. Condition, V IN = V SS (switched P and N channel pull-up/pull down) V DD = 2V V DD = 6.5V 6 µa µa I IH Input Current High Pull-down Act. Stand-by Cond.,V IN = V DD (switched P and N channel pull-up/pull V DD = 2V V DD = 6.5V 6 µa µa down) DATA UTPUT REM I H utput Current High V DD = 2V, V H =.8V V DD = 6.5V, V H = 5V 6 8 ma ma I L utput Current Low V DD = 2V, V L =.4V V DD = 6.5V, V L =.4V.6.6 ma ma t H Pulse Length V DD = 6.5V, scill. Stopped ms SCILLATR I I Input Current V DD = 2V µa V DD = 6.5V, SC at V DD 7 µa V H utput Voltage high V DD = 6.5V, I L =.ma V DD.8 V V L utput Voltage Low V DD = 6.5V, I H =.ma.7 V bsolete Product(s) - bsolete Product(s) 6 µa µa 7/4

8 M34 Figure 4. Typical Application Figure 5. Data Format of REM utput bsolete Product(s) - bsolete Product(s) Note: REF = Reference Time; T and T = Toggle bits; S, S and S2 = System address; A, B, C, D, E and F = Command bits. (a) flashed mode: transmission with 2 toggle bits and 3 address bits, followed by 6 command bits (pulses are flashed) (b) modulated mode: transmission with reference time, toggle bit and 3 address bits, followed by 6 command bits (pulses are modulated) 8/4

9 M34 Figure 6. REM utput Waveform Note: (a) flashed pulse (b) modulated pulse [t PW = (5 x t M ) + t MH )] Figure 7. Single Key - Stroke Sequence Note: Debounce time: t DB = 4 to 9 x T Start time: t ST = 5 to x T Minimum release time: t REL = T bsolete Product(s) - bsolete Product(s) 9/4

10 M34 Figure 8. Multiple Key-Stroke Sequence Note: Scan rate multiple key-stroke : t SM = 8 to x T bsolete Product(s) - bsolete Product(s) /4

11 M34 PART NUMBERING Table 7. rder Codes rder Codes Package perative Temperature Range M34LD S2 2 to +7 C M34LDT S2 2 to +7 C bsolete Product(s) - bsolete Product(s) /4

12 M34 PACKAGE MECHANICAL Table 8. 2 PINS - PLASTIC MICRPACKAGE Mechanical Data Symbol millimeters inches Min Typ Max Min Typ Max A a a b b C.5.2 c 45 (Typ) D E e.27.5 e F L M.75.3 S Figure 9. Package Dimensions 8 (Max) bsolete Product(s) - bsolete Product(s) Note: Drawing is not to scale. 2/4

13 M34 REVISIN HISTRY Table 9. Revision History Date Revision Description of Changes November-992 First Issue 28-June-24 2 Stylesheet update. No content change. bsolete Product(s) - bsolete Product(s) 3/4

14 M34 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. bsolete Product(s) - bsolete Product(s) The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 24 STMicroelectronics - All rights reserved STMicroelectronics GRUP F CMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States 4/4

15 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: STMicroelectronics: M34LD

74VHC132 QUAD 2-INPUT SCHMITT NAND GATE

74VHC132 QUAD 2-INPUT SCHMITT NAND GATE QUAD 2-INPUT SCHMITT NAND GATE HIGH SPEED: t PD = 3.9 ns (TYP.) at V CC = 5V LOW POWER DISSIPATION: I CC = 2 µa (MAX.) at T A =25 C TYPICAL HYSTERESIS: V h = 1V at V CC = 4.5V POWER DOWN PROTECTION ON