First of all, I would like to thank my advisor, Dr. Dusan Borojevic for his

Transcription

1 ACKNOWLEDGMENTS First of all, I would like to thank my advisor, Dr. Dusan Borojevic for his invaluable support, understanding and encouragement. This work would not have been complete without his esteemed guidance. His knowledge in various fields amazes me. I am grateful to Dr. Fred C. Lee for bringing me into VPEC and providing me with the opportunity to work at Virginia Power Electronic Center (VPEC). It has been a pleasure to work at VPEC. I would like to thank Dr. Dan. Chen for his encouragement and for serving in my committee. I would like to thank Sriram Chandrasekaran for his patience, valuable help and time. Then I would like to thank Gurjit S. Thandi for the innumerable number of hours we spent discussing and working together. I am deeply thankful to Steven Dubovsky and Richard Zhang for their patience, help and time. I would like to also thank Carlos Cuadros for his help and time. I would also like to thank Jay Rajagopalan for his valuable suggestions. I would also like to thank Zoran Mihailovic, Nikola Celanovic, Ivanna Milosavljevic and Ivan Jadric. It was a pleasure working with them. I would also like to thank Kunwrong Wang, Kun Xing, Henchung Mao and Xiukuan Jing. Last but not the least I am very thankful to the VPEC staff especially to Teresa C. Shaw, Linda Fitzgerald, and Evelyn Martin.

2 TABLE OF CONTENTS 1 INTRODUCTION 1 2 SPACE VECTOR MODULATION FOR THREE-LEG VOLTAGE SOURCE INVERTERS Three-Leg Voltage Source Inverter Voltage Space Vectors Space Vector Modulation Modulation Schemes Right Aligned Sequence (SVM1) Symmetric Sequence (SVM2) Alternating Zero Vector Sequence (SVM3) Highest Current Not-Switched Sequence (SVM4) Analysis Total Harmonic Distortion Switching Losses Peak-to-Peak Current Ripple Simulation and Experimental Results Performance Summary 26 ii

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4 3 SPACE VECTOR MODULATION AND FOUR-LEG VOLTAGE SOURCE INVERTERS Four-Leg Voltage Source Inverter Voltage Space Vectors Space Vector Modulation Identification of Adjacent Vectors Duty Cycle Calculation Sequencing of Vectors Modulation Schemes Symmetric Sequence: Scheme Highest Current Not-Switched Sequence: Scheme Alternating Zero Vector Sequence: Scheme Analysis Performance Comparison for Balanced Load Total Harmonic Distortion Switching Losses Performance Comparison for Unbalanced Load Total Harmonic Distortion Switching Losses Simulation and Experimental Results Performance Summary 51 iv

5 4 CONCLUSIONS 52 REFERENCES 54 APPENDICES 57 VITA 68 v

6 LIST OF ILLUSTRATIONS Fig. 1.1 Topology of a three-leg voltage source inverter 3 Fig. 1.2 Topology of a four-leg voltage source inverter 3 Fig. 2.1 Topology of a three-leg voltage source inverter 4 Fig. 2.2 Eight switching state topologies of a voltage source inverter 5 Fig. 2.3(a) Topology 1-V1(pnn) of a voltage source inverter 6 Fig. 2.3(b) Representation of topology 1 in the α, β plane 6 Fig. 2.4 Non-zero voltage vectors in the α, β plane 7 Fig. 2.5(a) Zero output voltage topologies 8 Fig. 2.5(b) Representation of the zero voltage vectors in the α, β plane 8 Fig. 2.6(a) Output voltage vector in the α, β plane 9 Fig. 2.6(b) Output line voltages in time domain 9 Fig. 2.7 Synthesis of the required output voltage vector in sector1 10 Fig. 2.8 Phase gating signals in SVM1 12 Fig. 2.9 Phase gating signals in SVM2 12 Fig Phase gating signals in SVM3 13 Fig. 2.11(a) Phase gating signals in SVM4 14 Fig. 2.11(b) Choice of zero-vector in sector1 14 Fig Typical phase voltage in one fundamental time period 15 Fig Output voltage pulse 16 Fig Phase voltage decomposition in one sampling period 17 Fig Voltage and current distortion as a function of modulation index 19 Fig Relative switching losses as a function of load power factor angle 21 Fig Phase voltage pulse at its peak low frequency value 22 Fig Relative peak-to-peak current ripple 23 Fig Simulated line currents and spectrum of line currents (f s /f o = 36) 24 Fig Experimental line currents and spectrum of line currents (f s /f o = 36) 25 vi

7 Fig. 3.1 Topology of a four-leg voltage inverter 27 Fig. 3.2(a) Topologies of a four-leg voltage source inverter 28 Fig. 3.2(b) Topologies of a four-leg voltage source inverter 29 Fig. 3.3(a) Topology 1(pnnn) of a four-leg voltage source inverter 30 Fig. 3.3(b) Representation of topology 1 in α, β, γ space 30 Fig. 3.4(a) Switching state vectors of a four-leg inverter 31 Fig. 3.4(b) Projection of the sixteen vectors into the α, β plane 31 Fig. 3.5 Reference vector in prism1 33 Fig. 3.6 Flowchart used to determine prism information 33 Fig. 3.7(a) Prism (P1) consisting of four tetrahedrons (T1,T2,T13,T14) 35 Fig. 3.7(b) Reference vector in tetrahedron1 (T1) 35 Fig. 3.8 Duty cycles for the active vectors 35 Fig. 3.9 Traversal of tetrahedrons and prisms for a balanced load 37 Fig Traversal of tetrahedrons and prisms for an unbalanced load 38 Fig Phase gating signals in scheme1 40 Fig Phase gating signals in scheme2 41 Fig Phase gating signals in scheme3 42 Fig Phase voltage decomposition in one sampling period 43 Fig Total harmonic distortion of phase voltage and current 44 Fig Relative switching losses as a function of load power factor angle 45 Fig Variation of THD of phase voltage with load power factor 46 Fig Variation of THD of phase voltage with load power 47 Fig Relative switching loss for (a) leading and (b) lagging load PF 47 Fig Fig Fig Phase currents and spectrum of phase currents for the space vector modulation schemes 49 Line currents, Output voltages and current through neutral leg for (a) Balanced load and (b) Unbalanced load 49 Experimental output voltage and spectrum of output voltage for scheme2 (V g = 75, f s /f o = 40) 50 vii

8 LIST OF TABLES Table 2.1 Phase voltage in sector 1: SVM1 17 Table 2.2 Relative performance of various modulation schemes (three-leg) 26 Table 3.1 Identification of tetrahedrons 34 Table 3.2 Output voltage pulse in tetrahedron1: Scheme1 43 Table 3.3 Relative performance of various modulation schemes (four-leg) 51 viii