VCC 10uF. Figure 1 - Typical application of IRU1237SC. TJ ( C) 7-PIN PLASTIC PACKAGE Ultra Thin-Pak TM (P) MARKING 0 To 150 IRU1237SCCP US1237SCCP

Size: px

Start display at page:

Download "VCC 10uF. Figure 1 - Typical application of IRU1237SC. TJ ( C) 7-PIN PLASTIC PACKAGE Ultra Thin-Pak TM (P) MARKING 0 To 150 IRU1237SCCP US1237SCCP"

Candice Ryan
5 years ago
Views:

1 Data Sheet No. PD948 IRU2SC FETURES Stable with Ceramic Capacitor Fixed 8,. and 2.6 Fast Transient Response Output Current Limiting for each outputs Built-In Thermal Shutdown PPLICTIONS Hard Disk Drive Multi-Outputs pplications High Efficiency Linear Regulator THREE INTEGRTED, FIXED OUTPUT LINER OLTGE REGULTORS PRELIMINRY DT SHEET DESCRIPTION The IRU2SC voltage regulator solution contains three integrated, fixed, linear voltage regulators in one -pin surface mount package. The first is a 2.6 regulator to power the read channel and integrated controller/µp. The second is a. regulator to power the controller I/O and memory chips requiring.. The last is an 8 regulator to power the preamp chip. The bandgap reference, the 8 ground, and the substrate are all tied to a common ground pin, while the 2.6 and. ground is tied to a separate ground pin. This grounding scheme allows for improved noise isolation between the 8 regulator and the 2.6 and. regulators. The 2.6 and. regulators shall each be capable of.2 continuous for a.2 input. The 8 regulator shall be capable of 0.2 continuous for a.2 input. TYPICL PPLICTION 26 0uF 2.6 /.2 DD uf 2 IRU2SC 8 Gnd8 uf 8 / 200 CC 0uF Gnd26/ 0uF. /.2 Figure - Typical application of IRU2SC. PCKGE ORDER INFORMTION TJ ( C) -PIN PLSTIC PCKGE Ultra Thin-Pak TM (P) MRKING 0 To 0 IRU2SCCP US2SCCP 0/4/0

2 BSOLUTE MXIMUM RTINGS Input oltage (CC)... 8 Input oltage (DD)... 8 Operating Junction Temperature Range... 0 C To 0 C Operating mbient Temperature Range... 0 C To 0 C Storage Temperature Range C To +0 C ESD Capability (Human Body Model) PCKGE INFORMTION -PIN ULTR THIN-PK TM (P) DD 8 Gnd8 cc Gnd26/ θj=0 C/W for "sq pad ELECTRICL SPECIFICTIONS Unless otherwise specified, these specifications apply over CC=, DD=2, CIN=COUT=0.µF(XR), TJ=0 to 2 C. Typical values refer to TJ=2 C. IFL=.2, IFL2 =.2 and IFL =0.2. PRMETER SYM TEST CONDITION MIN TYP MX UNITS Output oltage # Output oltage # Output oltage #2 Output oltage #2 Output oltage # Line Regulation Load Regulation Dropout oltage (Output #) Dropout oltage (Output #2) Dropout oltage (Output #) Transient Response Current Limit (Output #) Current Limit (Output #2) Current Limit (Output #) Min Load Current (Output #) Min Load Current (Output #2) Min Load Current (Output #) Output Capacitor Input Capacitor Thermal Regulation O O O2 O2 O RegLINE RegLOD DO DO2 DO ttr IOL IOL2 IOL LO(MIN) LO2(MX) LO(MX) CO CIN RegTHERM Over all operating conditions 0<DD<0.8, IO=0. Over all operating conditions 0<DD<0.8, IO=0. Over all operating conditions IO=0, CC±%, DD±0% Note, 0 < IO < IFL Note 2, IO=IFL Note 2, IO2=IFL2 Note, IO=IFL Note and O=2m O2=6m O=400m Note 4 and Note 4 and Note 4 and Note and Note Note, 0ms pulse, IO=IFL %o %o µs µf µf %/W 2 0/4/0

3 PRMETER SYM TEST CONDITION MIN TYP MX UNITS Ripple Rejection (CC to Output #) Ripple Rejection (CC to Output #2) Ripple Rejection (DD to Output #) TJ Thermal Shutdown Temperature Stability Long Term Stability RMS Output Noise PSRR PSRR2 PSRR TTHERM StabTEMP StabLONG N Note, 00Hz<f<00KHz, IO=IFL/0 Note, 00Hz<f<00KHz, IO=IFL2/0 Note, 00Hz<f<00KHz, IO=IFL/0 Note Note 6 and, IO=0 Note, TJ=2 C, 000Hrs Note, 0Hz<f<0KHz db db db C %o %o %o CC Quiescent current DD Quiescent current IQ IQ2 IO=IO2=IO=0 IO=IO2=IO= Note : Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum differential voltage between IN and OUT required to maintain regulation at OUT. It is measured when the output voltage drops % below its nominal value. Note : Transient response is defined with a step change in load from 0 to IFL/2, as the time from the load step until the output voltage reaches its minimum value. Note 4: Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Note : The regulator shall withstand 00,000 reverse bias discharges of the maximum output capacitance, with no degradation, when the input voltage is switched to ground in µs. Note 6: Temperature stability is the change in output from nominal over the operating temperature range. PIN DESCRIPTIONS PIN# PIN SYMBOL PIN DESCRIPTION,4 Gnd26/, Gnd8 Note : Guaranteed by design, but not tested in production. These pins are connected to ground. It is also the tab of the device. 2 Output #. Fixed regulator output (.). CC Positive unregulated supply input for the regulator. This pin must always be higher than both OUT pins by the amount of the dropout voltage in order for the device to regulate properly. Bypass to ground with low ESR and ESL capacitance. 8 Output #. Fixed regulator output (8). 6 DD Input voltage to supply the base current for the pass transistor for both regulators. 26 Output #2. Fixed regulator output (2.6). 0/4/0

4 BLOCK DIGRM DD 6 8 Thermal Shutdown + Bandgap 4 Gnd8 Thermal Shutdown Gnd26/ Pre-Driver Controller cc 2 Thermal Shutdown Pre-Driver Controller 26 Figure 2 - Simplified block diagram of the IRU2SC. 4 0/4/0

5 PPLICTION INFORMTION Introduction The IRU2SC regulator is -pin terminal device and contains three integrated, fixed, linear regulators. The dual inputs provide a low dropout voltage for and 26 by biasing the base current to power NPN transistors. The IRU2SC is designed to meet the fast current transient needs as well as an accurate initial voltage, thus reducing the overall system cost with the need for fewer number of output capacitors. Thermal Protection The IRU2SC provides thermal protection for all three outputs. ll outputs will be disabled for any over-temperature condition. When one of the outputs exceeds the thermal limit (typically 0 C), the IRU2SC shuts down all three outputs simultaneously. The outputs will be re-enabled when the temperature drops below the thermal limit. Current Limit Protection The IRU2SC provides over current protection when one the outputs current exceeds the current limit level. Stability The IRU2SC doesn t require input and output capacitors for stability, however to improve the transient response and guarantee stability, it is recommended that a 0.µF (minimum) ceramic for input and output capacitors be used. Transient Response and PSRR The input and output capacitors are critical in order to ensure good transient response and PSSR. The most important aspects of this are capacitor selection, placement, and trace routing. Place each capacitor as close as physically possible to it s corresponding regulator pin. Use wide traces for low inductance path. Couple directly to the ground and power planes as possible. The use of low ESR capacitors is crucial to achieving good results. n input capacitance of at least 0.µF is recommended. n output capacitance of at least 0.µF with low ESR is recommended for good PSSR at high frequencies. Ceramic capacitors are a good choice for low ESR. Larger capacitance and lower ESR will improve both PSSR and transient response. Thermal Design The IRU2SC incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the allowable maximum junction temperature. lthough this device can operate with junction temperatures in the range of 0 C, it is recommended that the selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The following thermal design illustrates the method used to calculate the maximum junction temperature of the regulator. IN=.2 IN2=2 OUT=2.6 OUT2=. OUT=8 IOUT=0. IOUT2=0. IOUT=0. Calculating the maximum power dissipation: PD = (IN-OUT) IOUT+(IN-OUT2) IOUT2+(IN2- OUT) IOUT PD = (.2-2.6) 0.+(.2-.) 0.+(2-8) 0. PD = 2.W For Ultra Thin-Pak TM we have: RTH(J)=0W/ C T = 0 C T = PD RTH(J) = 2.W 0 = 8 C TJ = T+ T = C Layout Consideration The IRU2SC, like many other high-speed regulators, requires that the output capacitors be close to the device for stability. For power consideration, a ground plane pad of approximately one-inch square on the component side must be dedicated to device where all ground pins are connected to dissipate the power. The copper area under the package shall have vias to the internal ground plane. The thermal ground plane shall extend out from the regulator to open areas of the PCB. ll open areas shall be filled with copper to help radiate heat from the PCB. 0/4/0

6 (P) Ultra Thin-Pak TM -Pin E U K B H M L P G D C N LC R SYMBOL B C D E G H K L M N P R U MIN NOM MX NOM.49 NOM NOTE: LL MESUREMENTS RE IN MILLIMETERS. 6 0/4/0

7 PCKGE SHIPMENT METHOD PKG DESIG P PCKGE DESCRIPTION Ultra Thin-Pak TM PIN COUNT PRTS PER TUBE PRTS PER REEL 200 T & R Orientation Fig Feed Direction Figure IR WORLD HEDQURTERS: 2 Kansas St., El Segundo, California 9024, US Tel: (0) 22-0 TC Fax: (0) isit us at for sales contact information Data and specifications subject to change without notice. 02/0 0/4/0

C2 10uF. Figure 1 - Typical application of IRU1175. TJ ( C) 5-PIN PLASTIC 5-PIN PLASTIC TO-263 (M) Ultra Thin-Pak TM (P) 0 To 125 IRU1175CM IRU1175CP

C2 10uF. Figure 1 - Typical application of IRU1175. TJ ( C) 5-PIN PLASTIC 5-PIN PLASTIC TO-263 (M) Ultra Thin-Pak TM (P) 0 To 125 IRU1175CM IRU1175CP FETURES 0. Dropout at 7. (Equivalent of 67mΩ) Fast Transient Response % oltage Reference Initial ccuracy Built-In Thermal Shutdown LICTIONS. to.7 Intel I70 Chip Set TYICL LICTION Data Sheet No. D9 IRU7